Patents Examined by Dennis M. Butler
  • Latency control circuit and semiconductor memory device including the same
    Patent number: 8392741
    Abstract: A latency control circuit includes a delay unit configured to delay an input signal for a delay corresponding to a phase difference between an external clock and an internal clock and generate a delayed input signal, a delay information generation unit configured to generate a delay information based on a latency information and a delay amount of the input signal caused by a chip including the latency control circuit, a shift unit configured to shift the delayed input signal for a time period corresponding to the delay information in synchronism with the internal clock and an asynchronous control unit configured to selectively control the shift unit to output the delayed input signal without performing a shift operation.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: March 5, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kyung-Hoon Kim, Kyung-Whan Kim
  • Inductive receivers for electrical devices
    Patent number: 8380998
    Abstract: A power providing system for an electrical device includes a secondary inductor, wired to the electrical device, for inductively coupling with a primary inductor hardwired to a power supply. The secondary inductor is incorporated into an accessory of the electrical device.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: February 19, 2013
    Assignee: Powermat Technologies, Ltd.
    Inventors: Yossi Azancot, Amir Ben-Shalom, Oola Greenwald, Arik Rofe
  • Reducing power consumption of distributed storage systems
    Patent number: 8370672
    Abstract: Methods for reducing the power consumption of distributed storage systems are described. An embodiment describes a storage system which is adapted to reduce its power consumption at times of low load by reducing the number of active versions of the stored data. The data to be stored in the storage system is divided into chunks and in an example, each chunk is replicated on a number of different servers. At times of low load, the system enters a mode of operation in which the number of active replicas is reduced and servers that do not store any active replicas are put into a low power state. When in this mode, writes are written to a versioned store and the data is subsequently copied to servers storing replicas once all the servers have returned to normal power state.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: February 5, 2013
    Assignee: Microsoft Corporation
    Inventors: Eno Thereska, Austin Donnelly, Dushyanth Naraynanan
  • Imaging apparatus and start-up method of imaging apparatus
    Patent number: 8370616
    Abstract: An imaging apparatus includes: an imaging processing unit configured to image a subject and output imaging data; a temporary storage medium configured to temporarily store the imaging data output from the imaging processing unit; an imaging control unit configured to control the imaging processing unit; a storage control unit configured to store, in a storage medium detachably mounted to a device main unit, the imaging data temporarily stored in the temporary storage medium; and a request unit configured to request the device main unit for execution of start-up processing; wherein, upon the start-up processing being requested from the request unit, start-up processing of the imaging control unit and the storage control unit are executed in parallel.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: February 5, 2013
    Assignee: Sony Corporation
    Inventor: Manabu Niizato
  • Performing power management based on information regarding zones of devices in a system
    Patent number: 8356198
    Abstract: One or more target components of a system that are not associated with an active initiator are identified, where the identifying is based on information regarding zones of devices in the system. The devices in each of the zones include at least one initiator and at least one target component accessible by the initiator. The information describes accessibility of devices between the zones. A power management procedure is performed with respect to the identified one or more target components that are not associated with an active initiator to place the identified one or more target components in a reduced power state.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: January 15, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael G. Myrah, Balaji Natrajan
  • Systems on chip with workload estimator and methods of operating same
    Patent number: 8347129
    Abstract: A system on chip (SOC) includes a processor circuit configured to receive instruction information from an external source and to execute an instruction according to the received instruction information and a workload estimator circuit configured to monitor instruction codes executed in the processor circuit, to generate an estimate of a workload of the processor circuit based on the monitored instruction codes and to generate power supply voltage control signal based on the estimate of the workload. The SOC may further include a power management integrated circuit (PMIC) configured to receive the control signal and to adjust a power supply voltage provided to the SOC in response to the control signal.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: In-soo Paik
  • Computer with low-power secondary processor and secondary display
    Patent number: 8341447
    Abstract: A device operable in each of active and inactive modes includes first and second processors. The first processor performs, in accordance with a first power level, both wireless and non-wireless network processing. A second processor performs wireless network processing in accordance with a second power level. While the device is operating in the active mode: the first processor and the first display are powered up; the first display displays a result of the wireless network processing or the non-wireless network processing by the first processor; and the second processor and the second display are powered down. While the device is operating in the inactive mode: the first processor and the first display are powered down; the second processor and the second display are powered up; and the second display displays a result of the wireless network related processing by the second processor.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: December 25, 2012
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Transmission apparatus that transmits data according to a protocol, and method for measuring time in the transmission apparatus
    Patent number: 8341453
    Abstract: A transmission apparatus that transmits data according to a protocol has a timer, a memory, a processor, and a transmission unit. The processor stores, in the memory, type data indicating a single type of time from a plurality of types of time that are to be measured according to the protocol. The transmission unit transmits data according to the protocol and starts the measurement of time of the type indicated by the type data stored in the memory using the timer after the data has been transmitted.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: December 25, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Daisuke Shiraishi, Kazuhiko Morimura
  • Data processing system and image processing system
    Patent number: 8332683
    Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: December 11, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Jun Satoh, Kazushige Yamagishi, Keisuke Nakashima, Koyo Katsura, Takashi Miyamoto, Mitsuru Watabe, Kenichiroh Ohmura
  • Interface control device
    Patent number: 8332682
    Abstract: An interface control device includes a first interface, a second interface, a third interface, an interface controller and a clock supplying unit. The first interface is used to communicate with a first information processing device and obtain a first clock signal from the first information processing device. The second interface is used to communicate using a second clock signal with a second information processing device different from the first information processing device. The third interface is used to communicate with a controller of a data-storage medium. The interface controller performs an interface control for the first, second and third interfaces. Moreover, the clock supplying unit supplies the first clock signal to the third interface while communications through the second interface have not been established.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: December 11, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kiyoshi Toshimitsu, Hiroshi Suu, Shinichi Matsukawa, Akihiro Kasahara
  • System and method for portable power source management
    Patent number: 8332677
    Abstract: A host system is provided comprising including a power source configured to provide power to a first auxiliary device; and a host power manager configured to monitor an available power level of the power source; and direct the power source to reduce power provided to the first auxiliary device based upon the available power level, wherein the reduced power is greater than zero.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: December 11, 2012
    Assignee: Research In Motion Limited
    Inventors: Maxime Matton, Puvikumar Sinnathamby
  • Optimizing power management in multicore virtual machine platforms by dynamically variable delay before switching processor cores into a low power state
    Patent number: 8327176
    Abstract: Distributing a thread for running on a physical processor and enabling the physical processor to be switched into a low power snooze state when said running thread is IDLE. However, this switching into said low power state is enabled to be delayed by a delay time from an IDLE dispatch from said running thread; such delay is determined by tracking the rate of the number of said IDLE dispatches per processor clock interval and dynamically varying said delay time wherein the delay time is decreased when said rate of IDLE dispatches increases and the delay time is increased when said rate of IDLE dispatches decreases.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: December 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: Mathew Accapadi, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
  • System and method for reducing power requirements of microprocessors through dynamic allocation of datapath resources
    Patent number: 8321712
    Abstract: There is provided a system and methods for segmenting datapath resources such as reorder buffers, physical registers, instruction queues and load-store queues, etc. in a microprocessor so that their size may be dynamically expanded and contracted. This is accomplished by allocating and deallocating individual resource units to each resource based on sampled estimates of the instantaneous resource needs of the program running on the microprocessor. By keeping unused datapath resources to a minimum, power and energy savings are achieved by shutting off resource units that are not needed for sustaining the performance requirements of the running program. Leakage energy and switching energy and power are reduced using the described methods.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: November 27, 2012
    Assignee: The Research Foundation of State University of New York
    Inventor: Kanad Ghose
  • Semiconductor device having a threshold voltage control function
    Patent number: 8321711
    Abstract: The invention provides a semiconductor device that power is stabilized by suppressing power consumption as much as possible. The semiconductor device of the invention includes a logic portion and a memory portion each including a plurality of transistors, a detecting portion for detecting one or both of operation frequencies of the logic portion and the memory portion, a Vth control for supplying a Vth control signal to one or both of the logic portion and the memory portion, and an antenna. Each of the plurality of transistors has a first gate electrode which is input with a logic signal, a second gate electrode which is input with the Vth control signal, and a semiconductor film such that the second gate electrode, the semiconductor film, and the first gate electrode are provided in this order from the bottom.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Jun Koyama
  • Powered device classification in a wired data telecommunications network
    Patent number: 8316223
    Abstract: In a wired data telecommunication network power sourcing equipment (PSE) coupled to a powered device (PD) carries out an inline power discovery process to verify that the PD is adapted to receive inline power, then a plurality of classification cycles are carried out to convey a series of inline power classes back to the PSE. The series of inline power classes may all be the same, in which case the PD is legacy equipment and is adapted to receive the power level corresponding to that class. If they are not all the same, information is thus conveyed to the PSE which may, for example, correspond to a specific power level to be applied or to other information.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: November 20, 2012
    Assignee: Cisco Technology, Inc.
    Inventors: Roger A. Karam, John F. Wakerly
  • Power management for systems on a chip
    Patent number: 8312305
    Abstract: A system for controlling a multitasking microprocessor system includes an interconnect, a plurality of processing units connected to the interconnect forming a single-source, single-sink flow network, wherein the plurality of processing units pass data between one another from the single-source to the single-sink, and a monitor connected to the interconnect for monitoring a portion of a resource consumed by each of the plurality of processing units and for controlling the plurality of processing units according to a predetermined budget for the resource to control a data overflow condition, wherein the monitor controls performance and power modes of the plurality of processing units.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Chen Yong Cher, Tejas S. Karkhanis, Srinivasan Ramani
  • Secondary power utilization during peak power times
    Patent number: 8301921
    Abstract: The invention generally relates to the utilization of electric power, and more particularly to systems and methods for selectively utilizing secondary power sources during peak power times. A method includes receiving a notification of a peak power time, and discontinuing use of a primary power supply and beginning use of a secondary power supply based upon the notification.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Kenneth J. Goodnow, Stephen G. Shuma, Peter A. Twombly
  • Method and system to enable fast platform restart
    Patent number: 8296553
    Abstract: A method and system to perform a fast reset or restart of a platform by minimizing the hardware initialization of IO devices in the platform during a restart of the platform. The basic input/output system (BIOS) of the platform traps any software initiated reset request (SIRR) or warm reset. The BIOS restores the input/output (IO) devices coupled with the platform to their previous hardware state to avoid the full platform initialization when the SIRR is trapped. The restart of the platform can be performed in a fast manner as the full platform initialization is minimized.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: October 23, 2012
    Assignee: Intel Corporation
    Inventors: Barnes Cooper, Faraz A. Siddiqi, Michael R. Rothman, Vincent J. Zimmer
  • System embedding plural controller sharing nonvolatile memory
    Patent number: 8291211
    Abstract: An embedded memory card system includes a first CPU, a second CPU, a nonvolatile memory storing data, and a device busy state machine selecting one of the first CPU and the second CPU to access the nonvolatile memory. The nonvolatile memory is accessed by the one of the first CPU and the second CPU selected by the device busy state machine.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: October 16, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-Up Choi
  • Storage medium storing master boot record, computer system having the same and booting method of the computer system
    Patent number: 8285978
    Abstract: A storage medium storing a master boot record, a computer system having the same, and a booting method of the computer system, the storage medium including: a first sector to store a first master boot record including an execution code for grasping command information and implementing a preset control according to the command information; a first data storage region to store a first data file for booting; a second sector to store a second master boot record to implement booting based on the first data file; a second data storage region to store a second data file for booting; and a third sector to store a third master boot record to implement booting based on the second data file.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: October 9, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Deok-rae Kim, Keon-young Cho, Kyung-young Kim, Seung-lee Nam