Patents Examined by Dieu-Minh T. Le
  • Patent number: 10540218
    Abstract: A processor system includes an application processor, which has a processor core and hardware performance counters, and a monitoring processor, which is coupled to the application processor by a data transmission interface. The monitoring processor has a look-up table, in which target performance profiles of the progression over time of performance events of the hardware performance counters are stored for an application which is to be executed on the application processor and monitored. The monitoring processor has an evaluating logic which is linked to the look-up table and is configured to record the progression over time of performance events of the hardware performance counters during the execution of the application to be monitored on the application processor and to compare the progression with the target performance profiles stored in the look-up table.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: January 21, 2020
    Assignee: Airbus Defence and Space GmbH
    Inventors: Johannes Freitag, Dietmar Geiger, Bernd Koppenhoefer, Sascha Uhrig, Max Gapp
  • Patent number: 10536306
    Abstract: Switch units control ON and OFF of communication between a master device and slave devices. Signal levels of communication lines between switch units and slave devices are maintained at a predetermined level. A switch unit in a first stage is turned on and off by a first switch control signal. A switch unit in a second stage is turned on and off by a switch control signal generated based on a level of a communication line in the first stage and the first switch control signal. A switch unit in each of subsequent stages is turned on and off by a switch control signal generated based on a level of a communication line in a preceding stage and a switch control signal in a second preceding stage. A portion of ground short circuit is identified based on states of communication between the master device and the slave devices.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: January 14, 2020
    Assignee: Ricoh Company, Ltd.
    Inventors: Takuya Kemmochi, Junichi Shimoda, Kazushi Takei, Tomohide Kondoh, Tetsuya Hara
  • Patent number: 10521326
    Abstract: A system and method for analyzing big data activities are disclosed. According to one embodiment, a system comprises a distributed file system for the entities and applications, wherein the applications include one or more of script applications, structured query language (SQL) applications, Not Only (NO) SQL applications, stream applications, search applications, and in-memory applications. The system further comprises a data processing platform that gathers, analyzes, and stores data relating to entities and applications. The data processing platform includes an application manager having one or more of a MapReduce Manage, a script applications manager, a structured query language (SQL) applications manager, a Not Only (NO) SQL applications manager, a stream applications manager, a search applications manager, and an in-memory applications manager. The application manager identifies if the applications are one or more of slow-running, failed, killed, unpredictable, and malfunctioning.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: December 31, 2019
    Assignee: Unravel Data Systems, Inc.
    Inventors: Shivnath Babu, Kunal Agarwal
  • Patent number: 10509637
    Abstract: A system for package management includes an interface and a processor. The interface is to receive an indication to install a package. The processor is to determine a configured package using a set local configuration properties and using the package and to launch, using a metascheduler, a set of sub schedulers to install a plurality of applications of the configured package.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: December 17, 2019
    Assignee: Mesosphere, Inc.
    Inventors: Connor Patric Doyle, Thomas Rampelberg, Cody Maloney, José Armando García Sancio
  • Patent number: 10509711
    Abstract: A microcontroller includes a signal interface for transmitting signals. The microcontroller further includes an error injection module. The error injection module is configured to tap a transmission signal associated with the signal interface. The error injection module includes a synchronization unit. The synchronization unit is configured to detect within the tapped transmission signal an occurrence of a synchronization event. Further, the error injection module is configured to modify the tapped transmission signal by adding at least one disturbance to the transmission signal in synchronization with at least the detected occurrence of the synchronization event.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: December 17, 2019
    Assignee: Infineon Technologies AG
    Inventors: Jayakrishna Guddeti, Deepa Chandran, Shivaprasad Sadashivaiah
  • Patent number: 10503590
    Abstract: The invention relates to a storage system comprising one or more storage controllers, two or more storage devices and two or more storage clients, the storage controllers, the storage devices and the storage clients being coupled via a network in order to exchange information between the storage controllers, said storage devices and said storage clients, wherein each storage client is adapted to provide data-path-storage commands to the storage devices via the network bypassing the storage controllers, wherein the storage system is adapted to provide data redundancy using a data redundancy scheme higher than RAID 1.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: December 10, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ioannis Koltsidas, Nikolas Ioannou, Robert Haas, Charalampos Pozidis, Thomas D. Weigold, Thomas P. Parnell
  • Patent number: 10503574
    Abstract: Systems and methods are validating data in a data set. A data set including data to validate and a validator to use in validating the data is selected based on user input generated based on interactions of a user with a graphical user interface. The validator is applied to the data to determine whether one or more statistics generated through application of the validator to the data is valid or invalid based on a validation routine associated with the validator. A data quality report indicating whether the data set is valid or invalid, based on a determination of whether the one or more statistics is valid or invalid, is generated and selectively presented to the user through the graphical user interface.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: December 10, 2019
    Assignee: Palantir Technologies Inc.
    Inventors: David Lisuk, Guodong Xu, Luis Voloch, Matthew Elkherj
  • Patent number: 10498820
    Abstract: The present invention relates to a data storage and retrieval system. The system includes a at least one client device; and at least one-server. The server includes at least one memory, a processor and a log store. The client data is divided into different blocks and stored in the server. Different logs are generated for each block and stored in the log store. The storage in the server are audited for ensuring their integrity. The present invention also relates to a method used to store and retrieve data form the above system. The present invention also relates to a method used to initialize empty buffers in a storage of a system.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: December 3, 2019
    Assignee: KOC UNIVERSITY
    Inventors: Alptekin Kupcu, Mohammad Etemad
  • Patent number: 10489237
    Abstract: In one example, a processor may include a processor core with a central processing unit as well as a processor cache separate from the processor core. The processor may also include flushing circuitry. The flushing circuitry may identify a power loss event for the processor. In response, the flushing circuitry may selectively power the processor by providing power to the processor cache but not to the processor core. The flushing circuitry may further flush data content of the processor cache to a non-volatile memory separate from the processor.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 26, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: David Engler, Mark Kapoor, Patrick Raymond
  • Patent number: 10489067
    Abstract: An information storage circuit having a first memory portion configured to store a first validity bit and first data; a second memory portion configured to store a second validity bit and second data; and a subcircuit configured to: write the first data to the first memory portion and the second data to the second memory portion sequentially; and set the first and second validity bits to indicate which of the first data and second data is valid.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: November 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Mihai-Alexandru Ionescu, Christoph Schroers, Davide Cassata, Hubert Fischer, Wolfgang Horn, Razvan-Catalin Mialtu, Radu Mihaescu
  • Patent number: 10482069
    Abstract: An embodiment of the present invention is directed to a version control adaptive architecture platform. The system comprises: a global load balancer that receives a read/write request from a user, the request comprising a URL, and determines a corresponding front-end web proxy server; a Proxy server that receives the request and using the URL, accesses a lookup table to determine a specific storage component and Subversion (SVN) server to route the request; and a plurality of SVN servers, where a SVN server, identified by the Proxy server, processes the request and returns a result to the user, wherein the SVN server has a corresponding Disaster Recovery (DR) server that monitors live data processed by the SVN server for failover mode upon detection of a failover event where the SVN server automatically reroutes traffic to the corresponding DR server.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: November 19, 2019
    Assignee: JPMorgan Chase Bank, N.A.
    Inventors: James Todd Barnes, Farhan Ahmed, Willie L. Brown, Jr., Stephan W. Terry
  • Patent number: 10469208
    Abstract: Methods and apparatus utilize hybrid automatic repeat request (HARQ) transmissions and retransmissions that are usable on multiple carriers, i.e. joint HARQ processes. For example, a downlink (DL) shared channel transmission of a joint HARQ process is received on one of the carriers. A first part of an identity of the joint HARQ process is determined by using HARQ process identity data received on a shared control channel. A second part of the joint HARQ process identity is determined using additional information. The joint HARQ process identity is then determined by combining the first part and the second part. A WTRU is provided that is configured to receive the DL shared channel and to make the aforementioned determinations. A variety of other methods and apparatus configurations are disclosed for utilizing joint HARQ processes, in particular in the context of DC-HSDPA.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: November 5, 2019
    Assignee: InterDigital Patent Holdings, Inc.
    Inventors: Philip J. Pietraski, Benoit Pelletier, Diana Pani, Paul Marinier, In H. Kim, Christopher R. Cave, Jean-Louis Gauvreau
  • Patent number: 10461886
    Abstract: In one embodiment, a method comprises: detecting, by a transport layer executed by a processor circuit in an apparatus, a request message received via a non-deterministic data link from one of a plurality of deterministic network interface circuits, the request message for a transport layer packet having been stored in a buffer circuit storing a plurality of transport layer packets in the apparatus, the deterministic network interface circuits providing respective deterministic links for deterministic transmission of the transport layer packets in a deterministic data network, the request message specifying a first number identifying any missed transmission opportunities on the corresponding deterministic link; determining, by the transport layer, a cause of failure in one or more of the missed transmission opportunities; and selectively executing, by the transport layer based on determining the cause of failure, a corrective action for preventing an increase in latency of the transport layer packets.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: October 29, 2019
    Inventors: Pascal Thubert, Eric Michel Levy-Abegnoli, Patrick Wetterwald
  • Patent number: 10452465
    Abstract: In order to provide effective diagnostics and logging of error messages produced during the execution of processes across multiple components, systems and methods are disclosed for the generating, managing, and processing centralized logs containing those error messages. In particular, the components may write error messages to a centralized log instead of writing the error messages to local log files. These error messages may include exception messages and diagnostics messages. These various error messages in the centralized log can be read, identified, and organized. Furthermore, enrichments and/or analytics may be applied to the error messages based on information from a knowledge source or the application of one or more machine learning models. The organized error messages, enrichments, and analytics can be stored in an output log that can be easily retrieved and viewed through a graphical interface.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: October 22, 2019
    Assignee: Oracle International Corporation
    Inventors: Nitin Handa, Rohit Soni
  • Patent number: 10445203
    Abstract: According to one or more aspects of the present disclosure, operations may include activating testing software of a digital signal processing system instead of activating operating software of the digital signal processing system. The testing software may be configured to, while activated, perform linear operations with respect to signals that traverse the signal path. The operating software may be configured to, while activated, perform non-linear operations with respect to signals that traverse the signal path. The testing software may be activated during testing of one or more hardware elements of the signal path that are configured to perform analog operations on signals that traverse the signal path.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: October 15, 2019
    Assignee: Sorenson IP Holdings, LLC
    Inventor: Jeffrey Bullough
  • Patent number: 10437703
    Abstract: The present arrangements relate to analyzing a software error. At least one dump file created in response to a crash of software executing on a processing system can be accessed. Based on the dump file, a base version of at least one software module that was loaded when the crash occurred can be identified. Based on the dump file, maintenance that has been applied to the at least one software module also can be identified. A report recommending new corrective maintenance to be applied to the at least one software module can be generated.
    Type: Grant
    Filed: January 2, 2017
    Date of Patent: October 8, 2019
    Inventors: Samuel J. Smith, Mark A. Woolley, Andrew Wright
  • Patent number: 10430307
    Abstract: A method for announcing impending critical events within a distributed storage environment is disclosed. In one embodiment, such a method analyzes, at a storage system, status of various storage system components to predict an impending critical event to occur at the storage system. Predicting the critical event may include calculating an amount of time before occurrence of the impending critical event. The method then communicates, from the storage system to a host system, over an in-band communication channel used to carry I/O traffic between the host system and the storage system, one or more of the impending critical event and the amount of time. This will ideally enable the host system to take mitigating actions before the critical event occurs. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: February 5, 2017
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Michael Green, Harry R. McGregor, Christopher B. Moore, Charles B. Theis
  • Patent number: 10423504
    Abstract: A transmitting computer for a vehicle is disclosed, and includes a command circuit, a monitor circuit, and a master circuit. The command circuit receives a real-time signal and executes a first set of instructions to analyze the real-time signal, and generates a plurality of command signals based on executing the first set of instructions. The monitor circuit receives the command signals and the real-time signal. The monitor circuit executes a second set of instructions to analyze the real-time signal and generates a plurality of replica signals based on executing the second set of instructions. The monitor circuit generates an initial reset command in response to determining an initial miscompare between one of the plurality of command signals and the plurality of replica signals. The master circuit is in communication with both the command circuit and the monitor circuit and receives an indication that the initial reset command is generated.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: September 24, 2019
    Assignee: The Boeing Company
    Inventor: Alexander Shyon Babazadeh
  • Patent number: 10409683
    Abstract: A data storage system configured to perform a data rebuild operation via a reduced number of read requests includes a host and a redundant array of independent disks (RAID) device including a plurality of data storage devices. When the host receives data of a first region and data of a second region of a read-requested region of each of the data storage devices in response to a rebuild request, the host receives failed address list information of the second region. The first region is a normal region, and the second region is a faulty region. The host rebuilds the data of the second region based on the failed address list information.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: September 10, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Seok Ko, Hyun-Jung Shin, Jeong-Uk Kang, Ji-Hyung Park
  • Patent number: 10402250
    Abstract: A digital signage including a memory; a display; and a controller configured to display content on the display, capture a plurality of images of the displaced content, store the plurality of captured images in the memory, and display the stored images on the display in response to an error event signal.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: September 3, 2019
    Inventors: Seunghun Lee, Youngran Kim