Patents Examined by Dion Ferguson
  • Patent number: 10636573
    Abstract: A device and its method of manufacture, the device configured for providing electrical energy storage of high specific energy density. The device contains one or more layers of high dielectric constant material, such as Barium Titanate or Hexagonal Barium Titanate, sandwiched between electrode layers made up of one or more of a variety of possible conducting materials. The device includes one or more electrically insulating layers including carbon, such as carbon formed into diamond or a diamond-like arrangement, for insulating the electrode(s) from the dielectric layer(s) to provide for very high breakdown voltages with good heat conductivity. The layers can be created by a variety of methods including laser deposition, and assembled to form a capacitor device provides the high energy density storage.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: April 28, 2020
    Inventors: Barbara Stuart, Stephen L Cunningham
  • Patent number: 10629383
    Abstract: A solid electrolytic capacitor that includes a capacitor element having a linear through conductor made of a valve function metal, a dielectric layer disposed on the through conductor, and a cathode-side functional layer disposed on the dielectric layer. The through conductor includes a core portion and a porous portion covering a peripheral surface of the core portion. Both end faces of the core portion of the through conductor are in contact with a pair of anode terminals on the pair of end faces of the body, respectively. A cathode terminal is electrically connected to the cathode-side functional layer.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: April 21, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tomoki Nobuta, Kazumasa Fujimoto, Osamu Yokokura
  • Patent number: 10622150
    Abstract: An element body of a rectangular parallelepiped shape includes first and second principal surfaces opposing each other in a first direction, a pair of side surfaces opposing each other in a second direction, and a pair of end surfaces opposing each other in a third direction. An external electrode disposed at an end portion of the element body in the third direction. The external electrode includes a first conductive resin layer and a second conductive resin layer. The first conductive resin layer continuously covers one part of the first principal surface, one part of the end surface, and one part of each of the pair of side surfaces. The second conductive resin layer is separated from the first conductive resin layer, and continuously covers one part of the second principal surface, one part of the end surface, and one part of each of the pair of side surfaces.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: April 14, 2020
    Assignee: TDK CORPORATION
    Inventors: Shinya Onodera, Takehisa Tamura, Atsushi Takeda, Ken Morita
  • Patent number: 10622152
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction and has a porosity of 1% or less.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: April 14, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Toshimitsu Kogure, Joji Kobayashi, Yasunari Kato, Yosuke Sato, Tetsuhiko Fukuoka, Ryo Ono
  • Patent number: 10607778
    Abstract: A ceramic electronic device includes multiple chip components and a pair of metal terminal portions. The chip components consist of a pair of chip end surfaces and four chip side surfaces. Terminal electrodes are formed on the pair of chip end surfaces. The pair of metal terminal portions is arranged correspondingly with the pair of chip end surfaces. Each of the pair of metal terminal portions includes an electrode face portion, a pair of engagement arm portions, and a mount portion. The electrode face portion faces the chip end surface. The pair of engagement arm portions sandwich and hold the chip component. The mount portion extends from one of terminal second sides toward the chip component and is partially substantially vertical to the electrode face portion. The electrode face portion has a slit.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: March 31, 2020
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Katsumi Kobayashi, Sunao Masuda, Masahiro Mori, Kayou Matsunaga, Kosuke Yazawa
  • Patent number: 10607782
    Abstract: A ceramic electronic device includes: a ceramic main body that has at least two edge faces facing each other, has an internal electrode layer inside thereof and has a parallelepiped shape; and external electrodes formed on the two edge faces, wherein: the external electrodes have at least a plated layer; an oxide film of a metal for plating of the plated layer on a region that is a part of at least one of four side faces of the ceramic main body other than the two edge faces, the region not being covered with the external electrodes; and a ratio of (a peak area of an oxide of the metal for plating)/(a peak area of the metal for plating) is 13.1 or more in a photoelectron spectrum of an outermost surface of the oxide film.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: March 31, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Kenji Takashima
  • Patent number: 10600567
    Abstract: A multilayer ceramic capacitor includes a capacitor body and first to fourth outer connectors. The capacitor body includes dielectric layers and conductor layers, first and second principal surfaces facing each other in a height direction, first and second side surfaces facing each other in a length direction, and third and fourth side surfaces facing each other in a width direction. The first to fourth outer connectors cover portions of the first to fourth side surfaces, respectively. In a case where L0, W0, and H0 are maximum external dimensions of the multilayer ceramic capacitor in the length direction, the width direction, and the height direction, respectively, L0, W0, and H0 satisfy a condition of about 2.67?L0/H0 and a condition of about 1/1.72?L0/W0?about 1.72.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 24, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yasuo Fujii
  • Patent number: 10600570
    Abstract: An element body of a rectangular parallelepiped shape includes a first principal surface arranged to constitute a mounting surface, a second principal surface opposing the first principal surface in a first direction, a pair of side surfaces opposing each other in a second direction, and a pair of end surfaces opposing each other in a third direction. An external electrode is disposed at an end portion of the element body in the third direction. The external electrode includes a conductive resin layer. The external electrode includes a plating layer including a first portion covering the first principal surface and a pair of second portions covering the pair of side surfaces. A thickness of the first portion is smaller than each thickness of the pair of second portions.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: March 24, 2020
    Assignee: TDK CORPORATION
    Inventors: Shinya Onodera, Takehisa Tamura, Atsushi Takeda, Ken Morita
  • Patent number: 10600573
    Abstract: A capacitor component includes a body in which a dielectric layer and an internal electrode are alternately stacked, and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a composite layer including a dielectric material powder and a metallic particle and first and second protective layers including a dielectric material powder and spaced apart by the composite layer. A thickness of each of the first and second protective layers is equal to or greater than ? of a thickness of the dielectric layer.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: March 24, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Soon Kwon, Hyoung Uk Kim, Tae Young Ham, Jong Han Kim, Ki Myoung Yun, Jae Sung Park
  • Patent number: 10593475
    Abstract: A multi-layer ceramic capacitor includes: a ceramic body that includes a plurality of ceramic layers laminated in one axial direction and includes polycrystal having a Perovskite structure as a main phase, the Perovskite structure containing calcium and zirconium and being expressed by a general expression ABO3, the polycrystal containing silicon, boron, and lithium; first and second internal electrodes alternately disposed between the ceramic layers; a first external electrode provided on an outer surface of the ceramic body and connected to the first internal electrodes; and a second external electrode provided on the outer surface of the ceramic body and connected to the second internal electrodes, the multi-layer ceramic capacitor satisfying 0.2858V+0.4371?CLi?0.1306V+3.0391, where V (mm3) represents a volume of the ceramic body, and CLi (atm %) represents a concentration of the lithium when a concentration of a B-site element of the main phase of the polycrystal is 100 atm %.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: March 17, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Norihiro Arai, Katsuo Sakatsume, Takeshi Nosaki, Masumi Ishii, Joji Ariga
  • Patent number: 10593479
    Abstract: In an exemplary embodiment, each of external electrodes 12 of a multilayer ceramic capacitor 10 continuously has a first planar part 12a present on each end face of a capacitor body 11 in a first direction d1, a second planar part 12b present on one end face of the capacitor body 11 in a third direction d3, and auxiliary planar parts 12c present on both end faces of the capacitor body 11 in a second direction d2. A maximum third-direction dimension D3 [12c] of each of the auxiliary planar parts 12c is smaller than a third-direction dimension D3 [12a] of the first planar part 12a, while a first-direction dimension D1 [12c] of each of the auxiliary planar parts 12c is smaller than a first-direction dimension D1 [12b] of the second planar part 12b.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: March 17, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Takashi Sasaki
  • Patent number: 10595410
    Abstract: Embodiments are generally directed to non-planar on-package via capacitor. An embodiment of an embedded capacitor includes a first plate that is formed in a package via; a dielectric layer that is applied on the first plate; and a second plate that is formed in a cavity in the dielectric layer, wherein the first plate and the second plate are non-planar plates.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: March 17, 2020
    Assignee: Intel Corporation
    Inventors: Fay Hua, Brandon M. Rawlings, Georgios C. Dogiamis, Telesphor Kamgaing
  • Patent number: 10586651
    Abstract: Disclosed is a method for the manufacture of a multilayer structure comprising a first layer, a second layer and a third layer for example to form a capacitor. The multilayer structure comprises a first layer, a second layer and a third layer, wherein the first layer and the third layer each form at least one of at least two electrodes and comprise one or more pyrolyzed carbon nanomembranes or one or more layers of graphene, and the second layer is a dielectric comprising one or more carbon nanomembranes.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: March 10, 2020
    Assignee: CNM TECHNOLOGIES GMBH
    Inventors: Armin Goelzhaeuser, Andre' Beyer, Paul Penner, Xianghui Zhang
  • Patent number: 10569330
    Abstract: The present invention provides various passive electronic components comprising a layer of coated particles, and methods for producing and using the same. Some of the passive electronic components of the invention include, but are not limited to conductors, resistors, current collectors, capacitors, piezoelectronic devices, inductors and transformers. The present invention also provides energy storage devices and electrode layers for such energy storage devices having passive, electrically-conductive particles coated with one or more thin film materials.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: February 25, 2020
    Assignee: FORGE NANO, INC.
    Inventors: David M. King, Paul Lichty
  • Patent number: 10563318
    Abstract: An electrolytic capacitor includes an anode body having a dielectric layer; a solid electrolyte layer in contact with the dielectric layer of the anode body; and an electrolyte solution. The solid electrolyte layer includes a ?-conjugated conductive polymer. The electrolyte solution contains a solvent and a solute, and the solvent contains a glycol compound and a sulfone compound. A proportion of the glycol compound contained in the solvent is 10% by mass or more. A proportion of the sulfone compound contained in the solvent is 30% by mass or more. A total proportion of the glycol compound and the sulfone compound contained in the solvent is 70% by mass or more.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: February 18, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuichiro Tsubaki, Tatsuji Aoyama, Kazuyo Saito
  • Patent number: 10568196
    Abstract: A compact particle accelerator can include two or more cavities disposed along an axis of the particle accelerator, each of which is coupled to two or more drivers. The accelerator can also include a power supply coupled to the two or more drivers such that a particle beam traveling along the axis is accelerated. The power supply can be an interface with a commercial power outlet, battery power, or a combination thereof depending upon the use case. Example configurations of the accelerator include hand held or mobile devices that are capable of delivering up to and greater than a 1 MeV electron beam.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: February 18, 2020
    Assignee: TRIAD NATIONAL SECURITY, LLC
    Inventors: Dinh Nguyen, Cynthia Buechler, Gregory Dale, John Lewellen
  • Patent number: 10566136
    Abstract: Some embodiments include a capacitor. The capacitor has a first electrode with a lower pillar portion, and with an upper container portion over the lower pillar portion. The lower pillar portion has an outer surface. The upper container portion has an inner surface and an outer surface. Dielectric material lines the inner and outer surfaces of the upper container portion, and lines the outer surface of the lower pillar portion. A second electrode extends along the inner and outer surfaces of the upper container portion, and along the outer surface of the lower pillar portion. The second electrode is spaced from the first electrode by the dielectric material. Some embodiments include assemblies (e.g., memory arrays) which have capacitors. Some embodiments include methods of forming capacitors.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: February 18, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Kuo-Chen Wang, Hiroshi Amaike, Kota Hattori
  • Patent number: 10565974
    Abstract: An apparatus includes a housing, one or more storage drives, one or more fans, and one or more acoustic barriers. The housing includes a bottom side bounded by a front side, a back side, a first side, and a second side opposite the first side. The housing may further include a top cover removably attached to the housing. The storage drives may be disposed within the housing at a first location. The fans may be disposed within the housing at a second location spaced from the first location. The fans may generate a flow of air through the housing, while simultaneously generating sound waves that travel throughout the housing. The acoustic barriers may be disposed between the storage drives and the fans, and configured to attenuate the sounds waves prior to the sound waves reaching the storage drives in order to reduce the throughput performance degradation of the drives.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: February 18, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Rakesh Bhatia, Daniel Bernard Hruska, Mark Hong Chen, Bradley Ray Rentfrow
  • Patent number: 10560615
    Abstract: There is provided an electronic apparatus that includes a housing. A control circuit is provided inside the housing, a battery is provided inside the housing, a heat storage material is provided between the control circuit and the battery inside the housing, and a gap is provided between the control circuit and the battery.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: February 11, 2020
    Assignee: SONY CORPORATION
    Inventors: Yuichi Ishida, Taiki Sugiyama, Takashi Oishi, Kazuhiko Suzuki
  • Patent number: 10553399
    Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to set parameters to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF period, and to assist in the re-striking of the bottom plasma during the ON period.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: February 4, 2020
    Assignee: Lam Research Corporation
    Inventors: Alexei Marakhtanov, Rajinder Dhindsa, Eric Hudson, Andrew D. Bailey, III