Abstract: Incompatible graphics frameworks present a barrier to emulating applications of one operating system (guest OS) upon a computer system employing a different operating system (host OS) such as occurs with virtual machines. Accordingly, in order to address limitations of emulating guest OS graphic pipelines upon the host OS the inventors have established methodologies for cross-platform graphics pipeline emulation, thus enabling efficient implementations of cross-platform virtualization solutions, through the establishment of emulation keys to support generic and specific graphics pipelines together with caching sets of graphical pipelines for subsequent retrieval and execution.

Abstract: An information processing apparatus creates a first virtual object expressing a physical object that is detected from physical object information obtained from a physical object information acquisition unit. The information processing apparatus determines a display state of the first virtual object in accordance with a result of detecting collision between the first virtual object and a second virtual object. The information processing apparatus creates, on the basis of a virtual space including the first virtual object and the second virtual object, position-orientation of an HMD, the determined display state, and a physical space image obtained from the HMD, a mixed reality image in combination of an image of the virtual space and the physical space image, and displays the created mixed reality image on the HMD.

Abstract: This disclosure relates generally to method and system for tuning graphics processing unit (GPU) parameters of a GPU kernel. The disclosure proposes a combination of both heuristic and deterministic techniques for tuning GPU parameters of a GPU kernel to achieve optimal configuration of the GPU parameters. The proposed method and a system for tuning GPU parameters is based on deterministic techniques and heuristic techniques that includes capturing behavior of the GPU application by monitoring several GPU hardware counters that comprise several hardware resources and performance counters. The proposed tuning GPU parameters also implements a set of heuristic techniques to decide course of the tuning for various GPU parameters based on the captured behaviour of the GPU hardware counters.

Abstract: Aspects of this disclosure provide techniques for generating a viseme and corresponding intensity pair. In some embodiments, the method includes generating, by a server, a viseme and corresponding intensity pair based at least on one of a clean vocal track or corresponding transcription. The method may include generating, by the server, a compressed audio file based at least on one of the viseme, the corresponding intensity, music, or visual offset. The method may further include generating, by the server or a client end application, a buffer of raw pulse-code modulated (PCM) data based on decoding at least a part of the compressed audio file, where the viseme is scheduled to align with a corresponding phoneme.

Abstract: In various examples, transmittance may be computed using a power-series expansion of an exponential integral of a density function. A term of the power-series expansion may be evaluated as a combination of values of the term for different orderings of samples in the power-series expansion. A sample may be computed from a combination of values at spaced intervals along the function and a discontinuity may be compensated for based at least on determining a version of the function that includes an alignment of a first point with a second point of the function. Rather than arbitrarily or manually selecting a pivot used to expand the power-series, the pivot may be computed as an average of values of the function. The transmittance estimation may be computed from the power-series expansion using a value used to compute the pivot (for a biased estimate) or using all different values (for an unbiased estimate).

Abstract: An information processing apparatus creates a first virtual object expressing a physical object that is detected from physical object information obtained from a physical object information acquisition unit. The information processing apparatus determines a display state of the first virtual object in accordance with a result of detecting collision between the first virtual object and a second virtual object. The information processing apparatus creates, on the basis of a virtual space including the first virtual object and the second virtual object, position-orientation of an HMD, the determined display state, and a physical space image obtained from the HMD, a mixed reality image in combination of an image of the virtual space and the physical space image, and displays the created mixed reality image on the HMD.

Abstract: The present disclosure provides a tessellation data processing method, system, medium and vector graphics processing device. The method includes: constructing a data structure including a content table and information tables in memory; when a vector line generated by tessellation intersects an horizontal/vertical line to obtain a new intersection, reading an address and number of Xnodes or Ynodes of an information table in the content table corresponding to a row/column corresponding to the Y/X coordinate of the intersection; according to the address of the information table and the number of X/Ynodes of the information table, reading corresponding X/Ynodes from the memory; comparing information of the intersection with the X/Ynodes, and updating the X/Ynodes in the information table, or adding an X/Ynode to the information table at a position corresponding to the Y/X coordinates.

Abstract: Embodiments are generally directed to a system and method for adapting executable object to a processing unit. An embodiment of a method to adapt an executable object from a first processing unit to a second processing unit, comprises: adapting the executable object optimized for the first processing unit of a first architecture, to the second processing unit of a second architecture, wherein the second architecture is different from the first architecture, wherein the executable object is adapted to perform on the second processing unit based on a plurality of performance metrics collected while the executable object is performed on the first processing unit and the second processing unit.

Abstract: A mechanism is described for facilitating dynamic merging of atomic operations in computing devices. A method of embodiments, as described herein, includes facilitating detecting atomic messages and a plurality of slot addresses. The method further includes comparing one or more slot addresses of the plurality of slot addresses with other slot addresses of the plurality of slot addresses to seek one or more matched slot addresses, where the one or more matched slot addresses are merged into one or more merged groups. The method may further include generating one or more merged atomic operations based on and corresponding to the one or more merged groups.

Abstract: A method of casting a source device display screen to a target device includes, by an application on the source device, storing information about the target device in a shared memory and issuing a request to an operating system to initiate capturing and casting for the source device display screen. The operating system responds to the request by launching a casting extension and supplying a content stream containing content of the source device display screen. Upon being launched, the casting extension (1) obtains the information about the target device from the shared memory and uses the information to establish a display connection with the target device, and (2) forwards the content stream to the target device on the display connection.

Abstract: An apparatus and method for managing pipes and planes within a virtual graphics processing engine. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising one or more display pipes to render one or more display planes, each of the one or more display pipes comprising a set of graphics processing hardware resources for executing graphics commands and rendering graphics images in the one or more display planes; and pipe and plane management hardware logic to manage pipe and plane assignment, the pipe and plane management hardware logic to associate a first virtual machine (VM) with one or more virtual display planes and to maintain a mapping between the one or more virtual display planes and at least one physical display plane.

Abstract: Techniques are disclosed relating to dynamically adjusting buffering for distributing compute work in a graphics processor. In some embodiments, the graphics processor includes shader circuitry configured to process compute work from a compute kernel, multiple distributed workload parser circuits configured to send compute work to the shader circuitry, primary workload parser circuitry configured to send, via a communications fabric, compute work from the compute kernel to the distributed workload parser circuits, and buffer circuitry configured to buffer compute work received by one or more of the distributed workload parser circuits from the primary workload parser circuitry. In some embodiments, the graphics processor is configured to dynamically adjust a limit on the number of entries used in the buffer circuitry based on information indicating complexity of the compute kernel. This may advantageously maintain launch rates while reducing or avoiding workload imbalances, in some embodiments.

Abstract: An electronic device includes: a host configured to output image data and a timing control signal in response to an image intended to be displayed; a display driver IC coupled to the host through a first interface and a second interface and configured to output a data signal based on the image data; and a display configured to display an image based on the data signal, wherein the host is configured to output the image data and the timing control signal through any one of the first interface and the second interface depending on a display mode.

Abstract: The present teaching relates to method, system, medium, and implementations for data transfer in LED display. A signal signaling a timing for a next data transfer is received. In response to the signal, a next data transfer instruction is obtained that instructs reading a bit-based image block of an image from a memory. The bit-based image block is transferred, according to the next data transfer instruction, from the memory via a bus connected thereto, to one of a pair of alternate buffers pointed to by a write buffer pointer. Then, the write buffer pointer is toggled to point to another of the pair of alternate buffers and the process repeats. The bit-based image blocks alternately stored in the buffers are later retrieved and displayed on the LED display.

Abstract: A display device of a dialysis machine for displaying various parameters containing a quantity of patient-related treatment parameters and a quantity of clinic-related CIS parameters. The display device has one display and an input unit to individually modify the quantity of patient-related treatment parameters or the quantity of clinic-related CIS parameters. The display includes a display area divided into a first display panel and a second display panel. The display can be switched to a treatment configuration in which the quantity of patient-related treatment parameters is displayed exclusively in the first display panel and the quantity of clinic-related CIS parameters is displayed exclusively in the second display panel. The display can also be switched to a CIS configuration in which the quantity of patient-related treatment parameters is displayed exclusively in the second display panel and the quantity of clinic-related CIS parameters is displayed exclusively in the first display panel.

Abstract: Methods and apparatus for image processing of spherical content via hardware acceleration components. In one embodiment, an EAC image is subdivided into facets via existing software addressing and written into the memory buffers (normally used for rectilinear cubemaps) in a graphics processing unit (GPU). The EAC facets may be translated, rotated, and/or mirrored so as to align with the expected three-dimensional (3D) coordinate space. The GPU may use existing hardware accelerator logic, parallelization, and/or addressing logic to greatly improve 3D image processing effects (such as a multi-band blend using Gaussian blurs.

Abstract: A maintenance work support system comprising: a database in which support information for supporting maintenance work is registered; a camera-image acquisition unit configured to acquire a camera-image imaged by a camera that is mounted on a terminal possessed by a worker performing the maintenance work; a position/attitude estimation unit configured to estimate a position and attitude of the terminal based on information that is obtained by at least one device mounted on the terminal; a target recognition unit configured to recognize a target of the maintenance work depicted in the camera-image; and a superimposed display unit configured to perform display processing in such a manner that the support information corresponding to the target acquired from the database is superimposed on least part of an image of the target visually recognized by the worker.

Abstract: There is provided information processing apparatuses, information processing methods, programs, and information processing systems capable of reinforcing the reinforcement target behavior without causing the user's consciousness. A quest is presented for urging a user to execute a reinforcement target behavior, and when the user executes the reinforcement target behavior upon the request, an electroencephalogram is measured, emotion is estimated on the basis of the electroencephalogram, and when the number of times that dominant emotion having the highest emotion score among emotion of the emotion estimation results is detected exceeds a predetermined number of times, an avatar is changed corresponding to the emotion that is detected as the dominant emotion. The present disclosure can be applied to long-term feedback technology.

Abstract: Embodiments described herein provide a graphics, media, and compute device having a tiled architecture composed of a number of tiles of smaller graphics devices. The work distribution infrastructure for such device enables the distribution of workloads across multiple tiles of the device. Work items can be submitted to any one or more of the multiple tiles, with workloads able to span multiple tiles. Additionally, upon completion of a work item, graphics, media, and/or compute engines within the device can readily acquire new work items for execution with minimal latency.

Abstract: An apparatus, method, and computer readable medium that access a frame buffer of a graphics processing unit (GPU), analyze, in the frame buffer, a frame representing displayed data, based on the analyzed frame, identify a reference patch that includes an instruction to retrieve content, generate an overlay including an augmentation layer which includes the content, superimpose the overlay onto the displayed data such that the content is viewable while a portion of the base layer is obscured, detect a user input, determine a location of the user input in the augmentation layer, associate the location in the augmentation layer with a target location in the base layer, and associate, within memory, the target location with an operation such that the user input in the augmentation layer activates an input in the base layer.