Abstract: A laptop computer and a docking station are disclosed. The laptop computer includes a microprocessor and a first video card in electrical communication with the microprocessor. The docking station includes a projector and a second video card in electrical communication with the projector. Upon a mounting of the laptop on the docking station, an electrical communication is established between the microprocessor and the second video card, and an electrical communication is established between the projector and the first video card. The microprocessor selectively provides control signals to either the first video card or the second video card. The first video card provides video signals to the projector in response to the control signals, and the second video card provides the video signals to the projector in response to the control signals. The projector provides video images in response to the video signals as received from either the first video card or the second video card.

Abstract: A chassis, in the form of a midplane design holds equipment that provides communication services. The midplane design enables cables to be attached to modules secured to the back of the midplane. The rear modules have a minimum of circuitry so as to render them the least likely to fail. The front modules house the majority of the electronics. The rear modules can route the interface signals to a card in the adjacent front slot, directly through the midplane.

Abstract: A bus bandwidth consumption profiler for measuring and reporting bus cycle utilization in a system having multiple bus masters, including master counters paired with the masters to count cycles of bus ownership, and a realtime counter to count elapsed cycles between profile events generated by either a realtime counter roll-over, or a system read signal. Upon a profile event, the counts of the master counters are simultaneously output to the system and the realtime count is determined. Alternatively, the profiler includes a total counter for counting the combined bus cycles owned by all masters, and fewer master counters than masters, each configurable to count a selected master. Upon a profile event, the counts of the master counters, the total counter, and the realtime counter are simultaneously output to the system. Accordingly, the bandwidth consumption of the selected masters and the combined, non-selected masters, can be calculated using fewer counters.

Abstract: In order to overcome the relatively short battery life and the relatively long delay between the activation and the actual functioning of a typical mobile computing system, the mobile computing system is provided with a personal computer (PC) architecture system and a personal digital assistant (PDA) architecture system, and a common display and shared peripherals. Interfacing to the systems is a super input output or embedded controller (SIO/EC) that acts as a slave device to whatever system has control of computing system. The SIO/EC controls a quick switch which blocks or allows communication along communication busses connecting the systems to the SIO/EC. A user can selectively change, by way of a user interface to the SIO/EC, to whatever system that is desired by the user.

Abstract: A bus arbitration method within a control chipset, The control chipset further comprises a first control chip and a second control chip, data are transferred between the first and the second control chips through a bus, the bus comprises a bidirectional bus The first control chip usually control the authority to use the bus, however the second control chip has higher priority to use the bus. Accompany with a bus specification without waiting cycle, to arbitrate the authority to use the bus can be done fast and without errors. Therefore, no GNT signal line is required and the arbitration time reduces.

Abstract: An apparatus and method for communicating between a controller and a message processing device over a universal serial bus (USB). The apparatus may comprise an interface having a bulk data-out endpoint for receiving a data-out packet from the controller that requests data from the device. The interface also has an interrupt-in endpoint for receiving interrupt-in packets from the controller requesting a status of the requested data from the device. When the requested data becomes available, logic at the interface transmits the status from the interrupt-in endpoint to the controller. In addition, when USB bandwidth so permits, logic at the interface also transmits the data with the status from the interrupt-in endpoint to the controller. Alternatively, where the data is not transmitted with the status, upon receiving the status the controller queries the interface at a bulk data-in endpoint for the requested data.

Abstract: The bus system has a bus and a plurality of line sections connected to the bus via respective drivers. The bus with line sections that are not needed can be interrupted at optional break points.