Abstract: First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.

Abstract: An organic light emitting diode display including a substrate, a thin film transistor on the substrate, a first electrode connected to the thin film transistor, a first layer on the first electrode, an emission layer on the first layer, a second layer on the emission layer, and a second electrode on the second layer.

Abstract: A display panel includes a plurality of unit pixels, where each of the unit pixels has a hexagonal-shape and includes: a first sub-pixel configured to emit a first color light, where the first sub-pixel has a rhombus-shape; a second sub-pixel configured to emit a second color light, where the second sub-pixel has the rhombus-shape; and a third sub-pixel configured to emit a third color light, where the third sub-pixel has the rhombus-shape, where first sub-pixels, second sub-pixels or third sub-pixels of neighboring unit pixels in a same row are arranged to adjoin each other.

Abstract: A method of forming a semiconductor device is disclosed in various embodiments. The method includes providing a substrate containing first and second device regions, and a high-k film on the substrate, depositing a metal nitride gate electrode film on the high-k film, forming a metal-containing gate electrode film on the metal nitride gate electrode film in the second device region but not in the first device region, and depositing a Si-based cap layer on the metal-containing gate electrode film in the second device region and on the metal nitride gate electrode film in the first device region.

Abstract: Magnetic memory cells include a magnetic tunnel junction and a first electrode, which is electrically coupled to the magnetic tunnel junction by a first conductive structure. This conductive structure includes a blocking layer and a seed layer, which extends between the blocking layer and the magnetic tunnel junction. The blocking layer is formed as an amorphous metal compound. In some of the embodiments, the blocking layer is a thermally treated layer and an amorphous state of the blocking layer is maintained during and post thermal treatment.

Abstract: A stretchable display device includes a stretchable substrate capable of being expanded or contracted in a first direction and pixel portions on the stretchable substrate. The pixel portions include rigid areas provided with a light emitter to selectively emit light depending on a driving signal and elastic areas surrounding the rigid areas. The pixel portions are continuously adjacent to each other in the first direction to form a plurality of pixel lines. The pixel portions included in a first pixel line and a second pixel line that are adjacent in the second direction are arranged in a zigzag form along the first direction.

Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate in which a recess is provided on a back surface thereof, and a shape of the recess is reflected on a surface of a metal film which is also provided on the back surface of the semiconductor substrate.

Abstract: A liquid crystal display device includes a TFT substrate and a counter substrate with liquid crystal sandwiched therebetween. The TFT substrate has scanning lines 10 extending in a first direction and arrayed in a second direction and video signal lines 20 extending in the second direction and arrayed in the first direction. The TFT substrate has a display area 500 in which TFT pixels are arrayed in a matrix pattern, and a frame area 600 surrounding the display area. In the frame area 600, common bus wires 521 are formed in the same layer and with the same material as the video signal lines 20 and are impressed with a common voltage. Dummy TFTs are formed in a layer under the common bus wires 521. The scanning lines 10, extending over the frame area 600, are divided outside the display area and are interconnected by bridging wires 170.

Abstract: A seed layer stack with a smooth top surface having a peak to peak roughness of about 0.5 nm over a range of 100 nm is formed by sputter depositing an X layer such as Mo on a Ni layer where the X layer has one or both of a larger bond energy and a greater atomic number than Ni. A (Ni/X)m laminate is formed and then an uppermost NiCr seed layer is deposited to enhance perpendicular magnetic anisotropy (PMA) in an overlying ferromagnetic layer. A <111> NiCr crystal structure promotes <111> texture in the ferromagnetic layer. X layers serve as a diffusion barrier to Ta migration from a bottom electrode and have good lattice matching with the adjoining Ni layer and uppermost NiCr layer. As a result of the smooth seed layer stack in a magnetic tunnel junction (MTJ), MTJ properties are improved and more reproducible.

Abstract: The electronic device module includes a sealing part sealing an electronic component therein, and an external connection terminal disposed on one surface of the sealing part. The electronic device module also includes a dummy bonding part configured on a surface of the sealing part and spaced apart from the external connection terminal.

Abstract: A High Electron Mobility Transistor (HEMT) and a method of forming the same are disclosed. The method includes epitaxially growing a first III-V compound layer and epitaxially growing a second III-V compound layer over the first III-V compound layer, wherein a first native oxide layer is formed on the second III-V compound layer. The method further includes in-situ treating the first native oxide layer with a first gas, thereby converting the first native oxide layer into a first crystalline oxide layer. The method further includes forming a first crystalline interfacial layer over the first crystalline oxide layer and forming a dielectric passivation layer over the first crystalline interfacial layer.

Abstract: The semiconductor chip including a semiconductor device layer including a pad region and a cell region, a plurality of uppermost wirings formed on the semiconductor device layer to be arranged at an equal distance in the cell region, a passivation layer formed in the cell region and the pad region, and a plurality of thermal bumps disposed on the passivation layer to be electrically insulated from the plurality of uppermost wirings may be provided. The semiconductor device layer may include a plurality of through silicon via (TSV) structures in the pad region. The plurality of uppermost wirings may extend in parallel along one direction and have a same width. The passivation layer may cover at least a top surface of the plurality of uppermost wirings in the cell region and includes a top surface having a wave shape.

Abstract: Deterioration of display quality due to a difference of leak current in each pixel is suppressed. A pixel 30G includes a pixel capacitor 36 and a switching element 14 which controls supplying and blocking of voltage with respect to the pixel capacitor 36, and modulates irradiation light of a first wavelength (530 nm) according to the voltage of the pixel capacitor 36. A pixel 30R includes the pixel capacitor 36 and the switching element 14 that controls supplying and blocking of voltage with respect to the pixel capacitor 36, and modulates irradiation light of a second wavelength (620 nm) which is longer than the first wavelength according to the voltage of the pixel capacitor 36. A capacitance value of the pixel capacitor 36 of the pixel 30G is larger than a capacitance value of the pixel capacitor 36 of the pixel 30R.

Abstract: Spin transfer torque memory cells and methods of forming the same are described herein. As an example, spin transfer torque memory cells may include an amorphous material, a storage material formed on the amorphous material, wherein the storage material is substantially boron free, an interfacial perpendicular magnetic anisotropy material formed on the storage material, a reference material formed on the interfacial perpendicular magnetic anisotropy material, wherein the reference material is substantially boron free, a buffer material formed on the reference material and a pinning material formed on the buffer material.

Abstract: Disclosed is a TFT substrate, including a substrate and a gate electrode thereon. A gate insulation layer over the substrate covers the gate electrode. An active layer is disposed over the gate insulation layer. An etch stop layer is disposed over the active layer and the gate insulation layer. A first opening penetrates the etch stop layer to expose a first part of the active layer. A source electrode over the etch stop layer is electrically connected to the first part of the active layer through the first opening. A first inorganic insulation layer is disposed over the source electrode and the etch stop layer. A second opening penetrates the first inorganic insulation layer and the etch stop layer to expose a second part of the active layer.

Abstract: An array substrate for display devices is provided. According to an exemplary embodiment, the array substrate for display device includes: a plurality of gate lines that extend along a first direction; and a data line that is formed by connecting a plurality of first sub-data lines extending along a second direction and a plurality of second sub-data lines extending along a third direction, wherein the gate lines overlap the second sub-data lines with an insulating layer interposed therebetween.

Abstract: A method for forming a semiconductor device package substrate including a fiducial mark is provided. The method of forming the package substrate includes forming a dielectric layer over a lower portion of the package substrate. A metal layer is formed over a fiducial region of the package substrate. The metal layer is etched to form a first signal line in the fiducial region. A passivation layer is formed over the first signal line. The passivation layer is etched over the first signal line to form a fiducial mark.

Abstract: A method of manufacturing a display apparatus includes: preparing a substrate including a pixel circuit region and a driving circuit region; forming a first active layer at the pixel circuit region; forming a second active layer at the driving circuit region; forming gate electrodes that overlap the first active layer and the second active layer, respectively, with a gate insulating layer disposed therebetween; forming a first insulating layer covering the first and second active layers; forming a first contact hole that passes through the first insulating layer until a portion of the first active layer is exposed; heat-treating the substrate where the first insulating layer, in which the first contact hole is formed, is formed; and forming a second contact hole that passes through the first insulating layer disposed on the heat-treated substrate until a portion of the second active layer is exposed.

Abstract: A device includes a package component having conductive features on a top surface, and a polymer region molded over the top surface of the first package component. A plurality of openings extends from a top surface of the polymer region into the polymer region, wherein each of the conductive features is exposed through one of the plurality of openings. The plurality of openings includes a first opening having a first horizontal size, and a second opening having a second horizontal size different from the first horizontal size.

Abstract: A method of forming a light-emitting device comprises: forming patterned portions of precursor material over a substrate, the edges of the patterned portions defining sidewalls; performing a shaping control process on the patterned portions of precursor material to control the sidewall profile to reduce the angle the sidewalls of the precursor material make with the substrate to less than 15 degrees; selectively applying from solution a conductive coating onto the portions of shaped precursor material so as to form a plurality of first conducting contacts such that an upper surface of said conductive coating follows the sidewall profile of the precursor material; forming a light-emitting layer over the conductive contacts and substrate, and forming a plurality of second conducting contacts over the light-emitting layer. The precursor material may comprises an activator catalyst and the conductive coating comprises a metal selectively applied to the shaped precursor material by electroless plating.