Patents Examined by Duy-Vu N. Deo
  • Patent number: 11370968
    Abstract: The disclosure is related to a composition for etching, a method for manufacturing the composition, and a method for fabricating a semiconductor using the same. The composition may include a first inorganic acid, at least one of silane inorganic acid salts produced by reaction between a second inorganic acid and a silane compound, and a solvent. The second inorganic acid may be at least one selected from the group consisting of a sulfuric acid, a fuming sulfuric acid, a nitric acid, a phosphoric acid, and a combination thereof.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: June 28, 2022
    Inventors: Jin Uk Lee, Jae Wan Park, Jung Hun Lim
  • Patent number: 11370200
    Abstract: The purpose of the present invention is to provide a fluororesin film or fluororesin laminate excellent in heat resistance and excellent in interlayer adhesion to an object to be laminated, such as a prepreg, a method for producing a hot pressed laminate using said film or laminate, and a method for producing a printed circuit board. The fluororesin film contains a fluororesin having a melting point of from 260 to 380° C., and has an arithmetic average roughness Ra of at least 3.0 nm when inside of 1 ?m2 of at least one surface thereof in the thickness direction is measured by an atomic force microscope. The laminate 1 has a layer A10 containing said fluororesin and a layer B12 made of another substrate, wherein the layer A10 has an arithmetic average roughness Ra of at least 3.0 nm when inside of 1 ?m2 of a second surface 10b thereof is measured by an atomic force microscope.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: June 28, 2022
    Assignee: AGC Inc.
    Inventors: Tomoya Hosoda, Tatsuya Terada, Atsumi Yamabe, Nobutaka Kidera, Wataru Kasai
  • Patent number: 11365352
    Abstract: The disclosure is related to a composition for etching, a method for manufacturing the composition, and a method for fabricating a semiconductor using the same. The composition may include a first inorganic acid, at least one of silane inorganic acid salts produced by reaction between a second inorganic acid and a silane compound, and a solvent. The second inorganic acid may be at least one selected from the group consisting of a sulfuric acid, a fuming sulfuric acid, a nitric acid, a phosphoric acid, and a combination thereof.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: June 21, 2022
    Inventors: Jin Uk Lee, Jae Wan Park, Jung Hun Lim
  • Patent number: 11361942
    Abstract: Systems and methods for adjusting power and frequency based on three or more states are described. One of the methods includes receiving a pulsed signal having multiple states. The pulsed signal is received by multiple radio frequency (RF) generators. When the pulsed signal having a first state is received, an RF signal having a pre-set power level is generated by a first RF generator and an RF signal having a pre-set power level is generated by a second RF generator. Moreover, when the pulsed signal having a second state is received, RF signals having pre-set power levels are generated by the first and second RF generators. Furthermore, when the pulsed signal having a third state is received, RF signals having pre-set power levels are generated by the first and second RF generators.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: June 14, 2022
    Assignee: Lam Research Corporation
    Inventors: John C. Valcore, Jr., Bradford J. Lyndaker
  • Patent number: 11361974
    Abstract: A method for forming a semiconductor structure includes the steps of providing a substrate having a first region and a second region, forming a plurality of semiconductor devices on the first region of the substrate, forming a planarization layer on the substrate and covering the semiconductor devices, wherein the planarization layer on the first region and the planarization layer on the second region have a step-height, performing a first CMP process to remove the step height of the planarization layer, and after the first CMP process, performing a curing process to convert the planarization layer into a porous low-k dielectric layer.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: June 14, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Weiwen Zhong
  • Patent number: 11359113
    Abstract: A polishing liquid, which is used for chemical mechanical polishing, includes ceria particles having an average aspect ratio of 1.5 or more; and an anionic polymer or a cationic polymer, in which a pH of the polishing liquid is 3 to 8. In a case where the polishing liquid contains the anionic polymer, the polishing liquid further includes an inorganic acid or an organic acid including at least one group selected from the group consisting of a carboxylic acid group, a phosphoric acid group, a phosphonic acid group, and a sulfonic acid group.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: June 14, 2022
    Assignee: FUJIFILM Corporation
    Inventor: Tetsuya Kamimura
  • Patent number: 11361975
    Abstract: A method of fabricating an integrated circuit is disclosed. The method of removing excess metal of a metal interconnection layer during integrated circuit fabrication process comprises the steps of: plasma etching an excess metal portion of the metal interconnection layer using plasma comprising a noble gas, for an etch duration. The method further comprises stopping the etch process prior to the excess metal portion being completely removed and thus prior to a dielectric surface upon which the metal interconnection is formed, becoming completely exposed. The remaining excess metal portion comprising excess metal residues is subsequently removed using a second etch step.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: June 14, 2022
    Assignee: SPTS Technologies Limited
    Inventors: Tony Wilby, Steve Burgess
  • Patent number: 11352694
    Abstract: A drawing apparatus includes: a drawing part; a cleaning-gas generator; a first valve between the cleaning-gas generator and the drawing part and adjusting a supply amount of gas to the drawing part; a first pressure gauge measuring a pressure in the drawing part; a compensation-gas introducing part introducing compensation-gas to be supplied between the cleaning-gas generator and the first valve; a second valve between the compensation-gas introducing part and the first valve and adjusting a supply amount of the compensation-gas; and a valve controller controlling the first and second valves, wherein the valve controller controls the first valve to supply the cleaning-gas at a predetermined flow rate to the drawing part and controls the second valve to cause a pressure in the drawing part to be a predetermined pressure when the first pressure gauge detects a pressure reduction due to a reduction in a supply flow rate of the cleaning-gas.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: June 7, 2022
    Assignee: NUFLARE TECHNOLOGY, INC.
    Inventors: Satoshi Nakahashi, Kaoru Tsuruta
  • Patent number: 11355388
    Abstract: A method for manufacturing a semiconductor device includes forming a hard mask layer overlying a device layer of a semiconductor device, a mandrel underlayer over hard mask layer, and a mandrel layer over mandrel underlayer. The mandrel layer has a plurality of mandrel lines extending along a first direction. A plurality of openings are formed in mandrel underlayer extending in a second direction substantially perpendicular to first direction. A spacer layer is formed over mandrel underlayer and layer. Spacer layer fills plurality of openings in underlayer. Portions of spacer layer are removed to expose an upper surface of underlayer and mandrel layer, and mandrel layer is removed. By using remaining portions of spacer layer as a mask, underlayer and hard mask layer are removed, to form a hard mask pattern with first hard mask pattern lines extending along first direction and second hard mask pattern lines extending along second direction.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: June 7, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yan-Jhi Huang, Yu-Yu Chen
  • Patent number: 11355355
    Abstract: The present invention relates to a method of producing a ceramic substrate, the method including: joining a metal layer to each of opposite surfaces of a ceramic base material; forming, on the metal layers, a first electrode layer and a second electrode layer having a larger volume than the first electrode layer; calculating the volumes of the first and second electrode layers; and controlling a thickness of the second electrode layer, thereby controlling warpage which may occur due to a difference between the volumes of the first and second electrode layers. The present invention can reduce the defect rate of a ceramic substrate by controlling warpage that may occur due to the difference in volume taken up by the metal layers on the opposite surfaces of the base material.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: June 7, 2022
    Assignee: Amosense Co., Ltd.
    Inventors: Ji-Hyung Lee, Ik-Seong Park, Hyeon-Choon Cho
  • Patent number: 11345853
    Abstract: A treatment device 1 includes: a treatment tank 2; an electrolytic cell 6 including diamond electrodes continuous from a pipe 4 including a circulation pump 5; and a pipe 7 supplying from the electrolytic cell 6 to the treatment tank 2. The treatment tank 2 and the electrolytic cell 6 are filled with sulfuric acid having a predetermined concentration; current is applied to the electrolytic cell 6 to electrolyze the sulfuric acid and a persulfuric acid solution S is generated by electrolyzing the sulfuric acid; and the persulfuric acid solution S is supplied to the treatment tank 2 through the pipe 7. Besides, inside the treatment tank 2, a PPS resin board 8 is vertically suspended in a state of being fixed to a fixture 8A, and the PPS resin board 8 is treated by the persulfuric acid solution S.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: May 31, 2022
    Assignee: KURITA WATER INDUSTRIES LTD.
    Inventors: Tatsuo Nagai, Yuzuki Yamamoto
  • Patent number: 11332641
    Abstract: A polishing slurry composition enabling implementation of multi-selectivity is provided. The polishing slurry composition includes: a polishing liquid including abrasive particles; and an additive liquid, in which the additive liquid includes a polymer having an amide bond, and a cationic polymer.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: May 17, 2022
    Assignee: KCTECH CO., LTD.
    Inventors: Gi Joo Shin, Jung Yoon Kim, Kwang Soo Park, Soo Wan Choi
  • Patent number: 11335563
    Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: May 17, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greeley, Brian J. Coppa
  • Patent number: 11333896
    Abstract: The systems and methods discussed herein are for the fabrication of diffraction gratings, such as those gratings used in waveguide combiners. The waveguide combiners discussed herein are fabricated using nanoimprint lithography (NIL) of high-index and low-index materials in combination with and directional etching high-index and low-index materials. The waveguide combiners can be additionally or alternatively formed by the directional etching of transparent substrates. The waveguide combiners that include diffraction gratings discussed herein can be formed directly on permanent transparent substrates. In other examples, the diffraction gratings can be formed on temporary substrates and transferred to a permanent, transparent substrate.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: May 17, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Ludovic Godet, Wayne McMillan, Rutger Meyer Timmerman Thijssen
  • Patent number: 11315793
    Abstract: An etching method is performed in a state where a substrate is placed on a substrate support provided in a chamber of a plasma processing apparatus. In the etching method, radio-frequency power is supplied to generate plasma from a gas in the chamber. Subsequently, a negative DC voltage is applied to a lower electrode of the substrate support during the supplying of the radio-frequency power to etch the substrate with positive ions from plasma. Subsequently, the applying of the negative DC voltage to the lower electrode and the supplying of the radio-frequency power are stopped to generate negative ions. Subsequently, a positive DC voltage is applied to the lower electrode in a state where the supply of the radio-frequency power is stopped to supply the negative ions to the substrate.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: April 26, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Gen Tamamushi, Kazuya Nagaseki
  • Patent number: 11279850
    Abstract: The compositions of the present disclosure polish surfaces or substrates that at least partially include ruthenium. The composition includes a synergistic combination of ammonia and oxygenated halogen compound. The composition may further include abrasive and acid(s). A polishing composition for use on ruthenium materials may include ammonia, present in an amount of 0.01 wt % to 10 wt %, based on the total weight of the composition; hydrogen periodate, present in an amount of 0.01 wt % to 10 wt %, based on the total weight of the composition; silica, present in an amount of 0.01 wt % to 12 wt %, based on the total weight of the composition; and organic sulfonic add, present in an amount of 0.01 wt % to 10 wt %, based on the total weight of the composition, wherein the pH of the composition is between 6 and 8.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: March 22, 2022
    Assignee: FUJIFILM ELECTRONIC MATERIALS U.S.A., INC.
    Inventors: David (Tawei) Lin, Bin Hu, Liqing (Richard) Wen, Yannan Liang, Ting-Kai Huang
  • Patent number: 11282709
    Abstract: According to the present disclosure, there is provided a water-repellent protective film-forming liquid chemical capable of achieving an improved water repellency imparting effect. The water-repellent protective film-forming liquid chemical according to the present disclosure contains the following compositions: (I) an aminosilane composition of the following general formula [1]; (II) a silicon compound of the following general formula [2]; and (III) an aprotic solvent, wherein the amount of the component (I) contained is 0.02 to 0.5 mass % based on the total amount of the components (I) to (III).
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: March 22, 2022
    Assignee: CENTRAL GLASS COMPANY, LIMITED
    Inventors: Yuki Fukui, Yoshiharu Terui, Shuhei Yamada, Yuzo Okumura, Soichi Kumon, Saori Shiota, Katsuya Kondo
  • Patent number: 11282696
    Abstract: A method and device for wet processing and integrated circuit (IC) substrates using a fresh mixture of chemical steam vapors and chemical gases may include loading the substrates into an enclosed process chamber with a 90° rotatable middle section; closing the process chamber; conditioning the process chamber with preset temperature nitrogen gas; injecting a fresh mixture of chemical gas and chemical steam into the processing chamber sequentially to condense wet process fresh chemicals on site; circulating the mixture of chemical steam vapors or liquid chemicals and rotating at least one magnetic rod within the processing chamber to treat the substrates uniformly; performing a deionized water rinse of the substrates and turning on the adjustable multi-modulated megasonic energy when necessary; injecting solvent isopropyl alcohol steam vapor into the processing chamber for the Marangoni drying; completely drying the substrates and the processing chamber with hot nitrogen gas; and unloading the treated substrat
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: March 22, 2022
    Inventor: Dangsheng Ni
  • Patent number: 11274250
    Abstract: The present invention provides a chemical solution, which has an excellent dissolving ability for a transition metal-containing substance and can realize excellent smoothness of a portion to be treated, and a treatment method using the chemical solution. The chemical solution according to an embodiment of the present invention is a chemical solution used for removing a transition metal-containing substance on a substrate and includes periodic acids and a compound including one or more kinds of anions selected from the group consisting of IO3?, I?, and I3?, in which a content of the compound including anions with respect to a total mass of the chemical solution is 5 ppb by mass to 1% by mass.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: March 15, 2022
    Assignee: FUJIFILM Corporation
    Inventors: Tomonori Takahashi, Nobuaki Sugimura, Hiroyuki Seki
  • Patent number: 11267715
    Abstract: Aiming at providing a ceria-based composite particle dispersion capable of polishing silica film, Si wafer or even hard-to-process material at high polishing rate, and can give high surface accuracy, disclosed is a ceria-based composite particle dispersion that contains a ceria-based composite particle that has an average particle size of 50 to 350 nm, to solve the aforementioned problem, featured by that the ceria-based composite particle has a mother particle, a cerium-containing silica layer, a child particle, and an easily soluble silica-containing layer; the mother particle contains amorphous silica as a major ingredient; the child particle contains crystalline ceria as a major ingredient; ratio of the mass of the easily soluble silica-containing layer relative to the mass of the ceria-based composite particle falls in a specific range; mass ratio of silica and ceria in the ceria-based composite particle falls in a specific range; the ceria-based composite particle, when analyzed by X-ray diffractometry,
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: March 8, 2022
    Assignee: JGC Catalysts and Chemicals Ltd.
    Inventors: Michio Komatsu, Hiroyasu Nishida, Yuji Tawarazako, Shinya Usuda, Kazuhiro Nakayama