Abstract: A system which includes a microprocessor (or microcontroller) and an auxiliary chip which monitors the system power supply voltage and performs related functions for the microprocessor, and also provides a watchdog function to monitor the microprocessor's activity. The auxiliary chip itself can put to sleep by the microprocessor to minimize power consumption. The sleep mode of the auxiliary chip saves power by shutting down many of the input-sensing circuits, and the watchdog function. The sleep command is not accepted unless it stands in the proper timing relationship to a signal on the strobe pin. This permits the power savings of the sleep mode to be realized, without any risk of the system being placed in the sleep mode due to an out-of-control system condition.
Abstract: A system for displaying "help" information concerning the functioning of the controls of an electronic system. A "help" control is provided which, when operated, places the system in a "help" mode. When the system is in the "help" mode, system controls are disabled from performing their normal function and, in response to the operation of a control and were appropriate to an indication of the current state of the system, a selected "help" text is displayed. The system is adapted to operate for both analog and digital controls and to provide the "help" text in a window on the display so that normal operation of the system may continue while the "help" text is being displayed.
Abstract: To create a snapshot copy of selected elements of a database in a data processing system, the selected elements are copied sequentially to a secondary storage device. During the copying operation, when a task requests to delete one of the selected elements from the database before it is copied to the secondary storage device, a record is made to identify the requested element, the task is allowed to continue processing. After the element has been copied to the secondary storage device, the identified element will be deleted based upon the record. Also, during the creation of the copy, when a task requests to update one of the selected elements, a duplicate copy of the requested element is created and the task is allowed to update the requested element. When it is time to copy the requested element to the secondary storage device, the duplicate copy will be used.
Abstract: A computer-aided design method for restructuring computational networks to minimize latency and shim delay, suitable for use by a silicon compiler. Data-flow graphs for computational networks which use trees of operators, each performing associative and commutative combining of its respective imput operands to generate a respective output operand, are converted to data-flow graphs with multiple-input operators. Data-flow graphs with multiple-input operators, after being optimally scheduled, are converted to data-flow graphs which use trees of dual-input operators or of dual-input and three-input operators, those trees having minimum latency and shim delay associated with them. These data-flow graphs then have shim delay minimized in them, e.g. by being subjected to linear programming.
Abstract: A data processing device wherein messages are inputted for a plurality of recipients. The recipients' names are displayed along with the number of messages. When a message is inputted for a new recipient, the recipient's name as well as the message are automatically stored. In the event the recipient's name has already been stored only the message is stored.
Abstract: A system and method in which client access to data at a server is synchronized to keep the data consistent by ensuring that each portion of the data accessible for modification at a node is not accessible for reading or modification by any other node, while allowing portions of the data accessible only for reading to be accessible by any number of nodes. If a conflicting request arises from a different client the server must revoke data that has been previously distributed to a client. For a revoke.sub.-- bytes request, all outstanding get.sub.-- bytes are marked so that the bytes that are being requested to be revoked will be discarded when they do arrive at the client. To insure that read and write system calls on a file are performed in a serializable fashion throughout a distributed environment, each machine at which a read is being performed must acquire a read token and each machine at which a write is being performed must acquire a read/write token from the server for the file.
Type:
Grant
Filed:
May 15, 1989
Date of Patent:
December 29, 1992
Assignee:
International Business Machines Corporation
Inventors:
Donavon W. Johnson, Stephen P. Morgan, Todd A. Smith
Abstract: A Command interface includes ports for transferring information between a host processor and at least one intelligent subsystem which may have attached devices. A Command Interface port receives either a direct command or an indirect command from the host processor, which commands are indicative of a type of operation to be performed by the one subsystem or an attached device. An Attention port receives a code from the host processor which is indicative of which one of the direct command or the indirect command is received at the Command Interface port, and which is also indicative of which of the one intelligent subsystem or a device is to execute the command. A command busy/status port receives a code from the one intelligent subsystem which is indicative of whether or not the Command Interface port and the Attention port are busy, and whether or not the one intelligent subsystem is accepting or rejecting commands. The host processor can read this port without altering or updating the code.
Type:
Grant
Filed:
January 6, 1992
Date of Patent:
December 8, 1992
Assignee:
International Business Machines Corporation
Inventors:
Francis M. Bonevento, Douglas R. Chrisholm, Sammy D. Dodds, Dhruvkumar M. Desai, Ernest N. Mandese, Andrew B. McNeill, Richard N. Mendelson
Abstract: Change processing of a replica database is accomplished by separating redo records obtained from the transaction log of a primary database into respective queues. The redo records are separated such that all transaction records for a unit of transfer (page) of the primary database are placed on the same queue in log sequence. Each queue is linked exclusively to one of a plurality of parallel queue servers. Each queue server applies to the replica database the redo records in the queues which it exclusively serves. The replica database is thereby made consistent with the primary data by a lock-free updating mechanism which services the pages of the replica database in parallel.
Type:
Grant
Filed:
September 25, 1989
Date of Patent:
December 8, 1992
Assignee:
International Business Machines Corporation
Inventors:
Chandrasekaran Mohan, Ronald L. Obermarck, Richard K. Treiber
Abstract: A software engineering tool is disclosed which enables the efficiency and performance of a program design to be evaluated prior to the time the program is written into code. Every possible path that can be followed in the implementation of the program is identified, and its length is measured. From this information, reports are generated which point out the longest paths in the program and sources of potential performance problems. In addition, weights which identify relative complexities or performance timings can be assigned to individual modules in the program, and form the basis of other reports which indicate timing performance. The user is provided with the opportunity to alter the weights assigned to modules, and thereby determine the effect which different weights have on the overall performance of the program.
Type:
Grant
Filed:
March 25, 1992
Date of Patent:
December 1, 1992
Assignee:
Hewlett-Packard Company
Inventors:
Anil K. Shenoy, Vincent D'Angelo, Walter J. Utz, Jr.
Abstract: A computer peripheral device incorporating a multi-task control device which is extremely useful for such programs controlling the microcomputer system. In particular, the multi-task control device effectively controls a plurality of tasks executed by the CPU by using means other than the CPU including such means for controlling operations needed for comparing priority orders between a plurality of tasks, and the other means for generating interrupt operations from this control device against the CPU needed for switching tasks being executed in accordance with the result of the priority comparative operations.
Type:
Grant
Filed:
January 27, 1992
Date of Patent:
December 1, 1992
Assignee:
Sharp Kabushiki Kaisha
Inventors:
Masaru Kuki, Toshimitsu Nakade, Hirotake Hayashi, Takaaki Uno
Abstract: In a pipeline processor, simultaneous decoding of multiple specifiers in a variable-length instruction causes a peculiar problem of an intra-instruction read conflict that occurs whenever an instruction includes an autoincrement or an autodecrement specifier which references either directly or indirectly a register specified by a previously occurring specifier for the current instruction. To avoid stalls during the preprocessing of instructions by the instruction unit, register pointers rather than register data are usually passed to the excellent unit because register data is not always available at the time of instruction decoding. If an intra-instruction read conflict exists, however, the operand value specified by the conflicting register specifier is the initial value of the register being incremented or decremented, and this initial value will have been changed by the time that the execution unit executes the instruction.
Type:
Grant
Filed:
February 3, 1989
Date of Patent:
November 24, 1992
Assignee:
Digital Equipment Corporation
Inventors:
John E. Murray, David B. Fite, Mark A. Firstenberg, Lawrence O. Herman, Ronald M. Salett
Abstract: A power manager within a portable laptop computer provides power and clocking control to various units within the computer in order to conserve battery power. Transistor switches controlled by the power manager control the distribution of power and/or clock signals to the various units within the computer. The power manager includes a software routine for continually monitoring the various units and when these units are either not needed and/or not currently in use, power and/or clock signals are removed from a given unit.
Type:
Grant
Filed:
March 5, 1992
Date of Patent:
November 24, 1992
Assignee:
Apple Computer, Inc.
Inventors:
R. Steven Smith, Mike S. Hanlon, Robert L. Bailey
Abstract: A personal portable computer system includes peripheral devices such as a printer and a CRT which can be driven by a battery power source. The computer system includes a computer body which contains interface units and power supplied to the interface units is controlled. The interface units are used for supplying power to the peripheral devices.
Abstract: A data processing system provides a desk view which serves as a graphical user interface to the system. The desk view displays detailed miniaturized images of all documents possessed by the user. The compressed document images are user moveable and stackable in the desk view. The desk view also enables user selected operations including mailing, disposing, annotating, stapling, unstapling and printing of documents. User interaction with items of the desk view is communicated through an electronic stylus. Different actions with the stylus provide naturally expected effects. The stylus and desk view provide a simulation of a common office desk and user interaction therewith.
Abstract: A data transfer unit for a small computer system which has a host computer and main and auxiliary storage units, transfers data between the host computer, and the main and auxiliary storage units. The data transfer unit transfers the data, which is outputted from the host computer, from the data buffer to both the main and auxiliary storage units simultaneously, in an operation mode in which data is transferred from the host computer to the storage units. When an error occurs in the main or the auxiliary storage unit, the data transfer unit transfers the correct data from the other storage unit which is operating normally, to a substitute address in the storage unit in which the error has occured.
Abstract: Apparatus for hot removal from/insertion to a connection bus of a non-removable-media magnetic recording unit, comprising a plurality of electromagnetic switches for isolation of the signal terminals of the unit from the bus, thereby preventing noise injection into the bus; control and timing circuits for deenergization of the unit only after opening of the switches and for enabling removal of the unit only after deenergization and circuits for imparting to the signal terminals of the unit a bias voltage intermediate or close to the electrical signal levels present on the bus, the insertion occurring by closing the switches when the unit is already powered and the terminals are biased so as to minimize the amplitude of the noise injected onto the bus.
Type:
Grant
Filed:
June 8, 1989
Date of Patent:
October 20, 1992
Assignee:
Bull HN Information Systems Inc.
Inventors:
Cesare Losi, Bruno Mattavelli, Giuseppe Pandolfo
Abstract: Disclosed is a computer data interface (6) for connecting a handheld computer (4) and a desktop computer (2). The computer data interface includes a cable (8) having connectors (10 and 12) at each end thereof. Mounted in one of the connectors is an adapter circuit for receiving data signals from the handheld computer and transmitting the signals to the desktop computer at a voltage levels compatible with the desktop computer. Similarly, the adapter circuit receives signals from the desktop computer and transmits the signals to the handheld computer at voltage levels compatible with the handheld computer. The adapter circuit is powered by the desktop computer to prevent draining the batteries of the handheld computer.
Type:
Grant
Filed:
March 26, 1992
Date of Patent:
October 20, 1992
Assignee:
Traveling Software, Inc.
Inventors:
Mark Eppley, Lawrence H. Berg, John M. Olson
Abstract: A digital data processing system including a plurality of processors processes a program in parallel to load process data into a two-dimensional matrix having a plurality of matrix entries. So that the processors will not have to synchronize loading of process data into particular locations in the matrix, the matrix has a third dimension defining a plurality of memory locations, with each series of locations along the third dimension being associated with one of the matrix entries. Each processor initially loads preliminary process data into a memory location along the third dimension. After that has been completed, each processor generates process data for an entry of the two-dimensional matrix from the preliminary process data in the locations along the third dimension related thereto.
Type:
Grant
Filed:
April 23, 1990
Date of Patent:
October 20, 1992
Assignee:
Digital Equipment Corporation
Inventors:
Gabriel P. Bischoff, Steven S. Greenberg
Abstract: A slave controller formed on a single semiconductor substrate executes a built in control algorithm in response to a command supplied from a master controller. Upon completion of command execution, the controls respond to predetermined information contained within the command by branching internal control operation in accordance with the new command. The controls then suspend a series of operations for executing the new command upon detection of the branch condition. Once the internal state has been changed over, the slave controller sends an instruction to the master controller.
Type:
Grant
Filed:
December 27, 1988
Date of Patent:
October 13, 1992
Assignee:
Hitachi, Ltd.
Inventors:
Takashi Sone, Hiroshi Takeda, Jun Satoh, Shigeru Matsuo
Abstract: In computer systems deliberate initializations/resets of the processor latches which represent the internal processor states are necessary to erase only such information which is not required for a subsequent operation, e.g., processing/logging error data, prior to a processor start. One or more reset areas are defined which are initialized/reset in a staggered mode, where in each area a group of latches is assembled which have to be initialized/reset depending on the cause, e.g., power-on, for such a system initialization/reset. The latches within a reset area are connected to form shift registers which are initialized/reset by propagating a binary zero through all latches of the area(s) to be reset.
Type:
Grant
Filed:
August 31, 1989
Date of Patent:
October 13, 1992
Assignee:
International Business Machines Corporation
Inventors:
Dietrich W. Bock, Peter Mannherz, Peter Rudolph, Hermann Schulze-Scholling