Abstract: A transistor array arrangement for providing high-density semiconductor logic circuits in double polysilicon technology is described. Semiconductor, for example, FET, logic circuits have four independent but simultaneously accessible FET devices which are formed by intersecting sets of polysilicon gate lines. The four FET devices share a common first diffusion, for example a source, surrounded by four logically independent second diffusions, for example drains. A three-bit decode device is made which includes this array design.

Abstract: A semiconductor device having a structure originating from field effect transistors of a vertical configuration type in which a deflection is brought about between the electrons so as to be able to switch in an ultra-rapid manner a current or signal, or produce a phase shift. In a very thin monocrystalline gallium arsenide film, a certain number of cells are produced for this purpose and each of them includes a cathode, a first gate electrode embedded in the semiconductor material, a second gate electrode and at least one anode electrode serving as a target for the ballistic electrons. The electron beam is deflected as a function of the different polarizations applied to the gate electrodes.

Abstract: A semiconductor protective device has a semiconductor substrate of one conductivity type, the first island region being of a conductivity type opposite to that of the semiconductor substrate; second and third regions formed in a surface layer of the first region and being of the same conductivity type as that of the semiconductor substrate; a first transistor emitter region formed in the surface region of the second region and being of a conductivity type opposite to that of the semiconductor substrate; a low-resistance region formed across the second region and the third region; a first electrode formed on the first transistor emitter region; a second electrode; a third electrode connected to the second electrode by the low-resistance region; a first wiring layer connecting the first electrode and the third electrode and connected to an external terminal, the resistance of the semiconductor region between the first electrode and the first transistor emitter region being lower than that of the semiconductor r

Abstract: A superconductive junction device for fabricating Josephson integrated circuits is useful for replacing deposited thin-film resistors and for short-circuit device interconnections. Derived by "poisoning" a superconductive electrode or altering the barrier of a tunnel junction, the device displays controllable resistive properties at normal superconducting transition temperatures at substantial savings in the space occupied. Methods of fabricating the device using the selective niobium anodization process and ion implantation process are disclosed. When both upper and lower superconductive electrodes are poisoned, the device has linear properties whose resistance is identical to the normal resistance of unpoisoned junctions. Superconducting short circuits are readily obtained by oxygen ion implantation in thin film niobium electrodes.

Abstract: A superconductive junction device for fabricating Josephson integrated circuits is useful for replacing deposited thin-film resistors. Derived by "poisoning" a superconductive electrode of the Josephson junction, the device displays controllable resistive properties at normal superconducting transition temperatures at substantial savings in the space occupied. Methods of fabricating the device using the selective niobium anodization process and conventional lead alloy processes are disclosed. When both upper and lower superconductive electrodes are poisoned, the device has linear properties whose resistance is identical to the normal resistance of unpoisoned junctions.

Abstract: A low impedance crossunder region is formed of a low resistivity emitter diffusion within a base region of an active device which extends beneath a portion of a metallization pattern to be crossed. The low resistivity crossunder diffusion is shorted to the base region in order to prevent transistor action between the crossunder region and the base region in contrast with other emitter diffusions within the base region which form diode junctions with the base region.