Abstract: A circuit combines the outputs of two or more phase locked loops to reduce jitter to a level below that of an individual phase locked loop. A digital version of the circuit uses a majority function to determine the median value of the phase locked loops. An analog version of the circuit averages the outputs of the phase locked loops.

Abstract: A method and apparatus for buffering data samples in a software-based ADSL modem. The method includes generating data for transmission to a remote source and modulating the data to form a plurality of data symbols for transmission. The data symbols are stored in a buffer. An absence of a data symbol in the buffer is determined. In response to detecting an absence of a data symbol in the buffer, an idle data symbol is transmitted.

Abstract: An apparatus and a method for eliminating distortion component from the output of power amplifier, comprising a baseband linearization arrangement for receiving the baseband signal, demodulating a distorted amplifier output signal, comparing the received baseband signal with the demodulated amplification output signal for providing a predistorted signal to remove the distorted component of the amplifier output signal applied by the power amplifier, and a carrierband linearization amplification arrangement for amplifying the output signal of the baseband linearization arrangement in order to linearize the distorted component of the amplifier output signal using the predistorted signal and for further linearizing the distorted component from the output of the power amplifier by extracting an error signal and amplifying the error signal to be combined the amplifier output signal in order to eliminate any distorted components in the amplifier output signal.

Abstract: A low IF receiver frequency translates an input signal in quadrature related mixers, filters in respective low pass channel filters, and derotates to produce a wanted signal and its image. At switch-on, the receiver is operated as a zero IF receiver in order to determine which of the adjacent channels to the wanted channel has the smaller interferer, and the local oscillator frequency supplied to the mixers is then adjusted to bring that interferer into the channel bandwidth of the low pass channel filters.

Abstract: This invention relates to a broad band spread spectrum communications receiver with carrier recovery and tracking based on multiple phase shift keying (MPSK) techniques. The receiver comprises three subsystems: the synchronization system, the carrier tracking system and the data demodulation system. To demodulate the received signal, the receiver requires a carrier frequency that matches that of the transmitter as well as the chip and symbol clocks that are synchronized with those of the transmitter. In the disclosed system the carrier tracking subsystem continually tracks the carrier frequency of the received signal using a tracking scheme which is based on correlation techniques. The synchronization subsystem synchronizes the symbol clock and chip clock. These three subsystems interact with each other and result in an improved bit error rate (BER) performance.

Abstract: A Viterbi decoder system is provided in accordance with the present invention. The decoder system includes a State Metric Update unit including a state metric memory and a cascaded Add/Compare/Select (ACS) unit. The cascaded ACS unit comprises a plurality of serially coupled ACS stages for performing a plurality of ACS operations in conjunction with the state metric memory. An ACS stage is operable to identify a plurality of path decisions and communicate the identified path decisions to a next ACS stage coupled thereto. A Traceback unit is provided for storing a set of accumulated path decisions in a traceback memory associated therewith, and performing a traceback on the set of accumulated path decisions. The path decisions associated with the ACS stage and the next ACS stage are accumulated as a set during the ACS operations before being written to the traceback memory, thereby minimizing accesses to the traceback memory.

Abstract: A method is presented for demodulating and decoding a block of received digital information consisting of a number of subblocks. One of a predefined number of demodulation methods is selected for demodulating each subblock and each subblock is demodulated with the demodulation method selected for it. The subblocks constituting a block of digital information are combined between their demodulation and the decoding of the block of digital information. Soft decoding is used to decode the block of digital information, wherein each subblock is converted to a sequence of soft decoding values associated with certain probabilities of allowed state transitions in the decoding process. For each subblock it is determined, after its demodulation, whether the correct demodulation method was selected for it.

Abstract: The invention provides a &pgr;/4 shift QPSK modulator, as well as a communication device, which is capable of reducing the storage capacity of ROM for previously storing impulse response data, and which allows the power consumption to be lowered and the circuit scale to be downsized. In an impulse response storage section within an impulse response computing circuit, storage capacity for impulse response data is halved by using, in common, impulse response data of a one-side waveform of an impulse response waveform bilaterally symmetrical with respect to a peak value. Also, a read address signal is switched over by an address inversion section of a simple constitution so that blocks of two kinds of magnitudes, “1” and “1/{square root over (2)}”, of the impulse response storage section are not accessed simultaneously.

Abstract: A DC balanced, single bit manipulation method and system for encoding a serial data stream having a plurality of low and high bits includes generating a pulse stream. The serial data stream is to be transferred along a serial loop. The pulse stream includes a series of pulses each having a nominal time duration. A pulse of the pulse stream is modified to have a time duration longer than the nominal time duration to encode a transition of the data stream from a low bit to a high bit. A pulse of the pulse stream is modified to have a time duration shorter than the nominal time duration to encode a transition of the data stream from a high bit to a low bit. The time duration of a pulse of the pulse stream is maintained at the nominal time duration to encode two sequential high bits of the data stream. The time duration of a pulse of the pulse stream is maintained at the nominal time duration to encode two sequential low bits of the data stream.