Abstract: A method is disclosed for promoting the formation of uniform platelets in a monocrystalline semiconductor donor substrate by irradiating the monocrystalline semiconductor donor substrate with light. The photon-absorption assisted platelet formation process leads to uniformly distributed platelets with minimum built-in stress that promote the formation a well-defined cleave-plane in the subsequent layer transfer process.

Abstract: In an embodiment, a package includes a first package structure including a first integrated circuit die having an active side and a back-side, the active side including die connectors, a second integrated circuit die adjacent the first integrated circuit die, the second integrated circuit die having an active side and a back-side, the active side including die connectors, a routing die including die connectors bonded to the active sides of the first integrated circuit die and the second integrated circuit die, the routing die electrically coupling the first integrated circuit die to the second integrated circuit die, an encapsulant encapsulating the first integrated circuit die, the second integrated circuit die, and the routing die, and a first redistribution structure on and electrically connected to the die connectors of the first integrated circuit die and the second integrated circuit die.

Abstract: The present disclosure provides a thin film transistor and a fabrication method thereof, and an array substrate. The thin film transistor formed on a base substrate, the thin film transistor includes: an active layer; a first signal metal layer, provided on a surface of the active layer facing the base substrate; a second signal metal layer, provided on a surface of the active layer facing away from the first signal metal layer, wherein, the active layer includes a conductive channel formation region, and the second signal metal layer does not cover the conductive channel formation region of the active layer.

Abstract: Disclosed is a method for constructing a micro-LED display module. The method includes: retaining micro-LED chips in a matrix on a chip retaining member; picking up the micro-LED chips on the chip retaining member and transferring the picked up micro-LED chips to a planar carrier member; pressing the micro-LED chips on the planar carrier member against a mount substrate; and heating solders disposed on the mount substrate above the melting point of the solders simultaneously with the pressing of the micro-LED chips against the mount substrate to bond the micro-LED chips to the mount substrate. The mount substrate is sucked by a suction chuck during heating of the solders.

Abstract: An organic light-emitting display device can include a low-level voltage line; a passivation layer that lies over the low-level voltage line; a planarization layer that lies over the passivation layer; an anode and an auxiliary electrode that lie on the planarization layer and the passivation layer, the auxiliary electrode is electrically connected to the low-level voltage line; a bank layer that lies over the anode, the planarization layer and the passivation layer and defines a light-emitting area; an organic emissive layer over the light-emitting area; and a cathode disposed on the organic light-emitting layer, in which the cathode is connected to a side of a protruding portion where the auxiliary electrode protrudes from the planarization layer.

Abstract: The purpose of the present invention is to realize the TFT of the oxide semiconductor having a superior characteristics and high reliability during the product's life. The structure of the present invention is as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed on the first oxide semiconductor, the first gate insulating film is a laminated film of a first silicon oxide film and a first aluminum oxide film, a gate electrode is formed on the first aluminum film.

Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.

Abstract: The present disclosure provides a semiconductor structure employing an antifuse structure and a controlling method of the semiconductor structure. The semiconductor structure includes a semiconductor substrate, a transistor and an antifuse structure. The transistor is disposed on the semiconductor substrate. The antifuse structure is disposed on the semiconductor substrate and adjacent to the transistor. The antifuse structure includes a first conductive portion, a fusible portion and a second conductive portion. The first conductive portion is disposed in the semiconductor substrate. The fusible portion is disposed on the first conductive portion. The second conductive portion is disposed on the fusible portion. The antifuse structure encloses the transistor in a top view.

Abstract: Semiconductor devices having necked semiconductor bodies and methods of forming semiconductor bodies of varying width are described. For example, a semiconductor device includes a semiconductor body disposed above a substrate. A gate electrode stack is disposed over a portion of the semiconductor body to define a channel region in the semiconductor body under the gate electrode stack. Source and drain regions are defined in the semiconductor body on either side of the gate electrode stack. Sidewall spacers are disposed adjacent to the gate electrode stack and over only a portion of the source and drain regions. The portion of the source and drain regions under the sidewall spacers has a height and a width greater than a height and a width of the channel region of the semiconductor body.

Abstract: A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part.

Abstract: An image sensing device is provided to include a pixel region and a peripheral region located outside of the pixel region. The peripheral region includes logic circuits located to receive a pixel signals from the pixel region and configured to process the pixel signals and a capacitor located adjacent to the logic circuits. The capacitor includes an active region, a recessed structure, and a first junction. The active region includes a first impurity region and a second impurity region formed over the first impurity region. The recessed structure is at least partly disposed in the active region and including a first portion disposed in the active region and including a conductive material and a second portion surrounding the first portion and including an insulation material. The first junction is formed in the active region and spaced apart from the recessed structure by a predetermined distance.

Abstract: Provided are an organic light-emitting diode (“OLED”) including a bottom electrode, a top electrode disposed opposite to the bottom electrode, and an organic layer that is interposed between the bottom electrode and the top electrode and includes a hole-transporting host and an electron-transporting host forming an exciplex and a phosphorescent dopant having a triplet energy which is lower than the triplet energy of the hole-transporting host, the triplet energy of the electron-transporting host, and the triplet energy of the exciplex, and a lighting device and a display apparatus including the OLED. Instead of a phosphorescent dopant, the fluorescent dopant having a singlet energy which is lower than the singlet energy of the exciplex may be also used.

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.

Abstract: A light-emitting apparatus and a method for manufacturing the same are provided in which heat dissipation from an LED package to a heat sinking substrate is improved while electrical insulation therebetween is ensured. The light-emitting apparatus includes a circuit board having an opening, an LED package inserted into the opening from the back side of the circuit board and having an edge connected to the back side of the circuit board, and a heat sinking substrate disposed on the back side of the circuit board so as to be in contact with the LED package.

Abstract: The present application provides an organic light emitting diode (OLED) display panel and a package method thereof, the OLED display panel includes a thin film transistor layer, an OLED light emitting layer, and a thin film encapsulation layer, which are sequentially disposed on a substrate; the thin film encapsulation layer includes laminated disposing inorganic encapsulation layers and an organic encapsulation layer; wherein the material forming the organic encapsulation layer is methyl methacrylate-N-isopropyl acrylamide copolymer solution, which is spread on the surface of the inorganic encapsulation layer and after curing, used to form an organic encapsulation layer.

Abstract: A thin film resistor includes a high-resistance region and low-resistance regions which are formed at both ends of the high-resistance region. The high-resistance region includes first high-resistance regions and a second high-resistance region, and the first high-resistance regions are arranged at both side surfaces in a first direction in the second high-resistance region. The second high-resistance region has a higher sheet resistance than that of the first high-resistance regions.

Abstract: A display panel and a manufacturing method for the display panel are provided. The display panel includes a substrate. An ultraviolet reflective layer is disposed on the substrate. A thin film transistor array is disposed on the ultraviolet reflective layer. A light emitting device is disposed on the thin film transistor. An encapsulation layer is disposed on the light emitting device. The ultraviolet reflective layer includes at least one pair of a first reflective layer and a second reflective layer stacked on each other. The refractive indexes of the first reflective layer and the second reflective layer are different.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is lower in crystallinity than the first region and the second region.

Abstract: Lateral and vertical microstructure enhanced photodetectors and avalanche photodetectors are monolithically integrated with CMOS/BiCMOS ASICs and can also be integrated with laser devices using fluidic assembly techniques. Photodetectors can be configured in a vertical PIN arrangement or lateral metal-semiconductor-metal arrangement where electrodes are in an inter-digitated pattern. Microstructures, such as holes and protrusions, can improve quantum efficiency in silicon, germanium and III-V materials and can also reduce avalanche voltages for avalanche photodiodes. Applications include optical communications within and between datacenters, telecommunications, LIDAR, and free space data communication.

Abstract: Disclosed herein is an apparatus comprising: an array of avalanche photodiodes (APDs) or an absorption region comprising a semiconductor single crystal such as a CdZnTe single crystal or a CdTe single crystal. The apparatus may be configured to absorb radiation particles incident on an absorption region of the APDs or the semiconductor single crystal and to generate charge carriers. The apparatus may comprise an electrode comprising silver nanoparticles and being electrically connected to the absorption region of the APDs or the semiconductor single crystal. For the APDs, each of the APDs may comprise an amplification region, which may comprise a junction with an electric field in the junction. The electric field may be at a value sufficient to cause an avalanche of charge carriers entering the amplification region, but not sufficient to make the avalanche self-sustaining. The junctions of the APDs may be discrete.