Abstract: A non-volatile memory (NVM) apparatus and an iteration sorting method thereof are provided. The NVM apparatus performs the iteration sorting method to select one target block from a plurality of blocks of a NVM, and to perform a management operation on the target block. The iteration sorting method includes: selecting a plurality of candidate blocks among the blocks of the NVM to join into a sorting set, sorting all of the candidate blocks in the sorting set according to metadata, picking one candidate block with maximum (or minimum) metadata from the sorting set to serve as the target block, and keeping M candidate blocks in the sorting set and discarding the rest of the candidate blocks from the sorting set.

Abstract: Apparatuses and method for an integrated circuit device are described. In an apparatus thereof, there is a plurality of memory controllers coupled to a plurality of memory banks. A network of switches is coupled to the plurality of memory controllers. A plurality of data processing devices is coupled to the network of switches and is configured to generate memory requests. A network controller is coupled to the network of switches and is configured to queue the memory requests and selectively issue requests to memory from the memory requests queued responsive to corresponding response times associated with the plurality of memory banks.

Abstract: Embodiments of the present disclosure provide a storage management method and device. The method comprises: obtaining an attribute and access information of a file stored in storage at a first level in a hierarchical storage system, the attribute of the file indicating a size of the file, and the access information indicating an access frequency of the file; determining necessity of migrating the file based on the attribute of the file and the access information; and in response to the necessity exceeding a predetermined threshold, migrating the file to storage at a second level in the hierarchical storage system, the second level being different from the first level. Embodiments of the present disclosure further disclose a corresponding device.

Abstract: A semiconductor memory system and an operating method thereof include a controller; and a memory device including a memory page manager, Nand pages, and multiple cache pages, wherein the Nand pages include current Nand pages and next Nand pages, wherein the current Nand pages is corresponding to a read command received from the controller, the memory page manager is configured to manage correlation of the Nand pages and the multiple cache pages, predict next Nand pages in accordance at least in part with the read command, the current Nand pages, or a combination thereof, and send the Nand pages to the controller, and the multiple cache pages contain pages loaded from the Nand pages.

Abstract: Described are techniques for processing requests at a data storage system. A request is received from a client to perform an operation with respect to a first data portion stored on physical storage devices of the data storage system. The first data portion is exposed through a set of at least two data nodes each accessing a same copy of the first data portion stored on the physical storage devices. The request is received at a first of the data nodes of the set. The request is processed with respect to the first data portion using the same copy accessible to each of data nodes of the set. The physical storage devices may be configured in a RAID group and the data nodes, optionally along with a name node providing metadata, may be embedded in the data storage system and execute in a virtualized environment.

Abstract: A processor includes a plurality of memory units, each of the memory units including a plurality of memory cells, wherein each of the memory units is configurable to operate as memory, as a computation unit, or as a hybrid memory-computation unit.

Abstract: An apparatus may include a circuit configured to determine a first encoded address is in a bitwise range of addresses, determine a first physical address in a storage memory from the first encoded address using bitwise mapping and retrieve first data from the first physical address in the storage memory. The circuit may further be configured to determine a second encoded address is in an offset linear range of addresses, determine a second physical address in the storage memory from the second encoded address using offset linear mapping and write second data to the second physical address in the storage memory.

Abstract: There are provided a memory system and an operating method thereof. The memory system includes: a memory device divided into a plurality of name spaces; and a controller for controlling a program operation of the memory device in response to a write command, wherein the controller generates at least one data set based on input data, and controls the memory device to program the at least one data set in a select name space of the plurality of name spaces based on meta data included in the at least one data set.

Abstract: A method includes accessing a cache including a first cache block and setting the first cache block to a passive sub-state, where the first cache block in the passive sub-state is configured to be accessed or modified. The method also includes receiving at least one access or modification request of the first cache block and transitioning the first cache block from the passive sub-state to an active sub-state. The method also includes incrementing an ordinal cache activation count at an active cache counter in response to the transitioning, where the active cache counter is configured to track the activation counts such that oldest cache use counts are designated to be overwritten in the cache in an oldest-first fashion.

Abstract: Embodiments of the present disclosure provide a method of managing a redundant array of independent disks (RAID) system and an electronic device. The method includes configuring a plurality of disks in the RAID system as a raw mirror for storing configuration data of the RAID system; storing metadata for the raw mirror in the plurality of disks, the metadata stored in each of the plurality disks including an identifier identifying that the disk belongs to the raw mirror and a sequence number identifying a writing operation for a block storing the metadata in the disk; and controlling reading and writing of the raw mirror based on the metadata.

Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to traverse a list of connected components forming an object. The list generally comprises object IDs and link pointers for each component of the object. The link pointers generally identify links from a current leaf component to a root component of the object. The second circuit may be configured to modify at least the link pointer associated with the current leaf component to point to the root component.

Abstract: A method for execution by a storage unit in a dispersed storage network (DSN) includes selecting a storage zone of a memory device of the storage unit based on zone allocation parameters, and designating the selected storage zone as open for writes. A data slice is received via a network for storage. The data slice is written sequentially at a memory location of the one of storage zone based on determining that the storage zone is designated as open for writes. A pointer corresponding to the data slice that indicates the storage zone and the memory location is generated. A read request is received via the network from a requesting entity that indicates the data slice. The data slice is retrieved from the memory device based on the pointer, and is transmitted to the requesting entity.

Abstract: To manage memory in a multi-processing system, a memory budget is assigned to each of a number of agents within the multi-processing system. A portion of memory is allocated to each the agents within the memory budget. Metrics are collected for each agent during processing of data by the agents; the metrics include an amount of data processed and an amount of memory used for each agent. Memory efficiency is determined for each agent based on the collected metrics and another memory budget is determined based on the memory efficiency. The portion of the memory is reallocated to the agents within the other memory budget in response to data stored in the memory relative to the assigned memory budget meeting a criterion.

Abstract: The present disclosure directs to solutions for performing deduplication by a storage device. In the solutions, according to a duplicate data locality principle, non-duplicate data blocks whose logical addresses are contiguous are stored in contiguous physical addresses in a sequence of the logical addresses, and fingerprints of the non-duplicate data blocks whose logical addresses are contiguous are also stored in contiguous physical addresses in the sequence of the logical addresses, and in addition, a mapping from a logical address, which is of one data block in the non-duplicate data blocks whose logical addresses are contiguous, to an aggregation address is established.

Abstract: A computer-implemented method according to one embodiment includes intercepting one or more updates made to a catalog data set, storing the one or more updates in an update buffer, retrieving the one or more updates from the update buffer, sequentially applying the one or more updates to a backup catalog data set, identifying a request to replace the catalog data set, and replacing the catalog data set with the backup catalog data set, in response to the request.

Abstract: Data compression techniques are provided that remove redundancy across the boundary of compression search engines. An illustrative method comprises splitting the data frame into a plurality of sub-chunks; comparing at least two of the plurality of sub-chunks to one another to remove at least one sub-chunk from the plurality of sub-chunks that substantially matches at least one other sub-chunk to generate a remaining plurality of sub-chunks; generating matching sub-chunk information for data reconstruction identifying the at least one removed sub-chunk and the corresponding substantially matched at least one other sub-chunk; grouping the remaining plurality of sub-chunks into sub-units; removing substantially repeated patterns within the sub-units to generate corresponding compressed sub-units; and combining the compressed sub-units with the matching sub-chunk information to generate a compressed data frame.

Abstract: Disclosed herein are a memory device and a method of operating the memory device. The memory device may include a memory cell array, a peripheral circuit, and a control logic. The memory cell may a plurality of main memory blocks and a plurality of sub-memory blocks included in each of the main memory blocks. The peripheral circuit may perform a program operation on the main memory blocks or the sub-memory blocks, detect an amount of data loaded for the program operation, and output data amount information. The control logic may control the peripheral circuits so that, during the program operation, at least one memory block is selected from the main memory blocks or from the sub-memory blocks according to the data amount information and the program operation is performed on the selected memory block.

Abstract: Embodiments include method, systems and computer program products for operating a resettable write once read many (RWORM) memory. The method includes receiving, by a processor, a request for at least a portion of memory in a computer system to be designated as RWORM memory. The processor further writes data to the RWORM memory. The processor further maintains the RWORM memory in a read-only state after the RWORM memory is written to. The processor further re-designates the RWORM memory to a read/write state in response to encountering a system reset.

Abstract: A storage system includes a first storage apparatus including a first storage portion and a second storage portion, a second storage apparatus including a third storage portion and a fourth storage portion, and a storage management apparatus including a processor configured to control the first storage apparatus in an active state and control the second storage apparatus in a standby state, cause the first storage apparatus to execute first data relocation processing, cause the second storage apparatus to execute second data relocation processing, cause the first storage apparatus to suspend the first data relocation processing and cause the second storage apparatus to continue the second data relocation processing, switch the first storage apparatus from the active state to the standby state and switch the second storage apparatus from the standby state to the active state, and cause the first storage apparatus to resume the first data relocation processing.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.