Abstract: A display may have thin-film transistor circuitry that includes organic light-emitting diodes. The thin-film transistor circuitry may be formed on a substrate. First and second thin-film inorganic moisture barrier layers may be deposited on top of the thin-film transistor circuitry. An organic planarization layer may be interposed between the first and second thin-film inorganic moisture barrier layers. A moisture barrier glass layer may be attached to the second thin-film inorganic moisture barrier layer with a layer of liquid adhesive. The display may have functional layers such as a touch sensor and circular polarizer that are interposed between a cover glass layer and the moisture-barrier glass layer. A thermoplastic polymer moisture barrier ring that runs around the peripheral edge of the display may be laser welded between the moisture barrier glass layer and the substrate.

Abstract: An integrated circuit packaging system, and a method of manufacture thereof, including: a substrate including: a first trace layer, an encapsulation on the first trace layer, the first trace layer having a surface exposed from the encapsulation with a rough texture characteristic of removal of a conductive carrier coating, a second trace layer on the encapsulation and over the first trace layer, the second trace layer connected to the first trace layer; and an integrated circuit die attached to the substrate.

Abstract: A substrate includes a driving transistor, a capacitor, a driving voltage line, and a connection line. The driving transistor has a gate electrode overlapping a channel region of a curved active layer. The capacitor has a first electrode is formed of the gate electrode of the driving transistor and a second electrode overlapping the first electrode. The driving voltage line includes driving voltage line portions on the capacitor and connected to edges of the second electrode of the capacitor. The first connection line is located at a portion of a region on the capacitor separated from the driving voltage line. A via hole is on the first connection line.

Abstract: A light-emitting structure, comprising a substrate; a first unit and a second unit, separately formed on the substrate; a trench between the first unit and the second unit, comprising a bottom portion exposing the substrate; an insulating layer arranged on the trench, conformably covering the bottom portion and sidewalls of the first unit and the second unit; and an electrical connection, conformably covering the insulating layer, electrically connecting the first unit and the second unit and comprising a bridging portion and a joining portion extending from the bridging portion, wherein the bridging portion is wider than the joining portion and the bridging portion covers the trench, and the joining portion covers the first unit and the second unit.

Abstract: Disclosed is an organic light emitting device comprising an anode; a cathode; and a plurality of stacks formed between the anode and the cathode. The plurality of stacks respectively emit their respective light of colors different from one another, wherein the plurality of stacks include a stack emitting blue light and a stack emitting mixed light of blue light and yellow-green to red light. Because the organic light emitting device includes a stack emitting blue light and a stack emitting mixed light of yellow-green to red light and blue light, blue light having a relatively low efficiency may be emitted from the two stacks, whereby overall light emitting efficiency is improved.

Abstract: An organic light-emitting display apparatus includes: a substrate; pixels defined on the substrate, where each pixel includes a first region including a light-emitting region and a second region including a transmission region; a third region defined on the substrate disposed between the pixels; first electrodes disposed in the pixels on the substrate, respectively, where each first electrode is disposed in the first region of a corresponding pixel; an organic emission layer disposed to cover the first electrodes; a first auxiliary layer disposed on the organic emission layer in the second region and which exposes the first region; a second electrode disposed on the organic emission layer in the first region; a second auxiliary layer disposed in the first and second regions and which exposes the third region; and a third electrode disposed in the third region and in contact with the second electrode.

Abstract: A semiconductor device has a semiconductor wafer with an interconnect structure formed over a first surface of the wafer. A trench is formed in a non-active area of the semiconductor wafer from the first surface partially through the semiconductor wafer. A protective coating is formed over the first surface and into the trench. A lamination tape is applied over the protective coating. A portion of a second surface of the semiconductor wafer is removed by backgrinding or wafer thinning to expose the protecting coating in the trench. A die attach film is applied over the second surface of the semiconductor wafer. A cut or modified region is formed in the die attach film under the trench using a laser. The semiconductor wafer is expanded to separate the cut or modified region of the die attach film and singulate the semiconductor wafer.

Abstract: Apparatuses capable of and techniques for detecting long wavelength radiation are provided.

Abstract: A stack is formed over a substrate, which comprises an alternating plurality of first material layers including a first material and second material layers including a second material. A patterned hard mask is formed, which includes multiple laterally spaced apart strips. A trimming material layer is formed over the hard mask layer. At least one cycle of process steps is subsequent performed, which include etching the first material employing the second material and the trimming material layer as an etch mask, trimming the trimming material layer to expose a strip of the hard mask layer, etching the second material and the exposed strip of the hard mask layer employing the trimming material layer as an etch mask, and trimming the trimming material layer to expose an edge of a next strip of the hard mask layer. Stepped surfaces suitable for formation of contact via array can thus be formed.

Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes red, green, and blue pixels. Each pixel includes a pixel electrode, a hole auxiliary layer formed over the pixel electrode, and an organic emission layer formed over the hole auxiliary layer. Each pixel also includes an electron auxiliary layer formed over the organic emission layer, and a common electrode formed over the electron auxiliary layer. Each of the red and green pixels further includes a host layer formed between the hole auxiliary layer and the organic emission layer and a resonance layer formed between the host layer and the organic emission layer.

Abstract: A structure and method for providing a multiple silicide integration is provided. An embodiment comprises forming a first transistor and a second transistor on a substrate. The first transistor is masked and a first silicide region is formed on the second transistor. The second transistor is then masked and a second silicide region is formed on the first transistor, thereby allowing for device specific silicide regions to be formed on the separate devices.

Abstract: Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for RF circuitry and the second region comprising devices for other circuitry. The method further includes forming patterns for redistribution lines on a photo resist layer, the photo resist layer disposed under the back surface, and filling the through substrate opening and the patterns for redistribution lines with a conductive material.

Abstract: A method for forming a magnetic sensor includes: forming a hard mask film on a tantalum nitride film; forming a patterned photoresist layer on the hard mask film; implementing an isotropic dry etching process to the hard mask film by taking the photoresist layer as a mask, so as to form a hard mask layer; and implementing an etching process to the tantalum nitride film and the magnetic film by taking the hard mask layer as a mask, so as to form a tantalum nitride layer and a magnetic resistive layer. As an isotropic dry etching process is implemented to the hard mask film, the hard mask film located which is above the other sidewalls and is not used for forming the magnetic sensor can be effectively removed. In addition, shadow effect will not take place, thus dimension of the magnetic sensor formed is able to be easily controlled.

Abstract: A semiconductor device and a method for fabricating the device. The method includes: providing a FinFET having a source/drain region, at least one SiGe fin, a silicon substrate, a local oxide layer is formed on the silicon substrate, a gate structure is formed on the at least one SiGe fin and the local oxide layer, the gate structure is encapsulated by a gate hard mask and sidewall spacer layers; recessing the at least one SiGe fin in the source/drain region to the sidewall spacer layers and the silicon substrate layer; recessing the local oxide layer in the source/drain region to the sidewall spacer layer and the silicon substrate; growing a n-doped silicon layer on the silicon substrate; growing a p-doped silicon layer or p-doped SiGe layer on the n-doped silicon layer; and forming a silicide layer on the p-doped silicon layer or p-doped SiGe layer.

Abstract: There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.

Abstract: A display apparatus includes a substrate, a display unit, a first metal oxide layer on the display unit, and a second metal oxide layer. The display unit may include an emission region and a non-emission region. The second metal oxide layer may be on the first metal oxide layer in the non-emission region. The first metal oxide layer and the second metal oxide layer may each include a metal oxide, the transparency of which varies according to a degree of oxidization of the metal oxide.

Abstract: A light-emitting device (LED) package component includes a carrier wafer. The carrier wafer includes a first through-substrate via (TSV) configured to electrically connecting features on opposite sides of the carrier wafer. A light-emitting device (LED) is bonded onto the carrier wafer. The LED are electrically connected to the first TSV. A conductive thermal interface material (TIM) is located between, and adjoining, the first TSV and the LED.

Abstract: An organic light-emitting display apparatus including a shield layer and a method of manufacturing the same are provided. The organic light-emitting display apparatus includes a substrate having a display area and a peripheral area surrounding the display area. A plurality of first thin film transistors (TFTs) are disposed in the display area of the substrate and a plurality of second TFTs disposed in the peripheral area of the substrate. A shield layer is positioned above the second TFTs and extended to an edge portion of the substrate. The shield layer includes a plurality of through holes in a portion that does not overlap with the second TFTs.

Abstract: A semiconductor device includes a first insulating film formed above a semiconductor substrate, a fuse formed above the first insulating film, a second insulating film formed above the first insulating film and the fuse and including an opening reaching the fuse, and a third insulating film formed above the second insulating film and in the opening.

Abstract: A method includes forming an n-FET device and a p-FET device on a substrate, each of the n-FET device and the p-FET device include a metal gate stack consisting of a titanium-aluminum carbide (TiAlC) layer above and in direct contact with a titanium nitride (TiN) cap, and removing, from the p-FET device, the TiAlC layer selective to the TiN cap. The removal of the TiAlC layer includes using a selective TiAlC to TiN wet etch chemistry solution with a substantially high TiAlC to TiN etch ratio such that the TiN cap remains in the p-FET device.