Patents Examined by Elmira Mehrmanesh
  • Patent number: 11093323
    Abstract: Techniques are disclosed for reducing the time required to read and write data to memory. Data reads and/or writes can be delayed when error correction code (ECC) bits, which are used to detect and/or correct data corruption, are written to memory. Writing ECC bits can take longer in some instances than writing data bits because an ECC write may involve a read/modify/write operation, as opposed to just simply writing the bits to memory. Some latencies associated with writing ECC bits can be hidden by interleaving ECC writes with data writes. However, if insufficient data writes are available for interleaving, hiding such latencies become difficult. Thus, various techniques are disclosed, for example, where ECC writes are deferred until a sufficient number of data writes become available for interleaving. By interleaving ECC writes, the disclosed techniques decrease the overall time required to read and write data to memory.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: August 17, 2021
    Assignee: NVIDIA Corporation
    Inventors: Ashutosh Pandey, Jay Gupta, Kaushal Agarwal, Justin Bennett, Srinivas Santosh Kumar Madugula
  • Patent number: 11086721
    Abstract: Resolving software patch issues is provided. Recorded activities performed by users to resolve an issue with a patch applied to an application on a group of client devices are compared. A set of common user activities are identified within the recorded activities performed by the users. A subset of highest ranking common user activities is selected from the set of common user activities. A fix for the issue with the patch is generated based on the subset of highest ranking common user activities. Corrective action based on the fix is taken to resolve the issue with the patch on a client device, the client device experiencing the issue resolved by users on the group of client devices.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: August 10, 2021
    Assignee: International Business Machines Corporation
    Inventors: John O'Malley, Michael Ryan
  • Patent number: 11074144
    Abstract: Before an active program replacement is carried out, a storage controller confirms a communication state between a redundant storage controller having a redundant configuration with the storage controller and the second storage device, and prohibits, in a case where an abnormality is detected in the communication state between the redundant storage controller and the second storage device, the active program replacement of the first storage controller. This inhibits occurrence of system down when active firmware replacement process is to be carried out in a storage system including multiple storage devices connected to one another.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: July 27, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Tomohiko Muroyama, Masahiro Yoshida, Atsushi Takakura
  • Patent number: 11076181
    Abstract: A system and corresponding method facilitate resolution of discontinuities in manifest files used in the distribution of stored content. Resolution of discontinuities includes identifying each of a discontinuity in a first manifest file and a corresponding entry in a second manifest file for the same or substantially similar content segment stored at a different location. A combined manifest file is then generated by inserting the entry of the second manifest file or otherwise inserting the location information of the second manifest file entry into the first manifest file. The systems and methods herein may be implemented at various locations within a system for providing content to a client device and may be implemented at various times in the process of generating or distributing content.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: July 27, 2021
    Assignee: Level 3 Communications, LLC
    Inventor: Kevin C. Johns
  • Patent number: 11068331
    Abstract: A processing system includes a processing unit configured to be connected to a memory with error detection and/or correction. The processing unit generates at least one read request for reading data from the memory, the read request including an address signal identifying an address of a given memory area in the memory. The processing system includes an error handling circuit connected to the memory for receiving an error signal containing an error code indicating whether the data read from the memory contains errors. The error handling circuit includes a hardware circuit configured to set a first error signal to the error code of the error signal when the address indicated by the address signal belongs to a first address range and to set a second error signal to the error code of the error signal when the address indicated by the address signal belongs to a second address range.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: July 20, 2021
    Assignee: STMICROELECTRONICS APPLICATION GMBH
    Inventor: Roberto Colombo
  • Patent number: 11048595
    Abstract: Examples of systems described herein include a virtualized file servers. Examples of virtualized file servers described herein may support disaster recovery of the virtualized file server. Accordingly, examples of virtualized file servers may support metadata fixing procedures to update metadata in a recovery setting. Examples of virtualized file servers may support hypervisor-agnostic disaster recovery.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: June 29, 2021
    Assignee: Nutanix, Inc.
    Inventors: Anil Kumar Gopalapura Venkatesh, Devyani Suryakant Kanada, Kalpesh Ashok Bafna, Mausumi Ranasingh, Saurabh Tyagi, Vijaykumar Bellubbi
  • Patent number: 11048581
    Abstract: A system and method for advanced storage device telemetry. The system includes multiple SSDs. I/O is executed on the SSDs in conjunction with a host software. As the I/O is executed, error log information is stored in a persistent memory as well as in a volatile memory. In various embodiments, granular performance information for the execution of the I/O is also stored in a persistent memory.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: June 29, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Vikas K. Sinha, Indira Joshi, Stephen G. Fischer
  • Patent number: 11042468
    Abstract: A method for debugging a software program is provided when the software program is executed on a processor. An asynchronous debug event is detected. The asynchronous debug event is tracked through a data pipeline to the processor. In one embodiment, the asynchronous debug event is acted on only when the processor is ready to consume a data element associated with the asynchronous debug event.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: June 22, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Joseph Raymond Michael Zbiciak, Jason Lynn Peck
  • Patent number: 11023342
    Abstract: Techniques are disclosed relating to cache debug using control registers based on debug commands. In some embodiments, an apparatus includes a processor core, debug circuitry, and control circuitry. In some embodiments, the debug circuitry is configured to receive external debug inputs and send abstract commands to the processor core based on the external debug inputs. In some embodiments, the control circuitry is configured to, in response to an abstract command to read data from the cache: write cache address information to a first control register, assert a trigger signal to cause a read of the data from the cache to a second control register, based on the cache address information in the first control register, and send data from the second control register to the debug circuitry. In various embodiments, this may facilitate hardware cache debug using debug circuitry that also controls software debugging.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: June 1, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jama I. Barreh, Robert T. Golla, Thomas M. Wicki, Matthew B. Smittle
  • Patent number: 11023362
    Abstract: An apparatus, a computer program product and a method for co-verification of systems comprising software and hardware components. The method comprises obtaining an over-approximation of the system that over-approximates the software or the hardware by using a non-deterministic version thereof; performing simulation of the over-approximation of the system; and utilizing an outcome of the simulation to guide a co-simulation of the system. The co-simulation comprises instrumenting the software to identify whether the coverage goals are reached during execution, generating a test input for the system, simulating execution of the test input by the instrumented software, wherein during said simulating, stimuli provided from the instrumented software to underlying hardware is provided to a hardware simulator that is configured to simulate the hardware-under-test; determining a coverage of the execution of the test input, and utilizing the coverage information in a successive iteration of the method.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: June 1, 2021
    Assignee: International Business Machines Corporation
    Inventors: Fady Copty, Dov Murik, Sharon Keidar Barner
  • Patent number: 11010225
    Abstract: An electronic control unit includes a computer that outputs a monitoring signal and an external monitoring circuit that monitors a state of the computer based on the monitoring signal. The computer includes a monitoring signal output section that generates and outputs the monitoring signal to the external monitoring circuit by performing a software process; a self-diagnostic section that self-diagnoses the computer and detects an abnormality by identifying a cause of the abnormality; and a break signal output section that outputs a break signal to interrupt an input of the monitoring signal to the external monitoring circuit by performing a hardware process when an abnormality in the monitoring signal output section is detected.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: May 18, 2021
    Assignee: DENSO CORPORATION
    Inventors: Daichi Marui, Mitsuru Aoki
  • Patent number: 11003573
    Abstract: An apparatus, a computer program product and a method for co-verification of systems comprising software and hardware components. The method comprises obtaining an over-approximation of the system that over-approximates the software or the hardware by using a non-deterministic version thereof; performing simulation of the over-approximation of the system; and utilizing an outcome of the simulation to guide a co-simulation of the system. The co-simulation comprises instrumenting the software to identify whether the coverage goals are reached during execution, generating a test input for the system, simulating execution of the test input by the instrumented software, wherein during said simulating, stimuli provided from the instrumented software to underlying hardware is provided to a hardware simulator that is configured to simulate the hardware-under-test; determining a coverage of the execution of the test input, and utilizing the coverage information in a successive iteration of the method.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: May 11, 2021
    Assignee: International Business Machines Corporation
    Inventors: Fady Copty, Dov Murik, Sharon Keidar Barner
  • Patent number: 10997009
    Abstract: The current document is directed to methods and systems for detecting the occurrences of abnormal events and operational behaviors within the distributed computer system. The currently described methods and systems continuously collect metric data from various metric-data sources, generate a sequence of metric-data observations, each metric-data observation comprising a set of temporally aligned metric data, and employ principle-component analysis to transform the metric-data observations to facilitate reduction of the dimensionality of the metric-data observations.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: May 4, 2021
    Assignee: VMware, Inc.
    Inventors: Arnak Poghosyan, Ashot Nshan Harutyunyan, Naira Movses Grigoryan, Nicholas Kushmerick
  • Patent number: 10990492
    Abstract: A transaction terminals reports information regarding operation of terminal to a server-based analyzer. The analyzer labels the information and normalizes the labeled information into a model format. The analyzer reports the model format to a problem identifier/resolver. The problem identifier/resolver identifies a closest likely problem and a resolution for that closest likely problem based on the labeled information in the model format and reports the likely problem and resolution back to the analyzer for resolution on the transaction terminal.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: April 27, 2021
    Assignee: NCR Corporation
    Inventor: Surisetty Pradeep Kumar
  • Patent number: 10992598
    Abstract: A storage system switching between mediation models within a storage system, where the switching between mediation models includes: determining, among one or more of the plurality of storage systems, a change in availability of a mediator service, wherein one or more of the plurality of storage systems are configured to request mediation from the mediator service in response to a fault; and communicating, among the plurality of storage systems and responsive to determining the change in availability of the mediator service, a fault response model to be used as an alternate to the mediator service among one or more of the plurality of storage systems.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: April 27, 2021
    Assignee: Pure Storage, Inc.
    Inventors: David Grunwald, Ronald Karr, Thomas Gill, Zoheb Shivani, John Colgrove, Connor Brooks, Claudiu Schmidt
  • Patent number: 10983886
    Abstract: Methods, apparatuses and systems for cloud-based disaster recovery are provided. The method, for example, includes receiving, at a cloud-based computing platform, backup information associated with backup vendors used by a client machine; storing, at the cloud-based computing platform, the backup information associated with the backup vendors; periodically updating, at the cloud-based computing platform, the backup information associated with each of the backup vendors at a predetermined polling interval for each of the backup vendors; receiving, at the cloud-based computing platform from the client machine, a failure indication for a server associated with at least one of the backup vendors; and restoring the server using the stored backup information at the cloud-based computing platform.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: April 20, 2021
    Assignee: Storage Engine, Inc.
    Inventors: Trevor Savino, James Patrick Hart, Justin Furniss, Charles Wooley
  • Patent number: 10983887
    Abstract: A method, apparatus and computer program product to be employed by a hardware component under validation, wherein the hardware component having a plurality of processing units each belonging to one of at least two types, such that one of the at least two types of processing units is less error-prone then a remainder of the at least two types. The method comprising: designating one of the processing units of the hardware component under validation that belongs to the less error-prone type as a manager processing unit; initiating execution of a tester program code for testing processing units, by processing units of the hardware component other than the manager processing unit; and, monitoring by the manager processing unit the status of the processing units during execution of the tester program code.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: April 20, 2021
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Boem Park, Amir Nahir, Vitali Sokhin, Wisam Kadry, Jin Sung Park, Ara Cho
  • Patent number: 10986009
    Abstract: Techniques for cross-layer troubleshooting of application delivery are disclosed. In some embodiments, cross-layer troubleshooting of application delivery includes collecting test results from a plurality of distributed agents for a plurality of application delivery layers; and generating a graphical visualization of an application delivery state based on the test results for the plurality of application delivery layers (e.g., different application delivery layers).
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: April 20, 2021
    Assignee: ThousandEyes, Inc.
    Inventors: Mohit V. Lad, Ricardo V. Oliveira, Michael Meisel, Ryan Braud
  • Patent number: 10977140
    Abstract: Managing traffic on a distributed system includes partitioning VCE load balancers of the distributed system among service virtual server instances (SVSIs) of the distributed system, each service virtual server instance (SVSI) being identical in function and deployed across two or more regions of the distributed system. The method further includes: periodically polling, by each SVSI each other of the SVSIs; monitoring, by each SVSI, a load on each VCE load balancer for which it is responsible, resulting in a monitored load; recovering, by an SVSI from a failure of VCE load balancer(s) for which it is responsible; automatically adjusting, by an SVSI a capacity of a VCE load balancer for which it is responsible based on a corresponding monitored load; and repartitioning, by the distributed system, in response to an SVSI failure, the VCE load balancers among remaining SVSIs.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: April 13, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zhenwei Hu, Jayakrishna Kidambi, Suryanarayan Ramamurthy
  • Patent number: 10977141
    Abstract: Described herein are methods, systems, and software for accommodating failover of a content node in a content delivery network. In one example, a method of operating a content node includes receiving a communication for an end user device from a control node, wherein an interrupted content node previously handled the communication. The method further includes determining if the communication includes a synchronization packet and identifying connection information for the communication. The method also provides, if the communication includes a synchronization packet, accepting the communication and handling delivery for the end user device. The method also includes, if the communication does not include the synchronization packet, determining if a match exists between the connection information for the communication and connection information stored in a flow table, and handling the communication based on the match.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: April 13, 2021
    Assignee: Fastly, Inc.
    Inventor: João Diogo Taveira Araújo