Patents Examined by Elmira Mehrmanesh
  • Patent number: 10970150
    Abstract: Systems and methods for detecting and managing incidents are disclosed. In one embodiment, a method for detecting an incident includes receiving issue data created for an issue tracking system; analyzing the received issue data over a predetermined interval; determining whether a potential incident has occurred based on the analysis; upon determining that a potential incident has occurred, creating an incident management assistant program; identifying one or more relevant users to communicate an alert to; and communicating the alert to the identified relevant users, the alert including a pointer to the incident management program.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: April 6, 2021
    Assignees: ATLASSIAN PTY LTD., ATLASSIAN INC.
    Inventors: Matthew David Hunter, Matthew Craig Saxby, Michael David Howells
  • Patent number: 10956256
    Abstract: Client devices having deployed an application may experience a crash of the application. For example, a first client device may experience a first crash having a first crash signature of the application. After experiencing the first crash, a first device identification of the first client device may be assigned to a first bucket designating one or more device identifications of client devices having experienced the first crash. Client devices having device identifications in the first bucket are provided with a first crash fix for the first crash, while a second client device is not provide with the first crash fix, where the application is deployed on the second client device and the second client device was not assigned to the first bucket.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: March 23, 2021
    Assignee: Verizon Media Inc.
    Inventors: Andreas Rossbacher, Brian Coe, Jon Herron, Alex Hanuska
  • Patent number: 10951235
    Abstract: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes LDPC decoding circuitry comprising a Q message generator and a P sum adder array. The Q message generator combines an R message from a previous iteration with a P message to produce a Q message. The P sum adder array adds the P message to a difference of an R message from a current iteration and the R message from the previous iteration to produce an updated P message.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: March 16, 2021
    Assignee: The Texas A&M University System
    Inventors: Kiran Kumar Gunnam, Gwan S. Choi
  • Patent number: 10949278
    Abstract: Certain aspects of the present disclosure provide apparatus and techniques for communicating error information during memory operations. For example, certain aspects of the present disclosure may provide a method for memory operations. The method generally including receiving a command from a host device, performing memory operations corresponding to the command received from the host device, detecting an error during the memory operations, and communicating the error based on the detection, wherein the error is communicated before receiving another command from the host device.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: March 16, 2021
    Assignee: Qualcomm Incorporated
    Inventors: Asutosh Das, Vijay Viswanath, Ritesh Harjani, Srinivasan Karunelli
  • Patent number: 10949306
    Abstract: A method and apparatus of a device that recovers accessibility for an inaccessible virtual machine hosted by a cloud service provider is described. In an exemplary embodiment, the device receives an indication that a recovery disk has been attached to a virtual machine hosted by a cloud service provider, wherein the virtual machine is inaccessible to a client. In addition, the device executes an agent that recovers the accessibility of the virtual machine for the client.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: March 16, 2021
    Assignee: Arista Networks, Inc.
    Inventors: Uday Sushilendra Srinivasan, Chaitanya Lala, Prasanna Panchamukhi, Jayden Daniel Navarro, Rajagopalan Madapusi Ammanur
  • Patent number: 10949286
    Abstract: In one example in accordance with the present disclosure, a system for handling memory errors includes a memory module having volatile components and non-volatile components. The system includes a BIOS chip having BIOS code and a BIOS non-volatile (NV) memory. The BIOS NV memory stores error data associated with the memory module that was stored prior to a power-on or reset of the system. The system includes a processor to execute the BIOS code to, after the power-on or reset of the system end before an operating system is loaded; (1) read, from the BIOS NV memory, the error data; and (2) determine, based on the error data, whether to take a corrective action with respect to the memory module.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: March 16, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Robert J. Volentine, Frank L. Wu
  • Patent number: 10942817
    Abstract: Presented herein is functionality for using a recovery computing system to perform a failover where the recovery computing system is communicatively coupled to a homogeneous and/or heterogeneous primary computing system. In one embodiment, this functionality allows the recovery computing system to disconnect a first recovery application node from a contiguous storage volume after the contiguous storage volume had been created by the first recovery application node, and to then use a recovery gateway node to store replicated data on the continguous storage volume, where the recovery gateway node and the contiguous storage volume are both coupled to the recovery computing system. In response to detecting a failure on the primary computing system, performing a failover to the recovery computing system, where performing the failover comprises attaching the contiguous storage volume to a second recovery application node and bringing the second recovery application node online.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: March 9, 2021
    Assignee: Veritas Technologies LLC
    Inventors: Pooja Sarda, Anish A. Vaidya, Manjunath Mageswaran
  • Patent number: 10942824
    Abstract: Exemplary embodiments herein describe programming models and frameworks for providing parallel and resilient tasks. Tasks are created in accordance with predetermined structures. Defined tasks are stored as data objects in a shared pool of memory that is made up of disaggregated memory communicatively coupled via a high performance interconnect that supports atomic operations as descried herein. Heterogeneous compute nodes are configured to execute tasks stored in the shared memory. When compute nodes fail, they do not impact the shared memory, the tasks or other data stored in the shared memory, or the other non-failing compute nodes. The non-failing compute nodes can take on the responsibility of executing tasks owned by other compute nodes, including tasks of a compute node that fails, without needing a centralized manager or schedule to re-assign those tasks. Task processing can therefore be performed in parallel and without impact from node failures.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: March 9, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Haris Volos, Kimberly Keeton, Sharad Singhal, Yupu Zhang
  • Patent number: 10938623
    Abstract: In an example, a first graph representing a first set of combinations of computing elements and logical elements used in a computing environment is compared with a second set of combinations of computing elements and logical elements. The first set of combinations includes a plurality of element combinations. The comparison may be performed to identify a potentially faulty element combination among the first set of combinations.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: March 2, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Pavan Belur Gopalakrishna Upadhya, Vinay Sahadevappa Banakar, Maneesh Keshavan Bendiganavale, Naveena Kedlaya
  • Patent number: 10929268
    Abstract: Techniques are described for generating prediction metrics that describe one or more predicted characteristics and/or outcomes of a software development project. Implementations employ machine learning (ML) algorithms to develop prediction models to predict characteristics of a project. For example, the models can be employed to predict a number of defects that may be present in a software product that is produced by a software development project. A model can be trained using input data captured from previous software projects, such as data describing the feature set of a software product, the timeline for its development, the particular type or domain of software, a number of modules, functions, etc., the particular number and/or identity of personnel working on the project, and so forth. Such input data can be analyzed to extract features that are provided as training data to train a model that is used to predict project metrics.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: February 23, 2021
    Assignee: Accenture Global Solutions Limited
    Inventors: Sandeep Bhat, Rohit Shrikant Patwardhan
  • Patent number: 10929259
    Abstract: Systems and methods for performing diagnostic tests within a multi-tenant environment are described. Diagnostics are performed on one or more components, such as host computing devices. The one or more components send resulting diagnostic information to an ingester which collects the diagnostic information. The ingester then sends the diagnostic information to a database. A generator is able to query the information in the database and create metrics. Based at least in part on metrics, an alarm may be triggered.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: February 23, 2021
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Carl Bellingan, Matthew James Eddey, Anton André Eicher, Atle Normann Jorgensen, André Mostert
  • Patent number: 10915388
    Abstract: The data storage device includes a first memory having error correction capability, and a controller coupled to the first memory. The controller is configured to calculate an error count of the first memory. The controller is configured to report a message to a host when the controller determines that an alarm condition is satisfied. The alarm condition is related to the error count of the first memory and a threshold count.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: February 9, 2021
    Assignee: SILICON MOTION, INC.
    Inventors: Yi-Hua Pao, Wen-Chi Hu
  • Patent number: 10915309
    Abstract: A method and system including a technical configuration module; a software application; a technical configuration processor in communication with the technical configuration module and operative to execute processor-executable process steps to cause the system to: receive a change request including one or more changes to the software application; determine one or more changes to at least one object of a technical configuration of the changed software application; receive a virtual change request including a list of changed objects; and execute an update to the at least one object of the technical configuration based on the determined one or more changes received in the virtual change request. Numerous other aspects are provided.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 9, 2021
    Assignee: SAP SE
    Inventors: Kai Dehmann, Mathias Habich
  • Patent number: 10909009
    Abstract: A node for a distributed system includes computing resources and a node manager. The node manager identifies a failure of a second node of the distributed system; in response to identifying the failure: makes a first determination that the second node is a primary node of the distributed system; after making the first determination: identifies a new primary node by accessing a distributed system configuration stored in a primary share out-of-band management entity; and provides services of the distributed system to a client using the computing resources after identifying the new primary node.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: February 2, 2021
    Assignee: Dell Products L.P.
    Inventors: Rizwan Ali, Ravikanth Chaganti, Dharmesh M. Patel, Jenwei Hsieh
  • Patent number: 10909007
    Abstract: Provided are a storage system and a storage control method wherein, when communication is disabled (communication via a data communication path is disabled) in spite of replacement of a second CTL among a first CTL and the second CTL that are redundant storage controllers and that are coupled via the data communication path, the first CTL executes a write process of writing dirty data and data management information to one or more storage devices while maintaining acceptance of I/O requests from a host. The replaced second CTL reads the data management information from the one or more storage devices. The first CTL stops accepting I/O requests from the host. The replaced second CTL starts accepting I/O requests from the host.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: February 2, 2021
    Assignee: HITACHI, LTD.
    Inventors: Naoya Okamura, Masanori Fujii, Naoki Moritoki
  • Patent number: 10901848
    Abstract: Example peer storage systems, storage devices, and methods provide peer data recovery across a peer communication channel. Peer storage devices establish peer communication channels that communicate data among the peer storage devices. A storage device may identify storage media segments from their storage medium for recovery of failed data units. A peer storage device may be identified that contains recovery data for the failed data units. The recovery data may be received over the peer communication channel and the storage media segments may be recovered using the recovery data.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: January 26, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventor: Adam Roberts
  • Patent number: 10901852
    Abstract: Techniques for identifying and remedying performance issues of Virtualized Network Functions (VNFs) are discussed. An example system includes processor(s) configured to: process VNF Performance Measurement (PM) data received from a network Element Manager (EM) for a VNF; determine whether the VNF has a negative performance issue based on the VNF PM data; request that the EM create a Virtualization Resource (VR) PM job associated with a VR of the VNF when the VNF has the negative performance issue; process VR PM data received from the EM; determine whether to restart the VNF based on the VR PM data and the VNF PM data; and request a network function virtualization orchestrator (NFVO) to restart the VNF based on a determination to restart the VR.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: January 26, 2021
    Assignee: Apple Inc.
    Inventors: Joey Chou, Stephen Gooch, Meghashree Dattatri Kedalagudde
  • Patent number: 10901847
    Abstract: An apparatus comprises at least one processing device comprising a processor coupled to a memory that is configured to initiate a read data request utilizing a logical address of a content addressable storage system that maps to a physical address comprising an offset on a storage device that internally maps the offset to a first sector. The processing device is also configured to determine a health of the first sector responsive to the read data request failing, to recover data stored in the first sector responsive to the first sector being a bad sector, and to overwrite the recovered data to the logical address while maintaining the mapping to the physical address by directing a write of the recovered data to the offset to update the internal mapping of the offset in the storage device to a new physical location corresponding to a second sector different than the first sector.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: January 26, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Nimrod Shani, Anton Kucherov, Lior Kamran, Leron Fliess
  • Patent number: 10901861
    Abstract: Systems and methods are provided for performing a point-in-time restore of data of a first tenant of a multitenanted database system. Metadata can be located to identify an archival version of first data of the first tenant stored in immutable storage of the database system. The archival version includes a most recently committed version of each datum prior to a first point in time. By using the metadata, a restore reference set is mapped into a target database instance of the database system. The mapping can be performed when all existing data for a tenant is to be the archival version, and where versions of data and records committed after the point in time are not available to the target database instance.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: January 26, 2021
    Assignee: salesforce.com, inc.
    Inventors: Jameison Bear Martin, Nathaniel Wyatt, Patrick James Helland, Thomas Fanghaenel, Terry Chong, Subho Sanjay Chatterjee
  • Patent number: 10896114
    Abstract: Systems and methods for machine learning error prediction in storage arrays are described. In one embodiment, the method includes monitoring events of at least a first storage drive array, analyzing the monitored events using machine learning, identifying failure events based at least in part on the analysis and operating a prediction model engine to predict potential errors in storage drive arrays, the prediction model engine being built based at least in part on the analysis of the monitored events or the identifying of the failure events, or both.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: January 19, 2021
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventor: Sunil Savanur