Patents Examined by Eric Cardwell
  • Patent number: 11966329
    Abstract: A memory system having non-volatile media, a volatile memory, and a controller configured to process requests from a host system to store data in the non-volatile media or retrieve data from the non-volatile media. The non-volatile media has a quantity of memory units and stores an address map that defines logical addresses used in the requests in terms of physical addresses of the memory units in the non-volatile media. The host system has a memory connected to the memory system via a communication channel. The memory system has a cache manager that stores a first portion of the address map in the volatile memory of the memory system and a second portion of the address map in the memory of the host system. In response to an operation that uses a logical address defined in the second portion, the cache manager retrieves the second portion of the address map from the memory of the host system through the communication channel to the volatile memory of the memory system.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: April 23, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Alex Frolikov
  • Patent number: 11960371
    Abstract: A plurality of storage controllers configured to initiate an action based on redundant copies of metadata, such that a source authority of one of the plurality of storage controllers receives a message, records the message redundantly throughout the plurality of storage controllers, and delivers the message to a destination authority of a further one of the storage controllers responsive to achieving a level of redundancy for the redundant copies of the metadata regarding the message is provided, wherein at least one of the plurality of storage controllers comprises a zoned storage drive.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: April 16, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Robert Lee, Ronald Karr
  • Patent number: 11960777
    Abstract: Utilizing multiple redundancy schemes within a unified storage element, including: receiving, in a storage system at a unified storage element that integrates both fast durable storage and bulk durable storage, a data storage operation from a host computer; storing, in accordance with a first data resiliency technique that corresponds to a RAID N+R format, data corresponding to the data storage operation within the fast durable storage of the unified storage element; and responsive to determining that the complete RAID stripe has been written to the fast durable storage, moving a portion of the stored data from the fast durable storage to the bulk durable storage of the unified storage element, the bulk durable storage storing the data in accordance with a second data resiliency technique that corresponds to a RAID M+R format, wherein M is different from N.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: April 16, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Ronald Karr, Constantine Sapuntzakis, John Colgrove
  • Patent number: 11960736
    Abstract: The application discloses a memory controller coupled between a memory module and a host controller to control access of the host controller to the memory module, the memory controller comprising: a central buffer coupled to the host controller via a command/address bus to receive a command/address signal from the host controller, wherein the central buffer is configured to determine whether the command/address signal conforms to an authority management rule and configure a buffer control command based on the determination result, so that the buffer control command indicates whether to restrict access of the host controller to the memory module; and a data buffer coupled via a data buffer command channel to the central buffer to receive the buffer control command, wherein the data buffer is configured to selectively restrict access of the host controller to the memory module based on the buffer control command; wherein the buffer control command comprises a plurality of time-sequenced fields, and the central
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: April 16, 2024
    Assignee: MONTAGE TECHNOLOGY CO., LTD.
    Inventor: Yi Li
  • Patent number: 11960750
    Abstract: Replication of data from a primary computing system to a secondary computing system. The replication is single-threaded or multi-threaded depending on one or more characteristics of the data to be replicated. As an example, the characteristics could include the type of data being replicated and/or the variability on that data. Also, the multi-threading capabilities of the primary and secondary computing systems are determined. Then, based on the identified one or more characteristics of the data, the primary computing system decides whether to perform multi-threaded replication and the multi-threading parameters of the replication based on the one or more characteristics of that data, as well as on the multi-threading capabilities of the primary and secondary computing system.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: April 16, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Deepak Verma, Kesavan Shanmugam, Michael Gregory Montwill
  • Patent number: 11954344
    Abstract: An apparatus comprises at least one processing device. The at least one processing device is configured, for each of a plurality of logical storage devices of a storage system, to determine in a multi-path layer of a layered software stack of a host device a performance level for that logical storage device, to communicate the performance levels for respective ones of the logical storage devices from the multi-path layer of the layered software stack of the host device to at least one additional layer of the software stack above the multi-path layer, and to select particular ones of the logical storage devices for assignment to particular storage roles in the additional layer based at least in part on the communicated performance levels. The additional layer in some embodiments comprises an application layer configured to automatically select a particular one of the logical storage devices for a particular storage role.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: April 9, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Sanjib Mallick, Vinay G. Rao, Jay Jung, Arieh Don
  • Patent number: 11954354
    Abstract: A method for performing a backup operation includes obtaining, by a backup server, a backup request, wherein the backup request specifies a virtual machine to be backed up, wherein the virtual machine is hosted by a production host, and in response to the backup request: obtaining classification data from the backup agent, initiating a backup classification on an unprocessed backup associated with the virtual machine based on the classification data to obtain a sensitivity tag, and initiating a data processing on the unprocessed backup based on the sensitivity tag.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: April 9, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Mahesh Reddy Appireddygari Venkataramana, Gururaj Kulkarni, Swaroop Shankar D H
  • Patent number: 11947827
    Abstract: The disclosure herein describes enhancing data durability of a base component using a delta component. A delta component is generated based on the base component becoming unavailable. The delta component is configured to include unwritten storage space with an address space matching the base component and a tracking bitmap associated with data blocks of the address space of the delta component. Write operations targeted for the base component are routed to the delta component. Based on the routed write operations, bits associated with data blocks affected by the write operations are changed in the tracking bitmap. Based on the base component becoming available, data blocks affected by routed write operations are identified based on the tracking bitmap and the identified data blocks are synchronized from the delta component to the base component. The delta component is then removed.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: April 2, 2024
    Assignee: VMware, Inc.
    Inventors: Eric Knauft, Enning Xiang, Mansi Shah, Pascal Renauld, Yiqi Xu, Ojan Thornycroft, Pratik Desai, Zhihao Yao, Yizhou Luo
  • Patent number: 11928352
    Abstract: Systems and methods are described for performing persistent inflight tracking of operations (Ops) within a cross-site storage solution. According to one embodiment, a method comprises maintaining state information regarding a data synchronous replication status for a first storage object of a primary storage cluster and a second storage object of a secondary storage cluster. The state information facilitates automatic triggering of resynchronization for data replication between the first storage object and the second storage object. The method includes performing persistent inflight tracking of I/O operations with a first Op log of the primary storage cluster and a second Op log of the secondary storage cluster, establishing and comparing Op ranges for the first and second Op logs, and determining a relation between the Op range of the first Op log and the Op range of the second Op log to prevent divergence of Ops in the first and second Op logs and to support parallel split of the Ops.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: March 12, 2024
    Assignee: NetApp, Inc.
    Inventors: Krishna Murthy Chandraiah Setty Narasingarayanapeta, Preetham Shenoy, Divya Kathiresan, Rakesh Bhargava
  • Patent number: 11922061
    Abstract: Systems, apparatuses, and methods related to a memory device and an associated host device are described. The memory device and the host device can include control logic that allow the memory device and host device to share refresh-timing information, which may allow either the memory device or the host, or both, to manage operations during time that is dedicated to, but unused for, refresh or self-refresh operations. Refresh-timing information shared from the host device may indicate elapsed time since the host device issued a refresh command to the memory device and/or how much time remains before the host device is scheduled to issue another refresh command. Refresh-timing information shared from the memory device may indicate elapsed time since the memory device performed a self-refresh operation and/or how much time remains before the memory device is scheduled to initiate or undergo another self-refresh operation.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: March 5, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Kang-Yong Kim, Hyun Yoo Lee
  • Patent number: 11922026
    Abstract: The disclosed system prevents data loss by creating duplicates of data in parallel. The system creates in parallel a first multiplicity of copies of the data to store in a sub-queue associated with a queue. The system creates a second multiplicity of copies of the data, and stores in parallel the second multiplicity of copies of the data in multiple independent memory locations. The system obtains a copy of the data among the first multiplicity of copies of the data, and creates a third multiplicity of copies of the data based on the copy of the data. The system distributes in parallel the third multiplicity of copies of the data to multiple independent data storage devices.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: March 5, 2024
    Assignee: T-Mobile USA, Inc.
    Inventor: Vaishali Patil
  • Patent number: 11914883
    Abstract: A copy operation is received. The copy operation is of one or more files stored on a linear tape file system. The copy operation is performed in a plurality of units of extents of the one or more files.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: February 27, 2024
    Assignee: International Business Machines Corporation
    Inventors: Shinsuke Mitsuma, Tsuyoshi Miyamura, Hiroshi Itagaki, Tohru Hasegawa, Noriko Yamamoto, Atsushi Abe
  • Patent number: 11893260
    Abstract: Snapshots may be used to implement remote replication, for example, asynchronously, between a first storage system, A1, and a second storage system, A2. A1 may take a first snapshot, SS21, of a logical storage unit, R1. After the snapshot SS21 it taken, any dependent write operations associated with SS21 may be reconciled, and differences between SS21 and the last snapshot for R1, SS11, may be determined and recorded as a difference set. One or more replication instructions for R1 that include the write operations (or data and metadata corresponding thereto) of the difference set may be sent from A1 to A2. A2 may apply the differences to R2, and then take (activate) a snapshot of R2, SS22, which is a replica of SS21. After A2 activates SS22, A2 may send an acknowledgement to A1 indicating that SS22 has been activated, and A2 may take a next snapshot of R1.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: February 6, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Bhaskar Bora, Mark J. Halstead, Deepak Vokaliga, Benjamin Yoder, William R. Stronge
  • Patent number: 11861390
    Abstract: A processing device in a host computer system receives an instruction to write data to a storage device coupled to the host computer system and store a copy of the data in a cache of the host computer system. The processing device initiates a write operation to write the data from the cache to the storage device and detects that the storage device is disconnected from the host computer system during execution of the write operation. In response to detecting that the storage device is disconnected, the processing device may suspend execution of at least one of a virtual machine or a process that issued the first instruction. After determining that the storage device is reconnected to the host computer system, the processing device can resume the write operation to continue writing the data from the cache to the storage device.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 2, 2024
    Assignee: Parallels International GmbH
    Inventors: Alexander Grechishkin, Konstantin Ozerkov, Alexey Koryakin, Nikolay Dobrovolskiy, Serguei Beloussov
  • Patent number: 11861222
    Abstract: Systems, apparatuses, and methods related to object management in tiered memory systems are discussed. An example method can include writing a memory object to a first memory device of a first type of memory medium. The example method can include determining that a size of the memory object meets or exceeds a threshold data size. The example method can include writing the memory object to a second memory device that comprises a second type of memory medium different than the first type. The first memory medium can be a non-volatile memory comprising phase-change memory or resistive random access memory (RAM) and the second memory medium can be NAND Flash or NOR Flash.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: January 2, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Reshmi Basu
  • Patent number: 11853589
    Abstract: Systems and methods are described for performing persistent inflight tracking of operations (Ops) within a cross-site storage solution. According to one embodiment, a method comprises maintaining state information regarding a data synchronous replication status for a first storage object of a primary storage cluster and a second storage object of a secondary storage cluster. The method includes performing persistent inflight tracking of I/O operations with a first Op log of the primary storage cluster and a second Op log of the secondary storage cluster, establishing and comparing Op ranges for the first and second Op logs, and determining a relation between the Op range of the first Op log and the Op range of the second Op log to prevent divergence of Ops in the first and second Op logs and to support parallel split of the Ops.
    Type: Grant
    Filed: January 24, 2023
    Date of Patent: December 26, 2023
    Assignee: NetApp, Inc.
    Inventors: Krishna Murthy Chandraiah Setty Narasingarayanapeta, Preetham Shenoy, Divya Kathiresan, Rakesh Bhargava
  • Patent number: 11853571
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. By restricting the host to have a minimum write size, the data transfer speed to RAM2, RAM1, and the storage unit can be optimized. A temporary buffer is utilized within the RAM1 to update parity data for the corresponding commands. The parity data is updated in the RAM1 and written to the RAM2 in the corresponding stream. The parity data may be copied from the RAM2 to the RAM1 to update the parity data in the temporary buffer when commands are received to write data to corresponding streams. As the parity data is updated, the corresponding command is simultaneously written to the corresponding stream.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: December 26, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sergey Anatolievich Gorobets, Daniel L. Helmick, Peter Grayson
  • Patent number: 11853575
    Abstract: A method and system for data consistency across failure and recovery of infrastructure. In one embodiment of the method, copies of first data blocks stored in a source memory are sent to a target site via a data link. While sending one or more of the copies of the first data blocks to the target site, source hashes for second data blocks stored in the source memory are calculated, wherein the first data blocks are distinct from the second data blocks. While sending one or more of the copies of the first data blocks to the target site, target hashes of data blocks stored in a target memory of the target site are received. While sending one or more of the copies of the first data blocks to the target site, the source hashes are compared with the target hashes, respectively. After sending the first data blocks to the target site via the data link, copies of only those second data blocks are sent to the target site with source hashes that do not compare equally with respective target hashes.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: December 26, 2023
    Assignee: Veritas Technologies LLC
    Inventors: Rushikesh Patil, Vishal Thakur, Sunil Hasbe
  • Patent number: 11853178
    Abstract: According to one embodiment, a storage system includes a first storage including first nonvolatile memories storing data which is corrupted when data is read from the first nonvolatile memories, and a controller which controls the first storage. The controller reads data from a first nonvolatile memory at a first address, and determines that whether the read data is to be written back to the first storage or not.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: December 26, 2023
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Patent number: 11829623
    Abstract: A system can include a memory device, and a processing device, operatively coupled with the memory device, to perform operations of writing a first portion of data to one or more complete translation units of the memory device using a first number of logical levels per memory cell and writing a second portion of the data to one or more incomplete translation units of the memory device using the first number of logical levels per memory cell. The operations can also include writing a third portion of the data to one or more complete translation units of the memory device using a second number of logical levels per memory cell that exceeds the first number of logical levels per memory cell.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: November 28, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Ashutosh Malshe, Jianmin Huang, Jonathan S. Parry, Xiangang Luo