Patents Examined by Eric Cardwell
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Patent number: 12675226Abstract: Examples of the present disclosure disclose host and an operation method thereof, a memory system and an operation method thereof, and an electronic apparatus. The host is coupled with a memory system supporting a zone namespace function; the memory system includes a memory device, and the memory device includes K dies; the K dies are divided into N disturbance areas, each disturbance area includes at least one die, and one block in each die in the disturbance area constitutes a zone jointly; K and N are positive integers greater than or equal to 2; the host is configured to: send a command to the memory system to perform a respective operation on zones corresponding to the command at the same time, wherein the zones corresponding to the command belong to different disturbance areas.Type: GrantFiled: September 21, 2024Date of Patent: July 7, 2026Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Mo Cheng, Tianyi Wang
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Patent number: 12669961Abstract: Provided are a computer program product, system, and method for coordinating establishment of source and target copy relationships on primary and secondary servers. A command is received to establish a primary copy relationship of primary source data in the primary storage to copy to primary target data in the primary storage and a secondary copy relationship of secondary source data in the secondary storage to copy to secondary target data in the secondary storage. A determination is made as to whether a part of the secondary target data in a secondary pre-existing copy relationship at the secondary storage can be withdrawn from the secondary pre-existing copy relationship. In response to determining that the part of the secondary target data in the secondary pre-existing copy relationship can be withdrawn, establishing the primary copy relationship for the primary storage and establishing the secondary copy relationship for the secondary storage.Type: GrantFiled: November 28, 2022Date of Patent: June 30, 2026Assignee: International Business Machines CorporationInventors: Nedlaya Yazzie Francisco, Theresa Mary Brown, Gregory Edward McBride
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Patent number: 12669936Abstract: Methods, systems, and devices for folding operations for improved sequential read performance are described. A memory system may perform a single-die access operation to program data to source data blocks of the memory system. The memory system may reorder the data during folding to destination data blocks of the memory system such that a multi-die access operation may be performed to sequentially read the data from the destination data blocks. For example, data may be programmed to the source data blocks in a first order as part of a single-die access operation, and the data may be folded to the destination data blocks in a second order as part of a single-die access operation, where the supports sequentially reading the data from the destination data blocks as part of a multi-die access operation.Type: GrantFiled: December 22, 2023Date of Patent: June 30, 2026Assignee: Micron Technology, Inc.Inventors: Nitul Gohain, Nicola Colella, Jameer Mulani
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Patent number: 12669948Abstract: A memory module may include a first storage device, and a second storage device configured to receive information about a first temperature indicating an internal temperature of the first storage device and to change a threshold temperature from a first threshold temperature to a second threshold temperature different from the first threshold temperature based on the information, to enter a mode in which an internal temperature of the second storage device is controlled when the temperature of the second storage device is higher than the threshold temperature.Type: GrantFiled: January 17, 2024Date of Patent: June 30, 2026Assignee: SK hynix Inc.Inventors: Jeong Ho Jeon, Seok Ho Seo
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Patent number: 12663933Abstract: The present disclosure provides a storage management system, method, device, and machine-readable storage medium, the system including: a controller pool, to interact to-be-stored data and/or to-be-read data with an external device via network communication; a memory pool, to read and write high-speed temporary data and/or high-speed persistent data; an accelerator pool, to call a corresponding accelerator to process and distribute data according to a storage service type associated with data; a storage pool, to store to-be-stored data processed by the accelerator pool and/or read the to-be-read data; and a transmission module, to establish a system transmission network among the controller pool, the memory pool, the accelerator pool and the storage pool.Type: GrantFiled: December 5, 2024Date of Patent: June 23, 2026Assignee: NEW H3C INFORMATION TECHNOLOGIES CO., LTD.Inventor: Tianjie Zhang
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Patent number: 12663944Abstract: The invention introduces a method for controlling executions of input-output (I/O) commands, performed by a processing unit, which includes: obtaining a current temperature of a device side; fetching I/O commands from a command queue during a fetching time period, and executing the I/O commands to read user data from the flash module, and/or program user data into the flash module in response to the current temperature of the device side exceeding a threshold; calculating a length of an actual execution time period for the I/O commands, and calculating a length of a pause time period according to the length of the actual execution time period after the I/O commands are executed completely; and not fetching and executing any I/O command in the command queue during the pause time period.Type: GrantFiled: September 24, 2024Date of Patent: June 23, 2026Assignee: SILICON MOTION, INC.Inventors: Ting-Chu Lee, Cheng-Yu Tsai
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Patent number: 12650773Abstract: An example method for provisioning data volume for a virtual compute instance may include receiving a request to provision a data volume for a virtual compute instance. The request may specify a size of the data volume, a type of the data volume, and a first input/output operations per second (IOPS) value for the data volume. Further, the method may include determining a recommended IOPS value for the data volume by applying a logic to the specified size, the specified type, and the first IOPS value. Furthermore, the method may include provisioning the data volume for the virtual compute instance with the specified size, the specified type, and the recommended IOPS value.Type: GrantFiled: September 16, 2024Date of Patent: June 9, 2026Assignee: VMware LLCInventors: Nitin Ramachandra, Priyank Agarwal, Suchitha Shet, Prasanna Ganapathi, Ravi Kasha
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Patent number: 12645484Abstract: In a vehicle-mounted computer that includes a physical resource including a processor with a plurality of cores and a physical device with a register and generates a plurality of virtual devices by allocating the physical resource through time-division, the processor causes at least one virtual device of the plurality of virtual devices to operate on each of the plurality of cores periodically at a predetermined period and causes another virtual device of the plurality of virtual devices to operate non-periodically, stores the core on which the other virtual device operated, and determines the core on which the other virtual device is to operate, based on whether or not the core on which the other virtual device is to operate will be changed and a change amount of a register value of the physical device.Type: GrantFiled: December 10, 2021Date of Patent: June 2, 2026Assignees: Auto Networks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.Inventors: Tadahiro Takazawa, Koji Yasuda
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Patent number: 12639215Abstract: A host command to deallocate a memory device is received. A logical-to-physical (L2P) status data structure associated with a logical-to-physical (L2P) data structure is invalidated. The L2P mapping data structure includes a plurality of regions. Each region comprises a set of L2P address mappings and a region identifier identifying a respective region. The L2P status data structure includes a plurality of L2P status entries. An L2P status entry comprises a region identifier identifying a region of the plurality of regions of the L2P mapping data structure and a physical address identifying a location of the region of the L2P mapping data structure stored on the memory device. A host is notified that deallocation of the memory device is completed. Invalidation of the L2P mapping data structure is initiated.Type: GrantFiled: October 15, 2024Date of Patent: May 26, 2026Assignee: Micron Technology, Inc.Inventors: Andrei Konan, Randall David Barber
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Patent number: 12632182Abstract: A memory management method, a memory storage device, and a memory control circuit unit are disclosed. The memory management method includes: writing first data into N super physical programming units of a first super physical erasing unit in a plurality of super physical erasing units; generating N first temporary parity codes according to the first data and storing the N first temporary parity codes in a buffer memory; writing second data into M super physical programming units of a second super physical erasing unit in the plurality of super physical erasing units; performing an encoding operation on the second data and the N first temporary parity codes to generate N first parity codes; and writing the N first parity codes into the second super physical erasing unit.Type: GrantFiled: June 3, 2024Date of Patent: May 19, 2026Assignee: PHISON ELECTRONICS CORP.Inventor: Horng-Sheng Yan
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Patent number: 12619373Abstract: The present disclosure relates to method for checking the reading phase of a non-volatile memory device including at least an array of memory cells and with associated decoding and sensing circuitry and a memory controller, the method comprises: storing in a dummy row associated to said memory block at least internal block variables and a known pattern; performing a reading of said dummy row; comparing a result of the reading with the known pattern; trimming the parameters of the reading and/or swapping the used memory block based on the result of the comparing.Type: GrantFiled: November 26, 2024Date of Patent: May 5, 2026Inventors: Alberto Troia, Antonino Mondello
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Patent number: 12613639Abstract: The memory device is configured to program and erase data in a memory block according to both an SLC storage scheme and a multiple bits per memory cell (e.g., TLC) storage scheme. In operation, control circuitry receives a command to write data to the memory cells of the memory block in the TLC storage scheme and determine if already data stored in the memory block is in the SLC storage scheme or is in the TLC cell storage scheme. In response to a determination that the data contained in the memory block is in the SLC storage scheme, the control circuitry pre-programs the memory cells of the memory block and then erases the memory cells. In response to a determination that the data contained in the memory block is in the TLC storage scheme, then the control circuitry erases the memory cells without pre-programming.Type: GrantFiled: April 18, 2024Date of Patent: April 28, 2026Assignee: Sandisk Technologies, Inc.Inventors: Yanwei He, Henry Chin
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Patent number: 12608159Abstract: Gap processing is utilized to reorder out-of-order submissions on the normal submission queue. The controller is able to process logical block addresses (LBAs) that are received through the use of a normal NVMe submission queue (SQ) and a private SQ. The normal NVMe SQ will store the LBAs of commands that may arrive out of sequential order for processing. The private SQ is used to store an LBA that is received after a gap is detected. The private SQ is only read after a command is received on the normal SQ that contains the current First Gap LBA. If no entry in the private SQ is sequentially after the first gap LBA, no processing of the private SQ occurs. If the pulled LBA is next, then the LBA will be processed by the data storage device. If the pulled LBA is not next, then the zone gap processing will send the LBA back to the private SQ.Type: GrantFiled: February 14, 2024Date of Patent: April 21, 2026Assignee: Sandisk Technologies, Inc.Inventors: Amir Segev, Shay Benisty, David Meyer
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Patent number: 12602187Abstract: Systems and methods for collecting trace data via a memory device are disclosed. One method may include receiving, by the memory device, a command from a computing device; identifying, by the memory device, first data associated with the command; storing, by the memory device, the first data in a first portion of volatile memory of the memory device for reading by the computing device; and accessing, by the memory device, a second portion of the volatile memory, wherein the second portion of the volatile memory is configured to store a copy of second data stored in a non-volatile memory of the memory device.Type: GrantFiled: April 9, 2024Date of Patent: April 14, 2026Assignee: Samsung Electronics Co., Ltd.Inventors: Dongyang Li, Andrew Chang
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Patent number: 12591364Abstract: The subject application relates to in-situ compression of data in a main memory and storing of the compressed data in the same main memory to improve memory optimization. A hardware logic of a memory device may receive modified pages from a first portion of memory array, cause a page compression accelerator in the hardware logic to compress the received modified pages to generate compressed data, and facilitate storing of the compressed data to a second portion of memory array of the same memory device. By using in-situ data compression, memory optimization in a computing device is improved.Type: GrantFiled: May 21, 2024Date of Patent: March 31, 2026Assignee: Micron Technology, Inc.Inventors: Saideep Tiku, Poorna Kale
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Patent number: 12572468Abstract: A storage device, including: a nonvolatile memory device comprising a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device, select two or more erase units from among a plurality of erase units included in the plurality of memory cells to be allocated to each zone of the plurality of zones, fixedly and sequentially manage logical addresses of data to be written in the plurality of zones, and generate at least two map tables for the each zone.Type: GrantFiled: August 25, 2023Date of Patent: March 10, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seunghyun Choi, Keunsan Park, Joon-Whan Bae, Jooyoung Hwang, Gyeongmin Kim, Heetak Shin, Junyeong Han
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Patent number: 12561081Abstract: An object of the invention is to reduce a performance decrease in remote copy performed between a second storage system and a first storage system including a plurality of nodes. For each of a plurality of paths between the first and second storage systems, the path is a path that communicably connects any initiator port of the first storage system and any target port of the second storage system. The node includes a first VOL that forms a remote copy pair with a second VOL provided in the second storage system. When sending a command for the remote copy in the remote copy pair to the second storage system, the node selects, unless an abnormality related to the initiator port of the node is detected, the path connected to the initiator port, and sends the command via the selected path.Type: GrantFiled: February 27, 2024Date of Patent: February 24, 2026Assignee: HITACHI VANTARA, LTD.Inventors: Misato Yoshida, Takahiro Yamamoto
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Patent number: 12554427Abstract: Systems and methods for reducing read application in a virtual storage system are provided. According to one embodiment, read amplification is reduced when AZCS compression is being utilized by avoiding restarting of a read process via a slow path via a RAID layer of the virtual storage system when a data block associated with a read request and obtained via a first fast path read has been found not to be compressed. Instead, a second fast path read may be performed to obtain the corresponding checksum. Alternatively, or additionally, heuristics may be used to predict the odds of the data block being compressed. For example, when information encoded within a PVBN of the data block that identifies the PVBN as being within a compressed AZCS zone has shown to be sufficiently/insufficiently predictive of the data block being compressed, then a flag may be set to enable/disable fast path reads.Type: GrantFiled: July 22, 2024Date of Patent: February 17, 2026Assignee: NetApp, Inc.Inventors: Ritika, Jagadish Vasudeva, Vani Vully, Raj Kamal, Deepak Dangi, Parag Deshmukh
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Patent number: 12547336Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, and the flash memory module includes a plurality of blocks. The control method includes the steps of: obtaining a read count of a specific block; obtaining a time stamp of the specific block, wherein the time stamp is a write time of the specific block; calculating a time difference between a current system time and the time stamp of the specific block; and using the read count of the specific block and the time difference, and referring to a read count and threshold time mapping table to determine whether to arrange the specific block in a garbage collection pool.Type: GrantFiled: March 30, 2023Date of Patent: February 10, 2026Assignee: Silicon Motion, Inc.Inventor: Tsung-Chieh Yang
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Patent number: 12547350Abstract: In order to avoid writing duplicates of blocks of data into a storage platform, any virtual disk within the storage platform may have a de-duplication feature enabled. Or, all virtual disks have this feature enabled. For virtual disks with de-duplication enabled, a unique message digest is calculated for every block of data written to that virtual disk. Upon a write, these message digests are consulted in order to determine if a particular block of data has already been written, if so, it is not written again, and if not, it is written. All de-duplication virtual disks are written to a single system virtual disk within the storage platform. De-duplication occurs over the entire storage platform and over all its virtual disks because all message digests are consulted before a write is performed for any virtual disk. A read for a de-duplication virtual desk reads from the system virtual disk.Type: GrantFiled: August 22, 2024Date of Patent: February 10, 2026Assignee: Commvault Systems, Inc.Inventors: Avinash Lakshman, Gaurav Yadav