Abstract: Methods and apparatuses for preventing overflow at a receiver buffer are provided. Data packets of varying size are received into a receiver buffer and quantified by a byte counter to determine an amount of data in the receiver buffer at a given time. A data capacity status for the receiver buffer is then generated as a function of the amount of data in the receiver buffer.

Abstract: One or more systems, devices, methods, and/or processes described can determine a maximum cache command rate of a processor unit. For example, an interface of the processor unit is configured to be coupled to an interconnect of a multiprocessor system and is configured such that a first portion of the interface provides a signal to a second portion of the interface, where the first portion of the interface operates utilizing a known frequency and the second portion of the interface operates utilizing a cache frequency of the processor unit; the second portion of the interface circulates the signal; the first portion of the interface receives the signal from the second portion of the interface; the first portion of the interface determines a cache command rate based on the known frequency, the frequency of the cache, and the signal; and the interface provides information indicating the cache command rate to the interconnect.

Abstract: In a virtualized computer system in which a guest operating system runs on a virtual machine of a virtualized computer system, a computer-implemented method of providing the guest operating system with direct access to a hardware device coupled to the virtualized computer system via a communication interface, the method including: (a) obtaining first configuration register information corresponding to the hardware device, the hardware device connected to the virtualized computer system via the communication interface; (b) creating a passthrough device by copying at least part of the first configuration register information to generate second configuration register information corresponding to the passthrough device; and (c) enabling the guest operating system to directly access the hardware device corresponding to the passthrough device by providing access to the second configuration register information of the passthrough device.

Abstract: Embodiments of the present invention relate to a signal order-preserving method and apparatus. When data of a request signal that comes from a corresponding first upstream device is written into a first first input first output (FIFO) memory, invalid data is written into a second FIFO memory corresponding to a second upstream device in a same clock cycle; and the data of the request signal is read from the first FIFO memory, the invalid data is read from the second FIFO memory, the invalid data is discarded, and the data of the request signal is conveyed to a downstream device. Through the signal order-preserving method and apparatus in the embodiments of the present invention, the coupling extent between devices on which there is an order-preserving requirement is reduced while signal order-preserving is achieved.

Abstract: Semiconductor memory devices are provided. Each of the semiconductor memory devices may include first and second memory cells. The first memory cell may be connected to a bit line and a complementary bit line. Moreover, each of the semiconductor memory devices may include a discharge circuit connected to the first memory cell via the bit line and the complementary bit line. The discharge circuit may be configured to discharge the first memory cell during a read or write operation of the second memory cell.

Abstract: A mechanism is provided for recirculating transactions within a pipeline while reordering outputs. A set of transactions associated with a block of data is received and each transaction in the set of transactions is processed via the pipeline. For each transaction processed via the pipeline, responsive to the transaction exiting the pipeline, a determination is made as to whether the transaction needs further processing. Responsive to the transaction needing further processing, the transaction is re-circulated via the pipeline forming a recirculated transaction.

Abstract: A host configured to interact with a storage device includes a write-back (WB) cache configured to write data to the storage device, a cache managing module configured to manage the WB cache, and a file system module configured to determine whether live blocks in victim segments among a plurality of segments stored in the storage device are stored in the WB cache, to read the live blocks from the storage device as a consequence of determining that the live blocks are not stored in the WB cache, to load the read live blocks to the WB cache, and to request the cache managing module to set dirty flags for the stored live blocks.

Abstract: One or more systems, devices, methods, and/or processes described can determine a maximum cache command rate of a processor unit. For example, an interface of the processor unit configured to be coupled to an interconnect of a multiprocessor system and configured such that a first portion of the interface provides a signal to a second portion of the interface, where the first portion of the interface operates utilizing a known frequency and the second portion of the interface operates utilizing a cache frequency of the processor unit; the second portion of the interface circulates the signal; the first portion of the interface receives the signal from the second portion of the interface; the first portion of the interface determines a cache command rate based on the known frequency, the frequency of the cache, and the signal; and the interface provides information indicating the cache command rate to the interconnect.

Abstract: A transfer control circuit stores data in a FIFO memory, outputs data in the FIFO memory in response to a data request signal, and outputs a state signal in accordance with an amount of stored data in the FIFO memory. An output data generating unit outputs image data having a horizontal image size in accordance with a horizontal count value and a horizontal synchronizing signal, and thereafter, outputs blank data. When the state signal indicates that the FIFO memory is in a “EMPTY” or “MODERATE” storage state, a blank control unit outputs a blank addition signal until the FIFO memory changes to a “FULL” storage state.

Abstract: A method of interacting with data at a wireless communication device is provided. The wireless communication device has access to a first set of capabilities. Data is received at the wireless communication device via a wireless transmission. The data represents visual content that is viewable via a display device. A graphical user interface, including a delayed action selector, is provided via the display device. An input is received within a limited period of time after displaying the delayed action selector. The input is associated with a command to delay execution of an action with respect to the data until the wireless communication device has access to a second set of capabilities. The action is not supported by the first set of capabilities but is supported by the second set of capabilities. An indication of receipt of the input is provided at the wireless communication device.

Abstract: Atomic operations within an I/O device are supported by processor architectures that are not required to include specific atomic instructions, by issuing the atomic operations from an I/O hub. A descriptor that specifies the atomic operation and a target address is retrieved by, or sent to, the hub. A trigger event, which may be a programmed I/O write to the hub with an address of the descriptor, or the contents of the descriptor itself, causes the I/O hub to issue the atomic operation. When the atomic operation is complete on the I/O device interconnect, the result is returned to the hub and a host is notified. The host then retrieves the results of the atomic operation from the hub. The host notification can be performed by interrupt or by polling the hub until a status change is detected.

Abstract: A NFC mimic device retrieves peripheral information from a peripheral, stores the peripheral information and then mimics the peripheral information to an information handling system so that a NFC device of the information handling system receives the peripheral information as if provided directly from the peripheral. The NFC mimic device supports automated setup a wireless interface between an information handling system and a peripheral, such as a projector.

Abstract: A disclosed data processing system includes a processor and an operating system kernel that includes communication drivers to support sideband interrupt deferring of polling associated with I/O requests. The communication drivers may implement a driver stack that includes a sideband miniport driver to detect an application program read request for device data from an input/output (I/O) device. The I/O device may be a sensor or another type of human interface device. The sideband miniport driver may pend the read request and maintain an interrupt pipe of a communication transport between the host system and the I/O device in a disabled state. With the interrupt pipe disabled, the host system drivers are unable to poll the I/O device. The sideband miniport driver may pend the read request and keep the interrupt pipe disabled until a sideband interrupt is communicated to the sideband miniport driver.

Abstract: A computer program product is provided for performing a method including: receiving transmission data over a selected time interval for each of a plurality of communication paths; calculating an average round-trip transmission time for each of the plurality of communication paths over the time interval; comparing an average round-trip transmission time for a communication path having the highest average round-trip transmission time to a threshold value and to a multiple of an average round-trip transmission time for a communication path having the lowest average round-trip transmission time; and determining, based on a result of comparing the highest round-trip transmission time to the threshold value and to a multiple of the lowest round-trip transmission time, whether the time period indicates a delay in communication between the I/O subsystem and the control unit requiring at least one of a monitoring action and a recovery action.

Abstract: A system for enhancing universal serial bus (USB) applications comprises an upstream processor, a downstream processor and a main controller. The upstream processor accepts standard USB signals from a USB host and independently provides responses required by USB specification within the required time frame. The upstream processor also contains storage for descriptors for a device associated with this upstream processor. The main controller obtains the descriptors by commanding the downstream processor, and passes them to the upstream processor. The downstream processor connectable to USB-compliant devices accepts the USB signals from the USB-compliant devices and provides responses required by USB specification within the required time frame. The main controller interconnects the upstream and downstream processors, and provides timing independence between upstream and downstream timing. The main controller also commands the downstream processor to obtain device descriptors independent of the USB host.

Abstract: Embodiments of the present invention relate to a computer-implemented method that includes binary weaving a second computer program code into the byte code of a first computer program code using a code weaver to form a third program product with a plurality of time measurement points. The programs can include sending a request via a network requesting information from a server computer system. The embodiment of the present invention may include measuring the execution time between the execution of a start point to the execution of a corresponding stop point.

Abstract: A method of processing communications includes: receiving transmission data over a selected time interval for each of a plurality of communication paths between a host processor and a control unit configured to control at least one I/O device; calculating an average round-trip transmission time for each of the communication paths over the time interval; comparing an average round-trip transmission time for a communication path having the highest average round-trip transmission time to a threshold value and to a multiple of an average round-trip transmission time for a communication path having the lowest average round-trip transmission time; and determining, based on comparing the highest round-trip transmission time to the threshold value and to a multiple of the lowest round-trip transmission time, whether the time period indicates a delay in communication between the I/O subsystem and the control unit requiring at least one of a monitoring action and a recovery action.

Abstract: Several embodiments including methods, systems, and physical computer-readable storage media are configured to multiplex a single end-point memory (EPM) structure between a HS USB interface and a SS USB interface, which includes determining whether the SS USB interface is enabled, if the SS USB interface is enabled, detecting the SS USB interface, selecting the HS USB interface, if the SS USB interface is enabled, but not detected, and multiplexing between a functionality of a HS USB device interface and a functionality of a HS USB host interface, if the SS USB interface is not enabled.

Abstract: A device management apparatus connected to one or more devices via a data transmission channel includes an input information holding unit for holding an input information group including one or more pieces of input information, each of which is to be connected to device information of a device; a device search unit for detecting the devices by a search; a device information acquiring unit for acquiring the device information from the devices; a cross-checking unit for cross-checking information items of the input information with those of the device information; and a registering and updating unit for performing data registration/update by, when the cross-checking unit determines that there is a common information item between the input information and the device information, connecting a piece of input information to the device information based on item entries of the common information item, and storing the connected information as registry management information.

Abstract: In general, embodiments of the present disclosure are directed to techniques for configuring a mobile device according to detection of one or more peripheral devices in an environment using short-range wireless communication. In one example, a method includes, receiving, by a computing device that communicates with a peripheral device using short-range wireless communication, a unique identifier of the peripheral device. If the computing device recognizes the unique identifier of the peripheral device, the computing device may determine a configuration operation based on the unique identifier that changes a current operating state of at least one application executing on the computing device to a different operating state. If the computing device does not recognize the unique identifier of the peripheral device, the computing device may send a lookup request to a network resource external to the computing device that requests data specifying the configuration operation for the computing device.