Patents Examined by Erin Bergner
  • Patent number: 9284660
    Abstract: An apparatus of producing a silicon single crystal including: an imaging device; a heat shield that has a circular opening; a first operation unit that operates the imaging device and takes a real image of the heat shield and a mirror image of the heat shield reflected on a surface of the silicon melt, measures a spacing between the real image and the mirror image, and calculates a position of a melt-surface; a second operating unit that operates the imaging device and takes an image of a bright-zone in the vicinity of the solid-liquid interface, and calculates a position of the melt-surface based on the image of the bright zone; and a controlling unit that refers a data of the position of the silicon melt obtained by the first operation unit and the second operation unit, and controls the position of the silicon melt.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: March 15, 2016
    Assignee: SUMCO CORPORATION
    Inventors: Keiichi Takanashi, Ken Hamada
  • Patent number: 9273410
    Abstract: Low-temperature organometallic nucleation and crystallization-based synthesis methods for the fabrication of semiconductor and metal colloidal nanocrystals with narrow size distributions and tunable, size- and shape-dependent electronic and optical properties. Methods include (1) forming a reaction mixture in a reaction vessel under an inert atmosphere that includes at least one solvent, a cationic precursor, an anionic precursor, and at least a first surface stabilizing ligand while stirring at a temperature in a range from about 50° C. to about 130° C. and (2) growing nanocrystals in the reaction mixture for a period of time while maintaining the temperature, the stirring, and the inert-gas atmosphere.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: March 1, 2016
    Assignee: University of Utah Research Foundation
    Inventors: Michael H. Bartl, Jacqueline T. Siy
  • Patent number: 9266763
    Abstract: The purpose of the present invention is to provide a crucible which has high viscosity at high temperature, can be used for a long time, and can be manufactured at low cost, and a method of manufacturing the crucible. The present invention provides a composite crucible including a vitreous silica crucible body having a sidewall portion and a bottom portion, and a reinforcement layer provided on an outer surface side of an upper end portion of the vitreous silica crucible body, wherein the reinforcement layer is made of mullite material whose main component is alumina and silica.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 23, 2016
    Assignee: SUMCO CORPORATION
    Inventors: Toshiaki Sudo, Ken Kitahara, Takuma Yoshioka
  • Patent number: 9267077
    Abstract: A chrome-free acidic aqueous solution of sulfuric acid and one or more organic acids and manganese (II) and (III) ions is applied to an organic polymer surface to etch the surface. The etched surface is then plated with metal.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: February 23, 2016
    Inventors: Katharina Weitershaus, Wan Zhang-Beglinger, Andreas Scheybal, Jonas Guebey
  • Patent number: 9269894
    Abstract: Isolation of magnetic layers in the magnetoresistive stack is achieved by passivation of sidewalls of the magnetic layers or deposition of a thin film of non-magnetic dielectric material on the sidewalls prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: February 23, 2016
    Assignee: Everspin Technologies, Inc.
    Inventors: Chaitanya Mudivarthi, Sarin A. Deshpande, Sanjeev Aggarwal
  • Patent number: 9263624
    Abstract: The present invention relates to a high-output apparatus for manufacturing a polycrystal silicon ingot for a solar cell, and more particularly, to an apparatus for manufacturing a polycrystal silicon ingot by means of heating and melting raw silicon in a vacuum chamber, and then cooling the molten silicon, wherein the apparatus comprises: a plurality of crucibles arranged so as to be horizontally separated from one another within the vacuum chamber, and in each of which raw silicon is filled for manufacturing polycrystal silicon ingots; heating means provided at the outside of each of the crucibles so as to heat each crucible and melt the raw silicon filled therein; and cooling means for cooling the crucibles, so as to enable the silicon melted by the heating means to be cooled in one direction and be formed into polycrystal ingots.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: February 16, 2016
    Assignee: Korea Research Institute of Chemical Technology
    Inventors: Sang Jin Moon, Won Wook So, Myung Hoee Koo, Dong Soon Park
  • Patent number: 9238870
    Abstract: A reactive ion etching (RIE) process comprising a chlorine source gas and an oxygen source gas with an atomic ratio of chlorine to oxygen in the plasma of at least 6 to 1 is used to etch chromium alloy films such as SiCr, SiCrC, SiCrO, SiCrCO, SiCrCN, SiCrON, SiCrCON, CrO, CrN, CrON, and NiCr for example. Additionally, a fluorine source may be added to the etch chemistry.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: January 19, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Abbas Ali
  • Patent number: 9238584
    Abstract: A clamping and contacting device for mounting and electrically contacting thin silicon rods in silicon deposition reactors is disclosed, the clamping and contacting device having a rod holder for receiving one end of a thin silicon rod. The rod holder comprises at least three contact elements disposed around a receiving space for the thin silicon rod. Each of the contact elements forms a contact surface facing towards a receiving space for electrically and mechanically contacts the thin silicon rod, wherein the contact surfaces of adjacent contact elements are spaced apart.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: January 19, 2016
    Assignee: SITEC GmbH
    Inventors: Frank Stubhan, Michael Leck
  • Patent number: 9238384
    Abstract: The invention discloses a method of manufacturing a microneedle including the steps of forming an island etching mask having thickness distribution on a substrate, and processing the substrate into a needle by taking advantage of a difference in etching rates between the etching mask and the substrate. The invention enables to readily control a point angle and height of the manufactured needle.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: January 19, 2016
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Kazuhiko Shiomitsu, Hiroshi Sugimura, Toshiaki Kurosu, Gaku Suzuki, Takao Tomono
  • Patent number: 9163315
    Abstract: A high etch cleaner for aluminum and aluminum alloy substrates that leads to enhanced corrosion protective performance of a variety of anti-corrosion pretreatments. The cleaner comprises low levels of silicate of from 0 to 250 ppm, 50 to 500 ppm of at least one chelator, and has a pH of from 11.0 to 13.5. The cleaner may be used to etch from 0.5 to 4.0 grams per meter squared from substrates. Substrates treated with the cleaner and then coated with a variety of anti-corrosion pretreatments and outer coatings show enhanced corrosion resistance compared to substrates cleaned with standard cleaners that have low etch rates, high silicate levels and no chelating agents followed by anti-corrosion pretreatments and outer coatings.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: October 20, 2015
    Assignee: Henkel AG & Co. KGaA
    Inventors: Edis Kapic, Michael L. Sienkowski, Bruce H. Goodreau, Sophie Cornen
  • Patent number: 9147580
    Abstract: A plasma etching method for plasma etching, in a processing chamber, an antireflection film laminated on an organic film formed on a substrate by using an etching mask made of a resist film formed on the antireflection film, the plasma etching method includes: depositing a Si-containing compound on the etching mask made of the resist film by using plasma of Si-containing gas in the processing chamber; and etching the antireflection film in a state where the Si-containing compound is deposited on the etching mask.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: September 29, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takayuki Katsunuma, Masanobu Honda, Hironobu Ichikawa, Jin Kudo
  • Patent number: 9112072
    Abstract: The invention relates to a method for manufacturing a coated object (2) through deposition of at least one transparent, conductive metal-oxide layer (3) on a substrate (5), comprising the deposition (I) and preferably subsequent temperature treatment (II) of the coating (3). After the optional temperature treatment (II), the surface texture (8) of the coating (3) is statistically adjusted through an etching process.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: August 18, 2015
    Assignee: Interpane Entwicklungs-und, Beratungsgesellschaft mbH
    Inventors: Oliver Kappertz, Lothar Herlitze, Hansjoerg Weis, Michael Purwins
  • Patent number: 9102190
    Abstract: A nanotip, is fabricated by modifying a precursor nanotip having an apex and a shank by applying an electric field in the presence of a reactive gas to perform field-assisted etching wherein atoms are preferentially removed from the shank by chemical interaction with the reactive gas, and controlling the reactive gas pressure and/or tip voltage to vary the electric field so as to promote field evaporation of apex atoms during fabrication of the nanotip and thereby control the overall profile of the resulting nano-tip. The method permits shaping of the overall tip profile.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: August 11, 2015
    Assignees: National Research Council of Canada, The Governors of the University of Alberta
    Inventors: Jason L. Pitters, Radovan Urban, Robert A Wolcow
  • Patent number: 9090990
    Abstract: An apparatus for manufacturing a semiconductor device includes an out-heater including a heater element formed in an annular shape with a disconnected portion at one place, a first electrode component connected to a first heater electrode part of the heater element, a second electrode component connected to a second heater electrode part of the heater element, and a base including a first groove in which the first electrode component is fixedly disposed, and a second groove in which the second electrode component is movably disposed and a groove width in a circumferential direction of the heater element is formed such that a width of a second gap formed between a side of the second electrode component and an inner wall of the groove is wider than a width of a first gap formed between a side of the first electrode component and an inner wall of the first groove.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: July 28, 2015
    Assignee: NuFlare Technology, Inc.
    Inventors: Kunihiko Suzuki, Hironobu Hirata
  • Patent number: 9093389
    Abstract: Methods of patterning silicon nitride dielectric films are described. For example, a method of isotropically etching a dielectric film involves partially modifying exposed regions of a silicon nitride layer with an oxygen-based plasma process to provide a modified portion and an unmodified portion of the silicon nitride layer. The method also involves removing, selective to the unmodified portion, the modified portion of the silicon nitride layer with a second plasma process.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: July 28, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Srinivas D. Nemani, Jeremiah T. Pender, Qingjun Zhou, Dmitry Lubomirsky, Sergey G. Belostotskiy
  • Patent number: 9090860
    Abstract: A method for producing particles includes providing a relief template having a surface relief pattern adapted to impart structure to a plurality of particles while they are under production; depositing a radiation-sensitive material on the relief template; exposing portions of the radiation-sensitive material on the relief template using a beam of spatially patterned radiation; removing portions of the radiation-sensitive material after the exposing to reveal at least portions of surfaces of the plurality of particles; and separating at least a portion of the plurality of particles from the relief template. At least a portion of a structure of each of the plurality of particles is defined by a combination of the surface relief pattern and the spatially patterned radiation.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: July 28, 2015
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventor: Thomas G. Mason
  • Patent number: 9087692
    Abstract: A method transfers a graphene layer from a donor substrate onto a final substrate. The method includes: providing a metal layer on the donor substrate; and growing a graphene layer on the metal layer. The method also includes: laminating a dry film photo-resist on the graphene layer; laminating a tape on the dry film photo-resist; chemically. etching the metal layer, obtaining an initial structure that includes the tape, the dry film photo-resist and the graphene layer; laminating the initial structure on the final substrate; thermally realizing the tape, so as to obtain an intermediate structure that includes the dry film photo-resist, the graphene layer and the final substrate; removing the dry film photo-resist; and obtaining a final structure that includes the final substrate with a transferred graphene layer.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: July 21, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Corrado Accardi, Stella Loverso, Sebastiano Ravesi, Noemi Graziana Sparta
  • Patent number: 9080239
    Abstract: Forming a shallow trench capacitor in conjunction with an FET by forming a plurality of STI trenches; for the FET, implanting a first cell well having a first polarity between a first and a second of the STI trenches; for the capacitor, implanting a second cell well having a second polarity in an area of a third of the STI trenches; removing dielectric material from the third STI trench; forming a gate stack having a first portion located between the first and the second of the STI trenches and a second portion located over and extending into the third trench; and performing a source/drain implant of the same polarity as the second cell well, thereby forming a FET in the first cell well, and a capacitor in the second cell well. The second polarity may be opposite from the first polarity. An additional implant may reduce ESR in the second cell well.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: July 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Daewon Yang, Kangguo Cheng, Pavel Smetana, Richard S. Wise, Keith Kwong Hon Wong
  • Patent number: 9073385
    Abstract: A substrate placement process uses a tray in which a plurality of substrate receiving holes are provided to receive substrates and which has substrate support portions protruding from inner walls of the substrate receiving holes. The tray is placed onto a tray support portion of a substrate stage and places substrates onto substrate holding portions, respectively, so that edge portions of the substrates projected beyond end edges of the substrate holding portions and are apart from the substrate support portions. The first plasma processing process reduces internal pressure of a chamber and supplies a process gas thereto to fulfill plasma processing for the individual substrates.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: July 7, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shogo Okita, Ryota Furukawa, Yoshimasa Inamoto, Tatsuhiro Mizukami
  • Patent number: 9067795
    Abstract: A method for making a graphene composite structure includes providing a metal substrate including a first surface and a second surface opposite to the first surface, growing a graphene film on the first surface of the metal substrate by a CVD method, providing a polymer layer on the graphene film and combining the polymer layer with the graphene film, and forming a plurality of stripped electrodes by etching the metal substrate from the second surface.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: June 30, 2015
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Kai-Li Jiang, Xiao-Yang Lin, Lin Xiao, Shou-Shan Fan