Abstract: The present disclosure is directed to switch a voltage to be supplied to a power source switch in accordance with a state of a power source of an apparatus and restrain power consumption of the power source switch.

Abstract: An integrated circuit (122) includes an on-chip boot ROM (132) holding boot code, a non-volatile security identification element (140) having non-volatile information determining a less secure type or more secure type, and a processor (130). The processor (130) is coupled to the on-chip boot ROM (132) and to the non-volatile security identification element (140) to selectively execute boot code depending on the non-volatile information of the non-volatile security identification element (140). Other technology such as processors, methods of operation, processes of manufacture, wireless communications apparatus, and wireless handsets are also disclosed.

Abstract: In a mobile device, processes of an application can be monitored and scored for initial data distribution. Specifically, a method can include monitoring processes of an application, and scoring objects or components used by the processes to determine placement of the objects or components in memory during initiation of the application. The method can also include, during initiation of the application, loading, into a first portion of the memory, at least partially, the objects or components scored at a first level. The method can also include, during initiation of the application, loading, into a second portion of the memory, at least partially, the objects or components scored at a second level. The objects or components scored at the second level can be less critical to the application than the objects or components scored at the first level.

Abstract: Systems and methods are provided that may be implemented to utilize information from existing OS initialization mechanisms on an information handling system to determine characteristic/s of OS usage, and to record and store these determined characteristic/s as metadata on nonvolatile storage for later retrieval. In one embodiment, the determined characteristics for every given OS boot may be so recorded with information that identifies whether each given OS boot was from a manufacturer or vendor-supplied OEM OS image or from an aftermarket OS image.

Abstract: Accordingly the embodiments herein provide a method for managing scheduling of services during a boot-up process in an electronic device including a multi-core processor. The method includes determining a plurality of services initiated during the boot-up process of the electronic device. Further, the method includes registering system parameters associated with the electronic device for each one of the determined services. Further, the method includes determining whether the service is critical or non-critical for the boot-up process. Further, the method includes tagging a label data to each one of the determined services, wherein the label data represents whether the service is critical or non-critical. Further, the method includes clustering each of the services into one of an accelerating cluster and a decelerating cluster based on the registered system parameters associated with the electronic device and the tagged label data.

Abstract: In one general aspect, a method can include determining that a computing device is in a stationary position for a predetermined time, placing the computing device in a first power mode, detecting input from at least one sensor included in the computing device, identifying at least one application to launch on the computing device based on the detected input and on a heuristic-based usage pattern for the computing device, and transitioning the computing device from the first power mode to a second power mode based on the detected input. The transitioning can include automatically launching the at least one application on the computing device. The at least one application can provide content for display on a display device included in the computing device.

Abstract: Systems, apparatuses, and methods for managing power consumption for a neural network implemented on multiple graphics processing units (GPUs) are disclosed. A computing system includes a plurality of GPUs implementing a neural network. In one implementation, the plurality of GPUs draw power from a common power supply. To prevent the power consumption of the system from exceeding a power limit for long durations, the GPUs coordinate the scheduling of tasks of the neural network. At least one or more first GPUs schedule their computation tasks so as not to overlap with the computation tasks of one or more second GPUs. In this way, the system spends less time consuming power in excess of a power limit, allowing the neural network to be implemented in a more power efficient manner.

Abstract: A method of operating a storage system is provided. The method includes executing an operating system on one or more processors of a compute device that is coupled to one or more solid-state drives and executing a file system on the one or more processors of the compute device. The method includes configuring the compute device with one or more replaceable plug-ins that are specific to the one or more solid-state drives, and executing a flash translation layer on the one or more processors of the compute device, with assistance through the one or more replaceable plug-ins for reading and writing the one or more solid-state drives.

Abstract: Process core isolation for execution of multiple operating systems on a multicore computer system includes booting first and second operating systems (OSs) on a computer system that includes a plurality of processor cores across physical central processing unit(s) (CPUs). Booting the first OS boots the first OS on a first subset of the processor cores. Booting the second OS, different from the first OS, boots the second OS on a second subset of the processor cores. The first and second subsets are mutually exclusive, where a first processor core of a physical CPU of the physical CPUs is included in the first subset and a second processor core of the physical CPU is included in the second subset, and where the first and second OSs execute concurrently on the computer system, and each of the first and second OS executes on only its respective subset of processor core(s).

Abstract: Technologies for performance monitoring include a computing device having multiple processor cores. The computing device performs a training workload with a processor core by continuously polling an empty input queue. The computing device determines empty polling thresholds based on the empty polling workload. The computing device performs a packet processing workload with one or more processor cores by continuously polling input queues associated with network traffic. The computing device compares a measured number of empty polls performed by the packet processing workload against the empty polling thresholds. The computing device configures power management of one or more processor cores in response to the comparison. The computing device may determine empty polling trends and compare the measured number of empty polls and the empty polling trends to the empty polling thresholds. Other embodiments are described and claimed.

Abstract: Power sourcing equipment (PSE) and an energy saving method for Power over Ethernet are provided. The PSE includes: a low-power detection component, configured to: detect a power supply port when being connected to the power supply port; and send a first instruction when the power supply port is connected to a valid powered device PD, to instruct a control switch to connect a PSE chip and the power supply port and disconnect the low-power detection component from the power supply port, and instruct a power switch to connect the PSE chip and a power supply; the control switch, configured to: according to the first instruction, connect the PSE chip and the power supply port, and disconnect the low-power detection component from the power supply port; and the power switch, configured to connect the PSE chip to the power supply port according to the first instruction.

Abstract: A system and method for booting a computer system is disclosed. Code is loaded from a minor BIOS image stored on an electrically erasable programmable read-only memory (EEPROM) to a cache of a central processing unit. The central processing unit executes the code from the minor BIOS image to initialize a system memory. A major BIOS image is accessed from a remote site via a controller. Code from the major BIOS image is loaded to the system memory. The code from the major BIOS image is executed via the central processing unit to boot an operating system.

Abstract: The invention relates to a power providing device (1), a power receiving device (2) and a corresponding method of providing power from a power providing device (1) to multiple power receiving devices (2) allowing for a reduction of the power consumed in stand-by situations. The invention provides for a distribution system allowing for providing standby assistance low voltage allowing for increased efficiency operation.

Abstract: A firmware security guarding method and an electronic system using the same are provided. The firmware security guarding method includes the following steps: setting at least one monitoring objective, wherein each of the at least one monitoring objective corresponds to one of at least one behavior reference file stored in a memory device of the electronic system; loading from the memory device the at least one behavior reference file corresponding to the at least one monitoring objective when booting the electronic system; and checking whether an abnormal event is included in a basic input/output system boot behavior of the electronic system according to the loaded at least one behavior reference file.

Abstract: Systems and methods for offloading computational operations. In some implementations a method includes determining whether a data storage device coupled to a computing device is capable of performing a set of computational operations. The data storage device may be hot swappable. The method also includes offloading the set of computational operations to the data storage device in response to determining that the data storage device is capable of performing the set of computational operations. The method further includes performing the set of computational operations on the computing device in response to determining the data storage device is not capable of performing the set of computational operations.

Abstract: An image transmission apparatus includes: a processor that performs a process of generating image data and that transmits the image data to a display apparatus connected via a network; and a clock controller that receives information relating to a display mode of the display apparatus from the display apparatus and that controls a drive clock frequency of the processor based on the information.

Abstract: A voltage regulator circuit included in a computer system may include multiple devices and a switch node coupled to a regulated power supply node via an inductor. The voltage regulator circuit may charge a capacitor using an input power supply signal, and couple the capacitor to the switch node using respective subsets of the multiple devices, which are selected based on one or more control signals. A control circuit may generate the one or more control signals based on a particular switching sequence, which is selected based on a ratio of a voltage level of the regulated power supply node and a voltage level input power supply signal.

Abstract: A disclosed information handling system is configured to display a consistent logo or image throughout a platform initialization process. In a first-time boot, in a DXE phase, image information is read from firmware storage and processed for native resolution for a display panel and HOB information is saved to firmware volumes with Hand-Off Block (HOB) information. In subsequent iterations of the platform initialization process, the processed image is displayed early in a PEI phase and the HOB information is stored with the processed image. The image is displayed throughout the DXE and BDS phases of each subsequent platform initialization process and the display is consistent for different information handling systems and display panels.

Abstract: Technologies exist that allow for power to be supplied over a data connection, e.g., Power over Ethernet (PoE). Power sourcing equipment (PSE) supplies power to a powered device (PD) over the data connection. There may be applications in which it is desired or necessary to insert an intermediary device on a data connection between the PSE and the PD. An intermediary device is disclosed that can be inserted between a PSE and a PD. The intermediary device attempts to power itself using power supplied by the PSE over the data connection, rather than using an auxiliary power supply. In some embodiments, the intermediary device acts like a PD and requests from the PSE enough power for both itself and the actual PD. The intermediary device then also acts as a PSE to deliver unused power over the data connection to the actual PD.

Abstract: An apparatus includes a processing circuit, a power processing module, and a power management circuit. The power management circuit is configured to estimate, over time, energy consumption of the processing circuit, and to sample the estimated energy consumption using a plurality of different sampling frequencies. Each of the different sampling frequencies is used to generate a respective set of power values. The power management circuit is further configured to track a particular characteristic for each set of power values, and then to provide, for each set of power values, a particular power value that corresponds to the particular characteristic to the power processing module. Based on at least one of the particular power values, the power processing module is configured to adjust an operating parameter of the processing circuit.