Patents Examined by Fahmida Rahman
  • Patent number: 11061465
    Abstract: An application processor includes a system bus, a host processor and a voice trigger system that are electrically connected to the system bus. The voice trigger system performs a voice trigger operation and issue a trigger event based on a trigger input signal that is provided through a trigger interface. The voice trigger system is secured independently of the host processor. The voice trigger system performs the voice trigger operation based on secured user voice information that is stored in a security region in the secured voice trigger system during a sleep mode in which the system bus and the host processor are disabled.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: July 13, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Sun-Kyu Kim
  • Patent number: 11054887
    Abstract: Systems, apparatuses, and methods for performing efficient power management for a multi-node computing system are disclosed. A computing system includes multiple nodes. When power down negotiation is distributed, negotiation for system-wide power down occurs within a lower level of a node hierarchy prior to negotiation for power down occurring at a higher level of the node hierarchy. When power down negotiation is centralized, a given node combines a state of its clients with indications received on its downstream link and sends an indication on an upstream link based on the combining. Only a root node sends power down requests.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: July 6, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Benjamin Tsien, Greggory D. Donley, Bryan P. Broussard
  • Patent number: 11048523
    Abstract: An information handling system (IHS), baseboard management controller (BMC) and method provide for coordinating the BMC and the host processor subsystem to avoid conflicts between power operations by BMC and maintenance activities by the host processor subsystem. In response to determining that a power operation is requested for the host processor subsystem, a service processor of the BMC determining whether a planned power operation (PPO) software sensor contains information indicating that the host processor subsystem is executing a critical operation utility. In response to determining that the host processor subsystem is not executing the critical operation utility, service processor updates/modifies information contained in the PPO software sensor to indicate that a power operation is scheduled. The modified information prevents the host processor subsystem from subsequently initiating execution of the critical operation utility.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: June 29, 2021
    Assignee: Dell Products, L.P.
    Inventors: Vaideeswaran Ganesan, Balamurugan Gnanasambandam, Tamilarasan Janakiram, Sreeram Muthuraman
  • Patent number: 11036279
    Abstract: An apparatus and method are provided for managing a cache. The cache is arranged to comprise a plurality of cache sections, where each cache section is powered independently of the other cache sections in the plurality of cache sections, and the apparatus has power control circuitry to control power to each of the cache sections. The power control circuitry is responsive to a trigger condition indicative of an ability to operate the cache in a power saving mode, to perform a latency evaluation process to determine a latency indication for each of the cache sections, and to control which of a subset of the cache sections to power off in dependence on the latency indication. This can allow the power consumption savings realised by turning off one or more cache sections to be optimised to take into account the current system state.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: June 15, 2021
    Assignee: Arm Limited
    Inventor: Alex James Waugh
  • Patent number: 11029721
    Abstract: An electronic device capable of adjusting light emitting frequency includes an oscillator used to generate an oscillation signal, a microcontroller connected to the oscillator, and a light emitting module connected to the microcontroller. The microcontroller is used to define that an oscillation times of the oscillator within a unit time period is an original oscillation times. The microcontroller sets a correspondence between a switching period and the original oscillation times. The microcontroller is further used to receive the oscillation signal to calculate a time elapse. The microcontroller is configured to control on or off of the light emitting module according to the switching period and the time elapse.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: June 8, 2021
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Shun-Chih Huang, Yen-Lin Li
  • Patent number: 11003781
    Abstract: A root key processing method and an associated device are disclosed. The root key processing method is performed by a processor connected to a memory configured with an RPMB section, and includes the following steps. The processor detects whether a root key of the RPMB section is already written in the memory after the processor is powered on. If not, in a secure activation process of the processor, the root key of the RPMB section is written to the memory, wherein the secure activation process is that the processor does not activate a non-secure operation system. The method is capable of preventing leakage of the root key from the memory.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: May 11, 2021
    Assignee: MEDIATEK, INC.
    Inventor: Ming Yong Sun
  • Patent number: 10996738
    Abstract: A system includes a controller configured to receive a signal indicating whether a droop event has occurred. The system also includes a plurality of delay elements where each delay element of the plurality of delay elements responsive to a signal from the controller receives an input signal and outputs an output signal that is a delayed version of the input signal. At least one delay element of the plurality of delay elements receives a clocking signal as its input signal. The system also includes a selector configured to select rising edges and falling edges of output signals from the plurality of delay elements to form a modified clocking signal. The modified clocking signal is a modified version of the clocking signal.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: May 4, 2021
    Assignee: Marvell Asia Pte, Ltd.
    Inventors: Rabin Sugumar, Bharath Upputuri, Bruce Kauffman, Novinder Waraich, Bivraj Koradia, Paul Sebata
  • Patent number: 10990562
    Abstract: An information handling system includes processors disposed in sockets, and interconnect links providing point-to-point links between the sockets. One of the processors determines an arrangement of the processors, memories and the interconnect links, and determines a value for each of the processors, each of the memories, and each of the interconnect links. The processor calculates interconnect link bandwidth values for each of the interconnect links based at least in part on the determined value and the arrangement of the processors, the memories and the interconnect links. The processor also populates an interconnect bandwidth table using the interconnect link bandwidth values.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: April 27, 2021
    Assignee: Dell Products L.P.
    Inventors: Andrew Butcher, Stuart Allen Berke
  • Patent number: 10983816
    Abstract: A computing device receives template files and parameters associated with the template files, where the template files comprise scripts, and where the associated parameters comprise a user preference associated with an efficiency of the image. The computing device may determine dependencies between layers of the scripts based on a unified image model. The unified image model may generate a logic tree that includes nodes, where each one of the nodes represents each one of the layers of the scripts. The computing device may generate an efficient logic tree based on the logic tree and the user preference of a generated image model. The generated image model may generates the efficient logic tree by changing the dependencies of the nodes in the logic tree based on the user preference. Based on the generated efficient logic tree the computing device may build the image.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: April 20, 2021
    Assignee: International Business Machines Corporation
    Inventors: Peng Fei Chen, Tian Cheng Liu, Jing Min Xu, Bao Hua Yang, Lin Y Yang
  • Patent number: 10983581
    Abstract: Methods and apparatus relating to techniques for resource load balancing based on usage and/or power limits are described. In an embodiment, resource load balancing logic causes a first resource of a processor to operate at a first frequency and a second resource of the processor to operate at a second frequency. Memory stores a plurality of frequency values. The resource load balancing logic also selects the first frequency and the second frequency based on the stored plurality of frequency values. Operation of the first resource at the first frequency and the second resource at the second frequency in turn causes the processor to operate under a power budget. The resource load balancing logic causes change to the first frequency and the second frequency in response to a determination that operation of the processor is different than the power budget. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 31, 2017
    Date of Patent: April 20, 2021
    Assignee: Intel Corporation
    Inventors: Sanjeev Jahagirdar, Altug Koker, Yoav Harel, Kenneth Brand, Chandra Gurram, Eric Finley, Bhushan Borole, Carlos Nava Rodriguez
  • Patent number: 10969843
    Abstract: A system transfers power between a plurality of devices. Content is displayed to a group of users. An amount of power required by the system to at least complete display of the content is determined. In response to the required amount of power exceeding the power in a rechargeable power source of the system, one or more devices that are associated with users of the group are identified, wherein the identified devices each include a power source. Power is wirelessly received from the identified one or more devices. Embodiments of the present invention further include a method and program product for transferring power between a plurality of devices in substantially the same manner described above.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: April 6, 2021
    Assignee: International Business Machines Corporation
    Inventors: Shikhar Kwatra, Jeremy R. Fox, Mauro Marzorati, Sarbajit K. Rakshit
  • Patent number: 10963039
    Abstract: Approaches that manage energy in a data center are provided. In one embodiment, there is an energy management tool, including an analysis component configured to determine a current energy profile of each of a plurality of systems within the data center, the current energy profile comprising an overall rating expressed as an integer value, the overall rating calculated based on a current workload usage and environmental conditions surrounding each of the plurality of systems; and a priority component configured to prioritize a routing of a workload to a set of systems from the plurality of systems within the data center having the least amount of energy present based on a comparison of the overall ratings for each of the plurality of systems within the data center.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: March 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Christopher J. Dawson, Vincenzo V. Diluoffo, Rick A. Hamilton, II, Michael D. Kendzierski
  • Patent number: 10948958
    Abstract: In one or more embodiments, one or more systems, methods, and/or processes may determine an engagement of a power supply unit with at least one of an information handling system (IHS) and a chassis configured to house multiple information handling systems (IHSs); may provide a power at a first voltage to the at least one of the IHS and the chassis; may determine if the at least one of the IHS and the chassis utilizes a second voltage; if the at least one of the IHS and the chassis utilizes the second voltage, may determine if the power supply unit is configured to provide the power at the second voltage; and if the power supply unit is configured to provide the power at the second voltage, may provide the power at the second voltage to the at least one of the IHS and the chassis.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: March 16, 2021
    Assignee: Dell Products L.P.
    Inventors: Mark A. Muccini, Bhavesh Govindbhai Patel, Lei Wang, Kevin Mundt
  • Patent number: 10951425
    Abstract: A power over Ethernet method includes: performing, by power sourcing equipment, a plurality of detections by using an Ethernet port, connected to an intermediate device, of the power sourcing equipment, where a quantity of detections performed by the power sourcing equipment is equal to a quantity of power supply ports of the intermediate device; and if at least one detection result of the plurality of detections is effective, sending, by the power sourcing equipment, a power supply indication to the intermediate device, and supplying power to the connection port. In this way, the power sourcing equipment can supply power across the intermediate device to a powered device connected to the intermediate device, and a power loss caused by voltage conversion is avoided.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: March 16, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yan Zhuang, Shiyong Fu, Jincan Cao, Fuguang Huang, Xueqi Chen, Rui Hua
  • Patent number: 10949219
    Abstract: A method for executing a data processing pipeline may be provided. The method may include identifying a file providing a runtime environment required for executing a series of data processing operations comprising the data processing pipeline. The file may be identified based on one or more tags associated with the data processing pipeline. The one or more tags may specify at least one runtime requirement for the series of data processing operations. The file may be executed to generate an executable package that includes a plurality of components required for executing the series of data processing operations. The series of data processing operations included in the data processing pipeline may be executed by at least executing the executable package to provide the runtime environment required for executing the series of data processing operations. Related systems and articles of manufacture, including computer program products, are also provided.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: March 16, 2021
    Assignee: SAP SE
    Inventors: David Kernert, Simon Seif, Boris Gruschko, Joachim Fitzer
  • Patent number: 10942542
    Abstract: Embodiments include apparatuses, systems, and methods associated with modulating a clock signal to encode information. A system may include a plurality of dies including a first die. The first die may include a real time clock (RTC) circuit to receive clock information associated with a shared clock signal that is shared among the plurality of dies, and modulate a RTC signal to encode the clock information. The first die may further include an output terminal coupled to the RTC circuit to pass the modulated RTC signal to one or more other dies of the plurality of dies. A second die of the plurality of dies may include a decoder to receive the modulated RTC signal and extract the clock information. The second die may adjust and/or condition the shared clock signal based on the received clock information. Other embodiments may be described and claimed.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: March 9, 2021
    Assignee: INTEL IP CORPORATION
    Inventors: Rafi Ben-Tal, Junlin Yan
  • Patent number: 10936005
    Abstract: A system and method for controlling clock generation. A system includes a processor configured to execute instructions retrieved from memory, and a clock generation system coupled to the processor. The clock generation system is configured to generate a clock signal that the processor applies to execute the instructions. The clock generation system includes a plurality of configuration registers and selection circuitry. Each of the configuration registers includes fields that control a frequency of the clock signal. The selection circuitry selects which of the plurality of configuration registers determines the frequency at a given time.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: March 2, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joerg Harald Hans Jochen Schreiner, Marcus Herzog
  • Patent number: 10936042
    Abstract: Embodiments of the present disclosure provide a method, an apparatus, an additional power supply, and a mainboard system for supplying power to a processor. The method comprises determining whether an additional power supply is able to provide extra power required by a processor in response to receiving a first signal from a power supply unit that supplies power to the processor. The first signal indicates that the power required by the processor exceeds maximum power that can be provided by the power supply unit. The method further comprises supplying power to the processor by at least the additional power supply in response to determining that the additional power supply is able to provide extra power. The embodiments of the present disclosure can supply the required extra power to the processor from the additional power supply so as to optimize the performance of the processor in an acceleration mode.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: March 2, 2021
    Assignee: EMC IP Holding Company, LLC
    Inventors: Jing Chen, Tao Yang, Jesse Xizhi Cui
  • Patent number: 10901752
    Abstract: A system can receive a message intended to be received by a device. The system can implement an application discovery service to identify keywords in the message. The keywords can be used to determine what applications are required to access content in the message. The system can determine that a required application is not available on the device from a list of managed applications. The system can cause the required application to be made available on the device before, at the same, or after the device receives the message.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: January 26, 2021
    Assignee: VMWARE, INC.
    Inventors: Kara Madhavan Bhattathiri, Shree Harsha Shedigumme
  • Patent number: 10895899
    Abstract: A circuit includes a regulation circuit configured to intercept messages on a configuration channel of a universal serial bus (USB) cable between a USB source device and a USB sink device. The regulation circuit regulates a source capability message from the USB cable configuration channel based on a predetermined power capability of the USB cable.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: January 19, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Deric Wayne Waters