Abstract: A semiconductor device includes an active region on a substrate extending in a first direction, the active region having an upper surface and sidewalls, a plurality of channel layers above the active region to be vertically spaced apart from each other, a gate electrode extending in a second direction to intersect the active region and partially surrounding the plurality of channel layers, and a source/drain region on the active region on at least one side of the gate electrode and in contact with the plurality of channel layers, and extending from the sidewalls of the active region having a major width in the second direction in a first region adjacent to a lowermost channel layer adjacent to the active region among the plurality of channel layer.

Abstract: A semiconductor structures and a method for forming the same are provided. The semiconductor structure includes first silicon-containing layers, second silicon-containing layers, third silicon-containing layers, and fourth silicon-containing layers vertically suspended over a substrate and laterally spaced apart from each other. In addition, the first silicon-containing layers and the second silicon-containing layers are narrower than the third silicon-containing layers and the fourth silicon-containing layers. The semiconductor structure further includes first source/drain features, second source/drain features, third source/drain features, and fourth source/drain features attaching to opposite sides of the first silicon-containing layers, the second silicon-containing layers, the third silicon-containing layers, and the fourth silicon-containing layers, respectively.

Abstract: A chip package structure is provided. The chip package structure includes a first substrate. The chip package structure includes a conductive via structure passing through the first substrate. The chip package structure includes a barrier layer over a surface of the first substrate. The chip package structure includes an insulating layer over the barrier layer. The chip package structure includes a conductive pad over the insulating layer and having a first portion and a second portion. The chip package structure includes a conductive bump over the second portion of the conductive pad. A third portion of the conductive pad is between the conductive bump and the conductive via structure from a top view of the conductive pad, the conductive bump, and the conductive via structure.

Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first nitride semiconductor layer between the active region and the electron blocking structure, and including indium and aluminum elements; and a second nitride semiconductor layer between the electron blocking structure and the second semiconductor layer, including indium element and devoid of gallium element; wherein the first nitride semiconductor layer has a first indium content, the second nitride semiconductor layer has a second indium content, and the first indium content is greater than the second indium content.

Abstract: Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a first contact on the first semiconductor material and a second contact on the second semiconductor material, where the first and second contacts define the current flow path through the SSL structure. The first or second contact is configured to provide a current density profile in the SSL structure based on a target current density profile.

Abstract: A display device including a base substrate having a front surface and a rear surface, and including a first recess portion recessed from the front surface, a plurality of outer electrodes disposed on the base substrate, a light emitting device disposed in the first recess portion and configured to emit light in a direction away from the base substrate, the light emitting device including a light emitting structure electrically connected to the outer electrodes.

Abstract: A light-emitting diode (LED) chip structure with a cup-like reflective element is provided. The LED chip structure comprises a substrate, an isolation element and a mesa including an LED surrounded by the isolation element. The isolation element comprises an upper isolation part and a lower isolation part. The lower isolation part is positioned in the substrate and the upper isolation part protrudes from a surface of the substrate. A reflective layer is disposed on a sidewall of the upper isolation part, and a bottom of the reflective layer does not contact the mesa. The cup-like reflective element at least includes the isolation element with the reflective layer.

Abstract: A light emitting device module including a printed circuit board, upper and lower electrodes disposed on opposing surfaces of the printed circuit board, light emitting devices configured to emit light in a direction away from the printed circuit board, and a molding layer surrounding the light emitting devices, in which each light emitting device includes a light emitting structure, a substrate disposed on the light emitting structure, and bump electrodes disposed between the light emitting structure and the printed circuit board, the molding layer covers side surfaces of the substrates, a number of the lower electrodes is less than a number of the bump electrodes of the plurality of light emitting devices, and each of the light emitting devices is configured to be driven independently.

Abstract: A display substrate includes a plurality of first pixels and a plurality of second pixels alternately arranged in a first direction and a second direction. Each of the first pixels includes a first sub-pixel and a second sub-pixel, and each of the second pixels includes a third sub-pixel and a second sub-pixel. The second sub-pixels are evenly arranged in a matrix. The first sub-pixel and the third sub-pixel are both in a polygonal shape, and are alternately arranged in the first direction and the second direction. For one first sub-pixel and one third sub-pixel adjacent to each other in the first direction, a line connecting a vertex of the one first sub-pixel closest to the one third sub-pixel with a vertex of the one third sub-pixel closest to the one first sub-pixel intersects an extension line in the first direction and an extension line in the second direction.

Abstract: A display apparatus including a circuit board and a plurality of pixels arranged on the circuit board, in which at least one of the pixels includes a first light emitting device and a second light emitting device spaced apart from each other in a lateral direction, the first light emitting device includes a first LED stack configured to generate light having a first peak wavelength; and the second light emitting device includes a second LED stack configured to generate light having a second peak wavelength, and a third LED stack disposed on the second LED stack and configured to generate light having a third peak wavelength.

Abstract: A substrate treating apparatus and a substrate treating method are disclosed. The substrate treating apparatus includes a process module configured to perform processing on a substrate, an index module configured to insert the substrate into the process module and withdraw the substrate, of which the processing is completed, from the process module, a loading module configured to relay the substrate between the process module in a vacuum atmosphere and the index module in an atmospheric pressure atmosphere by switching an atmosphere thereof to the vacuum atmosphere or the atmospheric pressure atmosphere, and a control module configured to receive operation states from the process module, the index module, and the loading module and schedule operations of the process module, the index module, and the loading module in a direction in which the number of substrates to be processed per unit time increases with reference to the received operation states.

Abstract: The display panel includes an array substrate, a light emitting diode and a first connection electrode. The array substrate includes a driving circuit layer. The light emitting diode is disposed on the array substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. The light emitting layer is disposed between the first semiconductor layer and the second semiconductor layer. The first connection electrode is electrically connected to the driving circuit layer and the first semiconductor layer. The first connection electrode wraps the light emitting layer such that a normal projection of the light emitting layer over the array substrate is within a normal projection of the first connection electrode over the array substrate.

Abstract: The invention relates to a method for producing optoelectronic components. The invention comprises: provision of a metal substrate, the substrate having a front side and a rear side opposite the front side; front-side removal of substrate material such that the substrate comprises substrate sections protruding in the region of the front side and recesses arranged there between; formation of a plastic body adjacent to substrate sections; arrangement of optoelectronic semiconductor chips on substrate sections; rear-side removal of substrate material in the region of the recesses, such that the substrate is structured into separate substrate sections; and performance of a separation process. The plastic body is divided into separate substrate sections and individual optoelectronic components with at least one optoelectronic semiconductor chip are formed. The invention also relates to an optoelectronic component.

Abstract: A light emitting device includes: a first substrate including: a first lead, and a second lead positioned apart from the first lead; a second substrate disposed on an upper face of the second lead, the second substrate including: a base, and a first conducting part disposed on an upper face of the base; a light emitting element disposed on the second substrate and electrically connected to the first conducting part; a first wire electrically connecting the first lead and the first conducting part; and a wall part straddling and covering an upper face of the first lead and an upper face of the second lead. A height of the wall part is less than a height of the second substrate.

Abstract: Provided is a micro light emitting device and a display apparatus having the micro light emitting device. The micro light emitting device includes a first-type semiconductor layer provided on a substrate, a superlattice layer provided on the first-type semiconductor layer, a current blocking layer provided on a side portion of the superlattice layer, an active layer provided on the superlattice layer and the current blocking layer, and a second-type semiconductor layer provided on the active layer.

Abstract: A light emitting device includes: a mounting board; a plurality of light emitting elements disposed on the mounting board; a plurality of light transmissive members, each located on an upper surface of a respective one of the light emitting element; a first cover member located on or above the mounting board, the first cover member including: a first reflective material containing layer disposed between the light emitting elements and containing a first reflective material, and a light transmissive layer disposed between the light transmissive members; and a second cover member disposed around the light emitting elements.

Abstract: A display backboard and a manufacturing method thereof, and a display device are provided. The display backboard includes: a driving substrate; a plurality of driving electrodes on the driving substrate; and a plurality of connection structures respectively on the plurality of driving electrodes. The connection structure includes: at least one conductive component on the driving electrode; and a restriction component on a side of the driving electrodes provided with the at least one conductive component and in at least a part of a peripheral region of the at least one conductive component. The restriction component protrudes from the driving electrode and has a first height in a direction perpendicular to the driving substrate.

Abstract: A magnetic tunnel junction (MTJ) element including a free layer, a reference layer; and a tunnel barrier layer between the free layer and the reference layer. The reference layer includes a first pinned layer, a second pinned layer, an anti-ferromagnetic coupling (AFC) spacer layer between the first pinned layer and the second pinned layer, a first spacer layer adjacent to the second pinned layer, a second spacer layer, a ferromagnetic layer sandwiched by the first spacer layer and the second spacer layer, a polarization enhancement layer adjacent to the second spacer layer.

Abstract: Embodiments herein describe techniques for a semiconductor device including a package substrate having a core layer. An inductor may include a first coaxial line and a second coaxial line vertically through the core layer, and an interconnect within the package substrate coupling the first coaxial line and the second coaxial line. A first magnetic segment may surround the first coaxial line within the core layer, and a second magnetic segment may surround the second coaxial line within the core layer. In addition, a third magnetic segment may surround the interconnect and be coupled to the first magnetic segment and the second magnetic segment. Other embodiments may be described and/or claimed.

Abstract: A light source module includes a circuit board, light emitting diode chips on an upper surface of the circuit board, the light emitting diode chips being spaced apart and each emitting blue light and having a first surface facing the upper surface of the circuit board, a second surface opposite the first surface, and first and second electrodes on the first surface, a first multilayer reflective structure on the second surface and including a plurality of alternately stacked insulating layers having different refractive indices, and a lens respectively covering each of the light emitting diode chips and contacting the upper surface of the circuit board at an acute contact angle, the lens having a thickness of 2.5 mm or less from the upper surface of the circuit board, and a contact region with the upper surface of the circuit board with a diameter of 1 mm to 3 mm.