Abstract: Disclosed herein is an improved logic module used for logic emulation along with an enhanced logic emulation board subject to logic verification. The logic module has a plurality of programmable LSIs capable of programming logic and a plurality of switching LSIs capable of programming connections, the LSIs being mounted on one or both sides of a board. Peripheral portions of the board carry connectors for electrical connection to the outside. There are two types of data lines: those directly coupling the connectors to the programmable LSIs, and those linking the connectors to the programmable LSIs via the switching LSIs. The programmable and switching LSIs constitute a crossbar connection arrangement. The logic emulation board has connectors for connection to a logic emulation module, and lands for supporting LSIs targeted for development. Pins of the connectors and the lands are interconnected on a one-to-one basis.

Abstract: DC margin of a latch of a circuit under design is determined by performing three simulations. A simulation is performed to find the trip voltage of the forwarding inverter of the latch. A second simulation is performed to find the one margin of the latch. Lastly, a third simulation is performed to find the zero margin of the latch. During each of the simulations to find the one margin and the zero margin, the worst case input signal path from the various driver circuit elements and signal paths within the circuit under design is determined analytically by accumulating weighted resistance of each of the circuit elements along the signal paths. The weights assigned to the circuit elements are empirically determined based on the topology configuration of each of the circuit elements, e.g., the type circuit element, the signal being passed through the circuit element and whether a threshold voltage drop occurs between the drive circuit element and the pass circuit element.

Abstract: A method is provided for scaling up permeabilities associated with a fine-scale grid of cells representative of a porous medium to permeabilities associated with an unstructured coarse-scale grid of cells representative of the porous medium. An areally unstructured, Voronoi, computational grid is generated using the coarse-scale grid as the genesis of the computational grid. The computational grid is then populated with permeabilities associated with the fine-scale grid. Flow equations are developed for the computational grid, the flow equations are solved, and inter-node fluxes and pressure gradients are then computed for the computational grid. These inter-node fluxes and pressure gradients are used to calculate inter-node average fluxes and average pressure gradients associated with the coarse-scale grid. The inter-node average fluxes and average pressure gradients associated with the coarse grid are then used to calculate upscaled permeabilities associated with the coarse-scale grid.

Abstract: A method for distributed agent based non-expert simulation of manufacturing process behavior on a single-processor computer comprises the steps of: object modeling a manufacturing technique having a plurality of processes; associating a distributed agent with each the process; and, programming each the agent to respond to discrete events corresponding to the manufacturing technique, wherein each discrete event triggers a programmed response. The method can further comprise the step of transmitting the discrete events to each agent in a message loop. In addition, the programming step comprises the step of conditioning each agent to respond to a discrete event selected from the group consisting of a clock tick message, a resources received message, and a request for output production message.

Abstract: According to the electrical modeling system and method provided by the present invention, the electronic structure to be modeled is segmented into an ordered sequence of segments, each segment is electrically analyzed individually, and the resulting data is collated, or integrated back again whereby the model output is preferably created in a format generally suitable for electrical models of integrated circuits. Examples of electronic structures which can be modeled by the system and method of the invention include leadframes, packages, complete devices, and electronic devices assembled on motherboards.

Abstract: In a logic simulation method, one of an algorithm level simulation and a register transfer level simulation is executed. The algorithm level simulation corresponds to an algorithm level description and the register transfer level simulation corresponds to a register transfer level description. The simulation is switched from one of the algorithm level simulation and the register transfer level simulation into the other in response to a switching instruction using a relation between states of the algorithm level description and states of the register transfer level description. The algorithm level description is associated with arithmetic and logic algorithm and not associated with logic circuits. The register transfer level description is associated with logic circuits.

Abstract: An information processing apparatus which pleases a user with a higher degree of entertainment property is disclosed. A graphic chip copies original image data stored in a VRAM into a buffer built therein so that the original image data may be stored into the buffer. Further, the graphic chip reverses those of the original image data in replacement areas of the image horizontally leftwardly and rightwardly and stores the thus reversed image data into the buffer. The graphic chip thereupon performs &agr; blending of the original image data and the reversed image data based on &agr; values of a table.

Abstract: A method is provided for simulating at least one characteristic of a physical system. The physical system is discretized into a plurality of volumetric cells having boundaries therebetween. An initial estimate of state variables is assigned for each cell. For each cell, linear equations are constructed relating its state variables to the state variables of cells adjacent to it. A transportability value is associated with each boundary and the boundaries are ranked corresponding to descending transportability values. The boundary rankings are used to construct topologically one-dimensional strings of cells. A matrix equation for each string is constructed by assembling the linear equations associated with the cells of each string. Improved estimates of the state variables of the cells are determined by solving the matrix equations. These state variables are then used to simulate at least one characteristic of the physical system.

Abstract: An objective is to provide a microcomputer, electronic equipment and emulation method which can realize the optimum circumstance of evaluation while saving the number of terminals. An external bus is shared between external and emulation memories. In the emulation mode, the access of CPU to an internal ROM is switched to the access of CPU to the emulation memory through an external bus. The emulation mode is turned ON or OFF through a mode selection terminal or mode selection register. The emulation memory is controlled by a control signal CNT2 different from a control signal CNT1 which controls the external memory. A memory read signal in CNT2 become active at a timing earlier than that of a memory read signal in CNT1. Thus, the instruction is fetched and decoded within one clock cycle. A mode selection terminal is further provided for selecting a mode of performing the boot from the emulation memory, internal ROM or external memory and a made of selecting OPT mode.

Abstract: Methods for evaluating drill pattern parameters such as burden, spacing, borehole diameter, etc., at a blast site are disclosed. One method involves accumulating the burden contributed by successive layers of rock and matching the accumulated rock burden to a target value for a borehole having a length related to the average height of the layers. Another method relates to varying drill pattern parameters and characteristics to match blast design constraints, including the substitution of one explosive material for another by the proper balance of materials and/or output energies to the associated rock burden. Analysis of deviations from target rock burdens and corrective measures are disclosed, as well as cost optimization methods. The various methods can be practiced using an appropriately programmed general purpose computer.

Abstract: A strength distribution diagram 33 of selected building structural components, which are selected from a virtual three-dimensional model of building structural components of a building structure created by a CAD program, is constructed on a plane. Stress values of the building structural components arranged in the strength distribution diagram 33 are computed based on stress computational data of the building structural components consistent with attributes of the building structural components. A plurality of strength level display modes is provided for each building structural component, and strength of each building structural component is indicated with a predetermined color based on the computed stress value.

Abstract: A method and apparatus for inspecting a photolithography mask for defects is provided. The inspection method comprises providing a defect area image to an image simulator wherein the defect area image is an image of a portion of a photolithography mask, and providing a set of lithography parameters as a second input to the image simulator. The defect area image may be provided by an inspection tool which scans the photolithography mask for defects using a high resolution microscope and captures images of areas of the mask around identified potential defects. The image simulator generates a first simulated image in response to the defect area image and the set of lithography parameters. The first simulated image is a simulation of an image which would be printed on a wafer if the wafer were to be exposed to an illumination source directed through the portion of the mask.

Abstract: An improved conical panoramic mirror element design is disclosed such that the panoramic vertical field of view is not fixed and the image covers at least 90% of the toroidal image pixels of an imaging device. The data required to prescribe the panoramic conical element includes the position of the detector device, the most negative vertical scene angle, the most positive vertical scene angle, the panoramic cone's base diameter, the cone's apex to base ratio. These are utilized according to a mathematical prescription that optimizes the mirror element's design.

Abstract: A method of simulating the electrical behavior of an ideal transformer. The representation of the ideal transformer is frequency independent and can be used to simulate the behavior of an ideal transformer over the frequency range from DC to infinity. In one embodiment, the ideal transformer is represented as having an input sub-circuit and an output sub-circuit. Each sub-circuit includes a resistor connected in parallel across a current controlled current source. The input current, output current, current sources, and resistances are scaled by a scaling factor representing the turns ratio between the primary and secondary windings of a physical transformer. In the present invention, the current sources are responsible for the current scaling and the resistors are responsible for the impedance scaling. The circuit elements of the representation may be used as the basis for generating a set of input parameters for a circuit emulation program.

Abstract: A method of checking correctness of scheduling of a circuit where a schedule for the circuit is obtained from a behavioral description. The method comprising extracting loop invariants to determine a sufficient set of acyclic threads when loops are present, performing symbolic simulation to extract the above loop invariants, and proving equivalence of the acyclic threads. Systems, computer systems and computer program products that incorporate the techniques of verification and correctness checking according to the present invention have also been disclosed.

Abstract: A set of specially-configured LUT's are used in a rasterizing portion of a graphics system for simulating Sensor-assisted Perception of Terrain (SaPOT) so that simulation of the image produced by a given sensor can proceed rapidly and with good accuracy at a per-texel level of resolution. More specifically, terrain texels-defining memory is provided with a plurality of addressable texel records where each record contains: (a) one or more material identification fields (MID's); (b) one or more mixture fields (MIX's) for defining mixture proportions for the materials; and (c) slope-defining data for defining a surface slope or normal of the corresponding texel. A sky-map LUT is provided for simulating the act of looking up to the sky along the normal surface vector of a given texel to thereby obtain a reading of the sky's contribution of illumination to that terrain texel.

Abstract: A processing device generates a model of a tree in a given arbitrary space, reshapes the tree based on the nodes included in the tree, and outputs a reshape result. By repeating the reshape of the tree while examining the cost value of a reshaped tree, a local Steiner tree with a good cost value is obtained. A network shape is optimized by using the obtained local Steiner tree.

Abstract: The ability to perform Assembly/Disassembly analysis of one or more components of the geometric model (e.g., a CAD model) of a multi-component assembly is helpful for design, construction and tear-down, maintenance (in-place and replacement), and reuse/recycling of the assembly. To facilitate assembly and disassembly analysis of geometric models, methods have been developed which allow generating, editing, validating and animating/digitizing assembly/disassembly sequences and directions for 3D geometric models, e.g., CAD models. These methods allow assembly/disassembly analysis to be performed based on non-contact geometric reasoning (i.e., spatial reasoning rather than contact reasoning) to determine an optimal non-interfering sequence (a valid sequence) to disassemble/assemble the modeled components.

Abstract: The delay time control entails a static term and a corrective term and a current sampling time, the control calculated at the preceding sampling time is applied and the control intended to be applied at the following sampling time is determined. The determination of the following control is made from the working point of the generator, estimated at the following time.

Abstract: A temperature control simulation method and apparatus for forming a temperature system simulation model on a computer, provide substantially the same response or simulation characteristics as a temperature change in an actual furnace, whereby a temperature control algorithm can be developed and the method or manner of manipulating the temperature control can be learned without using an actual furnace. A transfer function is determined which represents a relationship between a heater input and a temperature output. A temperature control simulation for a heating furnace is executed using the transfer function of a heating furnace as a transfer function that a temperature system simulation device uses.