Patents Examined by Gabriel L. Chu
  • Patent number: 7934118
    Abstract: Systems and methods that supply a global knowledge on what nodes are available in the system, via employing routing tokens that are analyzed by a centralized management component to infer status for the nodes. When nodes fail, the routing tokens associated therewith are acquired by neighboring nodes, and the global knowledge updated. Moreover, upon inferring a failed or down status for a node, a challenge can be sent to a node reporting such failure to verify actual failure(s).
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: April 26, 2011
    Assignee: Microsoft Corporation
    Inventors: Gopala Krishna Reddy Kakivaya, Lu Xun, Jason T. Hunter
  • Patent number: 7934117
    Abstract: Systems and methods that provide for assignment and recovery of tokens as part of a plurality of nodes and distributed application framework/network. The assignment component assigns numbers and tasks to candidates and facilitates multiple leader election. Moreover, a recovery component can recover a token for a node that leaves the network (e.g., crashes). Such recovery component ensures consistency, wherein only one server is assigned recovery of the token and associated tasks.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: April 26, 2011
    Assignee: Microsoft Corporation
    Inventors: Gopala Krishna Reddy Kakivaya, Lu Xun
  • Patent number: 7930597
    Abstract: The invention includes a method and apparatus for validating system properties exhibited in execution traces. In one embodiment, a method for testing a system under test (SUT) includes determining a system testing result for the SUT using at least one structured term generated by monitoring an execution trace of the SUT using at least one parameterized pattern. A test procedure is executed for the SUT. The test procedure has at least one parameterized pattern associated therewith. An execution trace generated during execution of the test procedure is parsed, where the execution trace includes unstructured information and the execution trace is parsed using the at least one parameterized pattern to identify at least one matching pattern. A system testing result for the SUT is determined using at least one structured term that is generated using the at least one matching pattern. In this manner, behavior of the system under test during the test procedure may be validated.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: April 19, 2011
    Assignee: Alcatel-Lucent USA Inc.
    Inventors: Fangzhe Chang, Yangsong Ren, Thomas L. Wood
  • Patent number: 7913118
    Abstract: An in-circuit debugging (ICD) system includes at least a first target processor, an embedded debug mode with a debug information memory (DIM), a debug host, and an ICD bridge. The first target processor has an embedded debug module (EDM) and performs a program code in normal mode, where the first EDM controls the first target processor in debug mode. The DIM stores debug information for debugging in debug mode, and is invisible to the first target processor when the first target processor operates in normal mode. The debug host has debug software, and is utilized for debugging the program code by using the debug information in debug mode. The ICD bridge has a host debug module (HDM) coupled to the first EDM, and is coupled between the first target processor and the debug host and utilized for bridging information communicated between the first target processor and the debug host.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: March 22, 2011
    Assignee: Andes Technology Corporation
    Inventors: Yuan-Yuan Shih, Chi-Chang Lai
  • Patent number: 7913108
    Abstract: Described are a system and method for improving the performance of a disk drive in a data storage system by enabling the disk drive to “ride through” events that can induce disk drive errors. In response to an error message received from a disk drive, a disk director temporarily places the disk drive into a wait state. While in the wait state, the disk drive is prevented from shutting down, despite the current error and any subsequent errors that the disk drive may experience. The disk drive may continue to service I/O requests while in the wait state, with the disk director monitoring the disk drive performance. After the disk drive exits the wait state, the disk director can determine from the monitored results whether to shut down the disk drive or to permit the disk drive to return to normal operation.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: March 22, 2011
    Assignee: EMC Corporation
    Inventors: F. William French, Stephen Richard Ives, Thomas M. De Lucia, Jeffrey R. Berenson, Michael D. Garvey
  • Patent number: 7908518
    Abstract: System, method and computer program products for failure analysis implementing automated comparison of multiple reference models. An exemplary embodiment includes a method for failure analysis for an instruction set implementation in a computer system, the method including running a test-case in a first and a second model, determining if the test case failed in the first model and determining if the test case failed in the second model.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: March 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Patrick M. West, Jr., Vimal M. Kapadia, Christopher A. Krygowski, Timothy J Slegel
  • Patent number: 7904751
    Abstract: Systems and methods for error handling are disclosed. The systems and methods may be utilized for single or multiple processor computer systems to handle errors in a coordinated manner between hardware and any firmware or software layers. A computer system includes a non volatile memory and at least one processor. A firmware error handling routine is stored on the non volatile memory. The firmware error handling routine is for handling errors. Each of the at least one processors detects errors. Each processor executes the firmware error handling routine on detecting an error. The executed firmware error handling routine handles the error. The executed firmware error handling routine also logs error information to a log. The systems and methods provide for coordinated error handling that enhance error recovery, provide error containment and maintain system availability.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: March 8, 2011
    Assignee: Intel Corporation
    Inventors: Suresh Marisetty, Mani Ayyar, Nhon T. Quach, Bernard J. Lint
  • Patent number: 7900093
    Abstract: A method for monitoring of the functionality of an EDP system that is monitored in portions thereof by respectively associated agents that are designed to evaluate errors and to send error messages should increase the operating security in an EDP system. Each agent is monitored by a simulated error being sent to the agent and the reaction of the agent being evaluated.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: March 1, 2011
    Assignee: Siemens Aktiengesellschaft
    Inventor: Emilian Ertel
  • Patent number: 7890812
    Abstract: A computer system includes a plurality of buses; a device connected with the plurality of buses and configured to generate an error message when a failure has occurred on a first bus of the plurality of buses; and an IO control circuit connected with the device and configured to close the first bus in response to the error message transaction. The device includes a plurality of bus control sections respectively connected with said plurality of buses. The IO control circuit transfer a first operation transaction to the first bus through a first bus control section, and closes the first bus in response to the error message transaction in a bus failure operation when the failure has occurred on the first bus.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: February 15, 2011
    Assignee: NEC Computertechno. Ltd.
    Inventor: Takayuki Kitahara
  • Patent number: 7886192
    Abstract: A system and method for fast system recovery that bypasses diagnostic routines by disconnecting failed hardware from the system before rebooting. Failed hardware and hardware that will be affected by removal of the failed hardware of the system are disconnected from the system. The system is restarted, and because the failed hardware is disconnected, diagnostic routines may safely be eliminated from the reboot process.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: February 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Gary Dean Anderson, Sheldon Ray Bailey, Wayne Allan Britson, Alongkorn Kitamorn, Michael Alan Kobler
  • Patent number: 7877637
    Abstract: A monitoring side core has an input protection part including an access checking part and an address information storage part. Address information of a count RAM area and an access prohibiting mode to the address are stored in the address information storage part in advance by CPU. The access checking part determines whether an address to be accessed through a first communication path by a monitored side core and an access mode are coincident with the stored address and the stored access prohibiting mode. When the coincidence is determined, the access of the monitored side core to the count RAM area of the monitoring side core is prohibited.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: January 25, 2011
    Assignee: Denso Corporation
    Inventors: Kenji Shibata, Hiroyuki Ihara
  • Patent number: 7877640
    Abstract: A system and method are provided to provide enhanced exception messages for exceptions thrown by virtual machines. In one embodiment, an exception is detected when it is thrown at a virtual machine when a programming error is detected. A first message is associated to the exception, the first message including a default message. A request is received for a second message to be associated with the exception. The second message is associated to the exception in response to the request, the second message including an extended message explaining the exception.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 25, 2011
    Assignee: SAP AG
    Inventor: Ralf Schmelter
  • Patent number: 7877643
    Abstract: A method, system, and computer program product in a logical partitioned data processing system are disclosed for providing a host bridge that implements extended error handling (EEH). If all devices coupled to the host bridge implement EEH, the host bridge is initialized to operate in EEH mode. In EEH mode, the devices handle any error that occurs within the devices without reporting the error to the host bridge. All partitions that share the host bridge continue to operate without being terminated while the devices are handling the error. If at least one device does not implement EEH, the host bridge is initialized to operate in non-EEH mode. In non-EEH mode, a machine check is generated by the host bridge when an error occurs within one of the devices resulting in the termination of all partitions that share the host bridge in response to a receipt of the machine check.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: January 25, 2011
    Assignee: International Business Machines Corporation
    Inventors: Ashwini Kulkarni, Douglas Wayne Oliver, Steven Vongvibool, David R. Willoughby
  • Patent number: 7873879
    Abstract: A host fabric interface (HFI) enables debugging of global shared memory (GSM) operations received at a local node from a network fabric. The local node has a memory management unit (MMU), which provides an effective address to real address (EA-to-RA) translation table that is utilized by the HFI to evaluate when EAs of GSM operations/data from a received GSM packet is memory-mapped to RAs of the local memory. The HFI retrieves the EA associated with a GSM operation/data within a received GSM packet. The HFI forwards the EA to the MMU, which determines when the EA is mapped to RAs within the local memory for the local task. The HFI processing logic enables processing of the GSM packet only when the EA of the GSM operation/data within the GSM packet is an EA that has a local RA translation. Non-matching EAs result in an error condition that requires debugging.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: January 18, 2011
    Assignee: International Business Machines Corporation
    Inventors: Lakshminarayana B. Arimilli, Robert S. Blackmore, Chulho Kim, Ramakrishnan Rajamony, Hanhong Xue
  • Patent number: 7870423
    Abstract: The invention is a copy processing technique in a data processing system, which can simultaneously achieve long-distance communication and no data loss when disaster occurs. Among a production site, a local site, and a remote site, long-distance remote copying from a disk array device at the production site to a disk array device at the remote site without data loss is achieved via a disk array device at the local site in combination with synchronous remote copying and asynchronous remote copying. Also, in the disk array devices at the local site and the remote site, copying is performed through a replica function. Even if the production site is affected by disaster, tasks can be continued at the local site having the same data as that of the production site and at the remote site a long distance away from the production site.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: January 11, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Masamitsu Takahashi, Koji Ozawa, Takao Satoh
  • Patent number: 7865785
    Abstract: A method and system for improving communications for systems (200) including at least one communications protocol (CP) enabled server device (206, . . . , 212). The method comprises performing a first diagnostic process (400). The first diagnostic process includes classifying at least one CP enabled server device as a malfunctioning device or an operational device. The method also includes preventing the CP enabled server device from participating in write or read transactions if it is classified as a malfunctioning device in the first diagnostic process. The CP enabled server device is prevented from participating in write or read transaction until the CP enabled server devices is reclassified in a subsequent repetition of the first diagnostic process as an operational device. The method further includes performing a write or read process with the CP enabled server device if it is classified as an operational device in the first diagnostic process.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: January 4, 2011
    Assignee: Honeywell International Inc.
    Inventor: John Michael Prall
  • Patent number: 7840844
    Abstract: Techniques for prioritizing test dependencies are described. A computer system employing such techniques may present a test structure for a set of test cases. The test structure may comprise prioritized test cases and dependencies between test cases. The dependencies may be based on predicted test case failure given failure of another test case. Other embodiments are described and claimed.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: November 23, 2010
    Assignee: Microsoft Corporation
    Inventors: Adam Garland, Ricardo Lopez Barquilla
  • Patent number: 7840839
    Abstract: A fault-tolerant virtualized computer system comprises a primary host executing a primary virtual machine (VM) and a backup host executing a backup VM. In one embodiment, each VM includes a virtual disk mapped to a shared disk image on physical disk accessible to both hosts. A virtual disk IO request is received by virtualization software executing on the backup host from a backup VM. When the virtual disk IO request is a read request, the virtual disk IO request is mapped to a physical read IO request of a virtual disk image stored on a physical disk, the physical read IO request is issued to the physical disk. However, when the virtual disk IO request is a write request, it is assumed to be completed without mapping the virtual disk IO request or issuing a mapped physical IO request to the physical disk.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: November 23, 2010
    Assignee: VMware, Inc.
    Inventors: Daniel J. Scales, Michael Nelson, Andrew Tucker, Eric Lowe
  • Patent number: 7840833
    Abstract: A system for managing a cluster of nodes, the cluster comprising a plurality of groups of nodes, each node being associated with a vote, the system further comprising an arbitration device, the arbitration device being associated with a number of votes dependent on the number of nodes in the cluster, each node further being associated with a cluster manager, one of the cluster managers for each group being operable: if the group is in communication with the arbitration device, to determine whether the group has the greatest number of votes, including the votes of the arbitration device; if the arbitration device is operative, but the group is not in communication with the arbitration device, to determine whether the group meets the quorum without adjusting the quorum; and if the arbitration device is not operative, to determine whether the group meets the quorum after adjusting the quorum.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: November 23, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shailendra Tripathi, Tanmay Kumar Pradhan, Akshay Nesari
  • Patent number: 7836350
    Abstract: Provided is a method of controlling a computer system that includes: a computer; a first storage device connected to the computer via a first path and a second path; and a second storage device externally-connected to the first storage system via a third path and connected to the computer via a fourth path, the first storage device providing a first storage area to the computer, the second storage device including a second storage area corresponding to the first storage area, the method including: judging whether or not a fault has occurred in at least one of the first to fourth paths; selecting, a path used for access to the first or second storage area; and transmitting the access request for the first or second storage area by using the selected path. Accordingly, in the computer system, an application can be prevented from being stopped despite a fault in a path.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: November 16, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Haramai, Hiroshi Yokouchi, Ryu Gemba, Atsushi Kondo, Kazuhiro Oyama