Patents Examined by Gabriel L. Chu
  • Patent number: 7568132
    Abstract: A network storage system has a structure for notifying the data storage system of a fault in the file server, the storage system having means for sending fault notification data to an external maintenance center. The file server can detect a fault and transmit data regarding the fault to the storage control unit while specifying a predetermined logic unit of the storage control unit, and the storage control unit has a faulty part management table, a function for storing the fault-related data transmitted from the file server unit separately from the data exchanged with the computers, a function for detecting a fault other than the fault in the file server unit and for storing that data in the faulty part management table, and a function for transmitting all or part of the faulty part management table to an external unit.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: July 28, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Nakayama, Shizuo Yokohata
  • Patent number: 7552363
    Abstract: A data processing apparatus and method for generating trace elements is provided. The data processing apparatus comprises logic producing a series of data elements, indicative of the operation or state of all or part of the logic. Trace logic is provided for receiving indications of these data elements, and for generating from the indications a stream of trace elements. When for a given data element, at least part of the data element is derivable from a reference to a control value stored in a storage element, the trace logic is operable, dependent on that data element, to omit that part of the associated data element indication from the corresponding trace element generated in respect of the data element, instead including a reference to the corresponding storage element. A trace analysing apparatus can then be used to reconstruct such omitted information based on a copy of the relevant storage element.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: June 23, 2009
    Assignee: ARM Limited
    Inventor: Sheldon James Woodhouse
  • Patent number: 7549087
    Abstract: Methods and systems for providing information to a user when an application is in a hung state are provided. When an application is in a hung state, a dialogue box informing the user of options for responding to the hung application is displayed. An application window may also be replaced with a proxy window and the appearance of the proxy window may be altered when a user attempts to interact with the proxy window.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: June 16, 2009
    Assignee: Microsoft Corporation
    Inventors: Charles Cummins, Gerald F. Maffeo, Lyon K. F. Wong, Reiner Fink
  • Patent number: 7539903
    Abstract: The invention relates to a method for monitoring the execution of a program in a microcomputer of an electronic device, especially a sensor circuit for motor vehicles. According to the inventive method, the program processes input data and produces output data, copies a program in addition to the program which is executed, said copy being stored in an address area in the micro-computer other than the program, using the input data provided for the program. The output data of the copy is compared to the data of the program and an error message is produced if the programs are not consistent.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: May 26, 2009
    Assignee: Siemens Aktiengesellschaft
    Inventors: RĂ¼diger Kolb, Uwe Platzer, Dietmar Schmid
  • Patent number: 7536609
    Abstract: A system for managing clock adjustment in a storage system is provided. The system includes a clock configured to provide a current time, wherein the current time is used to enforce a content retention period, a memory configured to store clock management information, wherein the clock management information includes a last adjustment time and a number of maximum adjustable time ranges, wherein the last adjustment time represents the time which the clock was last adjusted, and a storage access program. The storage access program is configured to receive a proposed new time for the clock, determine whether the proposed new time is reasonable using the current time, the last adjustment time and a specific range selected from the maximum adjustable time ranges, and adjust the current time of the clock to the proposed new time if it is determined that the proposed new time is reasonable.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: May 19, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Nakamura, Manabu Kitamura
  • Patent number: 7536594
    Abstract: The invention relates to a stand-alone video recording, playback and Monitoring system. It has network switches, non-volatile storage devices, IP cameras, video servers, and NTSC cameras. The system uses communication channels that are WAN/LAN based and can be hard-wired or wireless and has a flexibly implemented watchdog to detect, for example, hardware and power failure as well as other failures in the system.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: May 19, 2009
    Assignee: Videogenix
    Inventors: Glen D. Schaff, Eric Louis
  • Patent number: 7536592
    Abstract: The present invention is devised so that snapshot data preparation processing does not end abnormally as a result of the pool region becoming full with saved data from the primary logical volume during snapshot data preparation. When the CHA receives a snapshot data preparation request, the CHA checks whether or not update information is present in the logical volume that is the object of this data preparation. If such information is present (YES in S51), a check is made from the number of slots in the in the volume control information and the updating amount count value in the update information in order to ascertain whether or not the proportion of the updating amount relative to the number of slots is equal to or greater than the threshold value in the threshold value control information (S52). If this proportion is equal to or greater than the threshold value (YES in S52), the update information is initialized (S53), and physical snapshot control is started (S54).
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: May 19, 2009
    Assignee: Hitachi, Ltd.
    Inventor: Haruaki Watanabe
  • Patent number: 7536584
    Abstract: A SAS expander includes SAS PHYs for transceiving signals with SAS devices on corresponding SAS links coupled to the SAS PHYs. The SAS expander includes status registers that provide fault detection parameters concerning communications on the SAS links. A microprocessor of the SAS expander identifies faulty communications on one of the SAS links, based on the fault detection parameters, and disables a corresponding one of the SAS PHYs coupled to the SAS link on which the microprocessor identified the faulty communications. The microprocessor may also report the PHY disabling to a SAS initiator. The microprocessor may also re-enable the PHY after corrective action is taken, such as in response to user input, an indication from a SAS device, or automatically detecting the corrective action. The expander may also automatically take the corrective action. The fault detection parameters may include error counters and corresponding thresholds, interrupt indicators, and state values.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: May 19, 2009
    Assignee: Dot Hill Systems Corporation
    Inventors: Ian Robert Davies, George Alexander Kalwitz, James Boyd Lenehan
  • Patent number: 7536582
    Abstract: A match-and-set lock has a locked operating state and an unlocked operating state controlled by the value C. The lock returns a value R=C, to an inquiring user seeking access to the resource. A return value R=0 denotes that the resource is free, and a return value R?0 denotes that the resource is locked by another user. The lock is responsive to a command in the form (A, B) to B for C if A=C. Thus, the lock may be locked by issuing the command (A, B) where A=C and B?0; and the lock may be released by issuing the command (A, B) where A=C and B=0. A deadlock condition may be avoided by setting the lock to the value B=P+T*(N+1), where P<(N+1) and identifies the user issuing this command (A, B), and T is the current global time stamp when the user issues this command.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: May 19, 2009
    Assignee: AT&T Corp.
    Inventor: Yuguang Wu
  • Patent number: 7529975
    Abstract: A method for testing a processor subassembly includes providing a computer system comprising subassemblies. Each subassembly includes processors having internal communication paths and ports that provide external communication paths to other subassemblies via a midplane circuit board. For each subassembly, a first port is connected to a second port via the midplane circuit board, thereby re-routing external communication paths back to the subassembly instead of to other subassemblies and allowing communication between the processors through external paths. Each subassembly can be tested one at a time.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: May 5, 2009
    Assignee: International Business Machines Corporation
    Inventor: Warren R. Davis
  • Patent number: 7526686
    Abstract: An apparatus, system and method of verifying data are provided. Active data are identified among data on a storage device, records the location of the active data, and the integrity of the active data are verified. In one embodiment, data in segments adjacent to the active data segments are also identified and verified for improved data reliability. The data verification may be used to increase data reliability with low system resource usage.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: April 28, 2009
    Assignee: International Business Machines Corporation
    Inventors: Robert John Kolvick, Jr., Karl Allen Nielsen
  • Patent number: 7523356
    Abstract: A storage controller (104) for a storage system (100) in which there are multiple storage devices (109) and a method for recording diagnostic information are provided. The storage controller (104) includes a storage device manager (203) which has means for allocating a storage device (109) in the storage system (100) for storing diagnostic data. The storage controller (104) also includes means for generating diagnostic data regarding the operation of the storage controller (104). Two buffers (207, 208) are used for alternately recording and writing batches of diagnostic data to the allocated storage device (109). The allocated storage device may be a storage device which is normally reserved for disaster recovery in the storage system (100).
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: April 21, 2009
    Assignee: International Business Machines Corporation
    Inventors: Eric John Bartlett, William James Scales
  • Patent number: 7523343
    Abstract: A file system enables the real-time correction of detected corruptions to on-disk data. An enhancement to a file system responds in real time to file system corruptions detected on a running volume, and repairs the corruptions at the point where the file system detects them. Upon detection of a corruption by the file system, the system enhancement records information describing the nature of the corruption. A repair scan is defined for each type of corruption encountered. Repair scans can be run at the top level of execution in the current thread in which the corruption is detected, or they may require a dedicated thread to service the repair operation.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: April 21, 2009
    Assignee: Microsoft Corporation
    Inventors: Benjamin A. Leis, Brian D. Andrew, Daniel W. H. Chan, Mark J. Zbikowski, Vishal V. Ghotge, Thomas J. Miller
  • Patent number: 7519867
    Abstract: A system and method for automatically detecting heap corruption errors and memory leak errors caused by user-supplied code modules that are called by steps of a test executive sequence. The test executive sequence may first be created by including a plurality of test executive steps in the test executive sequence and configuring at least a subset of the steps to call user-supplied code modules. The test executive sequence may then be executed on a host computer under control of a test executive engine. For each step that calls a user-supplied code module, the test executive engine may perform certain actions to automatically detect whether the user-supplied code module causes a heap corruption error and/or automatically detect whether the user-supplied code module causes a memory leak error.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: April 14, 2009
    Assignee: National Instruments Corporation
    Inventor: James A. Grey
  • Patent number: 7519861
    Abstract: A method for diagnosing devices via a remote testing device (2) being connectable to devices to be diagnosed (1) via a communication network (4) is provided. Between the remote testing device (2) and the devices to be diagnosed (1) first diagnostics information is exchanged (S3, S8, S11-S16) to perform said remote diagnosing. The remote diagnosing is done in dependence of second diagnostics information being exchanged between (S6, S7) said remote testing device (2) and controlling devices (3) being connectable to said remote testing device (2) via said communication network (4).
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: April 14, 2009
    Assignee: Sony Deutschland GmbH
    Inventors: Matthias Mayer, Ulrich Clanget
  • Patent number: 7512841
    Abstract: A method and system for locating a fault in a network. According to the system, an address analyzer and interface analyzer of a network manager of the network detect that there is a failure associated with a node of the network, a node analyzer of the network manager determines if the node responds to a poll, and if the node does not respond to the poll, a neighbor analyzer of the network manager models the failure, further comprising determining a number and a polling of a plurality of neighbor nodes of the node and assigning the fault in accordance with the number and the polling of the plurality of neighbor nodes According to the method, in response to a node having one or more of one or more addresses and one or more interfaces that fail to respond to a poll, polling the node and polling a plurality of neighbor nodes of the node and assigning the fault in accordance with the polling of the node and a number and the polling of the plurality of neighbor nodes.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: March 31, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Anthony Paul Michael Walker, Darren D. Smith, David M. Rhodes, Srikanth Natarajan, Kam Chooi Wong
  • Patent number: 7509527
    Abstract: A disk array device has: a CM separating part that, when abnormality occurs in a CM, separates the CM in which the abnormality has occurred from a storage system after write of CM operation information data to a hard disk is completed; and communication path reconfiguring parts that reconfigure communication paths between the CM in which the abnormality has occurred and DAs. When abnormality occurs in the CM, the communication paths between the CM and the DAs are reconfigured, and after the CM operation information data of the CM is written to the hard disk, the CM is separated. Therefore, the write processing is not interrupted halfway, so that the useful operation information data regarding the cause of the problem occurrence can be written to the hard disk having a sufficient storage area.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: March 24, 2009
    Assignee: Fujitsu Limited
    Inventors: Takashi Kawada, Kazuo Nakashima, Osamu Kimura
  • Patent number: 7506211
    Abstract: Atomic testing of a multiplicity of scenarios includes generating a listing of interacting scenarios which are likely to cause a failure, and testing ones of the scenarios not included in the listing according to a binary search strategy to identify a subset of the scenarios as a source of failure among the scenarios. Additionally, the listing can be updated with newly identified interacting scenarios which are likely to cause a failure.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: March 17, 2009
    Assignee: International Business Machines Corporation
    Inventors: Laura Ioana Apostoloiu, Philip Arthur Day, Behrad Ghazizadeh
  • Patent number: 7496787
    Abstract: The invention relates to checkpointing memory. In one aspect, a processor directs a write request to a location within a first memory. The write request includes at least a data payload and an address identifying the location. An inspection module identifies the write request before it reaches the first memory, copies at least the address identifying the location, and forwards the write request to a memory agent within the first memory.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: February 24, 2009
    Assignee: Stratus Technologies Bermuda Ltd.
    Inventors: John Edwards, Michael Budwey
  • Patent number: 7496795
    Abstract: The present invention provides a method, system, and computer program product for light weight memory leak detection. A method in accordance with an embodiment of the present invention comprises: obtaining raw free memory statistics; approximating free memory after garbage collection from the raw free memory statistics; and analyzing the approximated free memory after garbage collection to identify a potential memory leak. A method in accordance with another embodiment of the present invention comprises the steps of: obtaining raw free memory statistics; generating a vector of memory leak indicators from the raw free memory statistics; comparing the vector of memory leak indicators against a plurality of vectors of the same memory leak indicators for known memory leak scenarios; and identifying a potential memory leak based on the comparison.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: February 24, 2009
    Assignee: International Business Machines Corporation
    Inventors: Robbie J. Minshall, Ruth E. Willenborg