Patents Examined by Gareth D. Shaw
  • Patent number: 5359721
    Abstract: In a network of object oriented distributed systems, a plurality of program code managers, each having access to a plurality of program code segment objects, a plurality of address space managers, each having access to a plurality of address space objects having linked program segment and symbol address information, and a plurality of trusted third party authentication managers are provided, thereby allowing a client process executing in non-supervisor mode to be able to dynamically link a program segment to either another program segment in another address space or a process in either another address space or the client's address space, without compromising the security of the systems.
    Type: Grant
    Filed: December 18, 1991
    Date of Patent: October 25, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: James Kempf, Michael L. Powell
  • Patent number: 5357612
    Abstract: In the environment of a plurality of processors interconnected by a shared intelligent memory, a mechanism for the secure passing of messages between tasks operated on said processors is provided. Inter-task message passing is provided by shared intelligent memory for storing the messages transmitted by sending tasks. Further, each processor includes serving means for getting the messages to be sent to the task operated by said each processor. The passing of messages from a processor to the shared intelligent memory and from the latter to another processor is made, using a set of high-level microcoded commands. A process is provided using the message passing mechanism together with redundancies built into the shared memory, to ensure fault-tolerant message passing in which the tasks operated primarily on a processor are automatically replaced by back-up tasks executed on another processor if the first processor fails.
    Type: Grant
    Filed: January 11, 1993
    Date of Patent: October 18, 1994
    Assignee: International Business Machines Corporation
    Inventor: Haissam Alaiwan
  • Patent number: 5357628
    Abstract: A system management mode (SMM), an external dedicated system management memory (SMRAM), a system management interrupt (SMI), a SMI service handler with an integrated debugger, a Resume instruction (RSM), and at least one way for triggering a SMI as a result of a debugging request is provided to a computer system. Debugging is performed under SMM with the integrated debugger which is stored with the SMI handler in the SMRAM and given control after the SMI handler has gotten control and determined in its initial processings that the SMI handler has gotten control as a result of a SMI triggered by a debugging request. The SMI handler gets control after the computer system is put into SMM in response to the SMI. Upon exiting the integrated debugger, the SMI handler executes the RSM instruction to continue execution with the interrupted program.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: October 18, 1994
    Assignee: Intel Corporation
    Inventor: Desmond Yuen
  • Patent number: 5357631
    Abstract: A method and system for creating and maintaining multiple document versions in a data processing system implemented library. Selected documents within a data processing system implemented library are uniquely identified as root documents and a version-root identifier for each successor version of a particular root document is established. Thereafter, a selected version-root identifier is automatically associated with each created successor version of a root document. Upon the creation of a successor version of a root document and a second predecessor document, the version-root identifier associated with the root document is automatically associated with the successor version and the second predecessor document. Upon the creation of a successor version base upon multiple non-root predecessor documents a particular non-root predecessor document is automatically selected as a root document and a version-root identifier is established and associated therewith.
    Type: Grant
    Filed: December 9, 1991
    Date of Patent: October 18, 1994
    Assignee: International Business Machines Corporation
    Inventors: William E. Howell, Hari N. Reddy, Diana S. Wang
  • Patent number: 5355480
    Abstract: An interactive terminal comprises a processor, a local data store connected to the processor, a character generator responsive to processor control for generating a television signal output to an associated television receiver, a key pad or remote control for inputting information to the processor, and a power supply input. The terminal is coupled, via 2-way RF communications, to a central location designated as the system manager, where the terminal is accessed by polling for monitoring and servicing terminal user requests. The interactive terminal has a local storage capacity for storing a number of character screen commands, accessed from a central data base at the system manager, for use in generating prompting screens displayed on the television receiver. In use, a user may call for a variety of services by operating the input keys of the key pad to cause a prompting screen to be displayed. Screen commands are stored at the terminal according to an assigned priority.
    Type: Grant
    Filed: October 13, 1992
    Date of Patent: October 11, 1994
    Assignee: Scientific-Atlanta, Inc.
    Inventors: Elizabeth A. Smith, Lee R. Johnson
  • Patent number: 5355491
    Abstract: A retargetable data generation method for a compiler program which may be executed on a general purpose information handling system such as an IBM System 370 includes the following steps, ordering the data according to a storage class, mapping the ordered data into sections in accordance with established criteria, ordering the sections into a number of parcels in accordance with one or more data attributes, determining format for an item in a parcel, and formatting each such item in each such parcel according to the determined format.
    Type: Grant
    Filed: June 13, 1991
    Date of Patent: October 11, 1994
    Assignee: International Business Machines Corporation
    Inventors: Francis D. Lawlor, Thomas M. Spence
  • Patent number: 5355490
    Abstract: In accordance with the present invention, a resume processing driver for an advanced microprocessor, such as the Intel 80386 operating in enhanced mode, is provided which saves data indicative of the operating conditions of the advanced microprocessor into system memory and then calls a previously existing resume processing routine designed for a previously existing operating system, such as MS-DOS operating in real mode. The previously existing resume processing routine performs additional processing in order to save operating condition data associated with the previously existing operating system into system memory, and then performs a controlled power off sequence and removes the power supplied to all elements of the computer except the computer memory.
    Type: Grant
    Filed: June 14, 1991
    Date of Patent: October 11, 1994
    Assignee: Toshiba America Information Systems, Inc.
    Inventor: James T. L. Kou
  • Patent number: 5355498
    Abstract: In a computer system, a system boot prom having a bootstrap program is provided for booting the computer system from a boot device having a boot program and an operating system. The bootstrap program is designed to create a boot prom interface through which the boot program uses to locate the device driver for loading the operating system from the boot device. As a result, the device driver for the boot device may be provided in the system boot prom or a third party boot prom, thereby allowing the computer system to be booted from either a standard or a third party boot device without requiring rebuilding of the system boot prom.
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: October 11, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Joseph E. Provino, William F. Pittore
  • Patent number: 5355481
    Abstract: A method for accessing a stored data base comprising a number of blocks, each of said blocks containing a plurality of data files and a directory with access keys of the files stored in each of the respective blocks, and comprising means for effecting a sorted ordering of the data files such that the access keys in each block have a predetermined relation. Before the data base is accessed the directories of all blocks are read once in a predetermined order to determine the range of access keys in each directory. Thereafter, during each access operation first of all those directories are sorted out (identified) in which, based on the determined ranges of access keys, the search key of the requested data file might be present. Only blocks corresponding to the sorted out directories are then searched for the requested data file.
    Type: Grant
    Filed: December 8, 1992
    Date of Patent: October 11, 1994
    Assignee: International Business Machines Corporation
    Inventor: Aloysius W. M. Sluijter
  • Patent number: 5355482
    Abstract: A process controlling method uses a flowchart language program and ladder programs with an intermediate register to be accessible with the same name by both the flowchart language program and the ladder programs. Each ladder program defines the operation of a machine, including an interlock condition or the like of the machine operation. The flowchart language program defines an automatic operation flow which sequentially activates the ladder programs using the data in the intermediate register. This arrangement allows the flowchart language program to be separated from the ladder programs, thereby improving productivity, serviceability and security of the programs.
    Type: Grant
    Filed: April 2, 1991
    Date of Patent: October 11, 1994
    Assignees: Hitachi, Ltd., Hitachi Information & Control Systems, Inc.
    Inventors: Akihiro Ohhashi, Tadashi Okamoto, Makoto Tachikawa, Takeshi Katoh, Noboru Azusawa, Junichi Hamano, Hitoshi Saitoh
  • Patent number: 5355484
    Abstract: A computer operating system manages events. An application program or another part of the operating system defines an event monitor to monitor one or more types of events on its behalf. When each of the monitored events occurs, the event monitor is signalled and stores the event signal. Under certain conditions, the event monitor can notify an event handler, and the event handler can access the stored event signals. The event monitor can be defined and established dynamically, i.e. throughout operation of the computer without stopping or relinking the computer system. In the absence of an event monitor which is interested in an event, signals of the event are nevertheless stored. When an interested event monitor is subsequently established, the previously stored event signals are transferred to the interested event monitor. Thus, the event handler has the benefit of previous event signals.
    Type: Grant
    Filed: August 12, 1991
    Date of Patent: October 11, 1994
    Assignee: International Business Machines Corporation
    Inventors: Stephen E. Record, Ann M. Shepherd, Steven S. Shultz
  • Patent number: 5355495
    Abstract: A method of performing state transition control in an electronic apparatus in which it is first determined whether a functional transition request has occurred. A main routine is performed if no transition request has occurred and a state transition processing is performed if a transition request has occurred. By calling the main routine as a subroutine during the state transition processing, interrupt processing and separated stack processing are avoided.
    Type: Grant
    Filed: January 29, 1992
    Date of Patent: October 11, 1994
    Assignee: Sony Corporation
    Inventor: Yuriko Kishitaka
  • Patent number: 5353416
    Abstract: A shared bus arbitration system is disclosed which provides logic allowing multiple processors to co-exist on a common bus. In the present invention, the host processor is isolated from the bus by a posted write array or write buffer. The arbitration system accepts bus lock and cycle signals when the processor writes a locked instruction to the posted write array and provides a bus lock signal to the bus when the locked instructions are written to the bus.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: October 4, 1994
    Assignee: Zenith Data Systems Corporation
    Inventor: Anthony M. Olson
  • Patent number: 5353411
    Abstract: In an operating system generation method for a computer, at a system initiation, a kernel as the basic portion of the operating system is linked with a plurality of input-output drivers controlling input-output devices. A directory name of each driver and an address thereof in a main memory are stored in a table within the kernel with a correspondence established therebetween, which allows mutual references between the kernel and the input-output drivers and which hence enables the input-output drivers to be generated in an independent fashion with respect to the kernel. As a result, the user can incorporate desired input-output drivers into an operating system depending on a hardware configuration of the computer system.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: October 4, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yoshitake Nakaosa, Megumu Kondo
  • Patent number: 5349680
    Abstract: An information processing apparatus for executing application programs under the control of a system program consists of, memory for storing the system program, context blocks for storing contexts being equivalent to the contents of the application programs, system processor for controlling the execution of the application program stored in the corresponding context block after the next application program to be executed is determined by the execution of the system program, load pointer for pointing out the address of the context block under the control of the system program executed in the system processor, and application processor for executing the application program stored in the corresponding context block of which the address is pointed out by the load pointer.
    Type: Grant
    Filed: October 31, 1991
    Date of Patent: September 20, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Katsuhito Fukuoka
  • Patent number: 5349665
    Abstract: According to the present invention, there is provided a compiler vectorizing system for vectorizing the same variables defined at a plurality of positions by using an asymptotic formula in which a condition data generating formula generates condition data reflecting whether each condition is met. After a work array is generated corresponding to the variable, a linear asymptotic formula having a linear coefficient computed from the condition data and a constant term computed from the condition data is generated. A formula assigned to the variable by an asymptotic formula generating portion is used to substitute the entire definition of the variable within the loop with the asymptotic formula and to substitute the reference of the variable by the element of the work array set with a subscript at a variable substituting portion. As a result, a loop which cannot be vectorized according to the conventional technique can be vectorized.
    Type: Grant
    Filed: January 13, 1993
    Date of Patent: September 20, 1994
    Assignee: NEC Corporation
    Inventor: Akiyoshi Endo
  • Patent number: 5349657
    Abstract: A method of automating HELP panel uploading in a data processing system is disclosed. A Multiple Virtual Storage (MVS) environment is created by allocating a Virtual Storage Access Method (VSAM) cluster and installing it in a Customer Information Control System region (CICS) executing OfficeVision/Multiple Virtual Storage (OV/MVS). HELP panels assembled as Personal Computer (PC) batch files are uploaded and placed in temporary storage within OV/MVS. OV/MVS facilities are used to move the PC batch files from temporary storage and convert the files to MVS formatted files. The converted files are placed in a special save area. Shared document are created using the converted PC files from the special save area used as HELP panel header data.
    Type: Grant
    Filed: April 19, 1993
    Date of Patent: September 20, 1994
    Assignee: International Business Machines Corporation
    Inventor: Adrienne Y. Lee
  • Patent number: 5349659
    Abstract: A system and method are described for decreasing the synthesis time required for realizing digital circuit net lists using library logic elements. The system consists of a logic processor working in concert with a cell library register, a hierarchical cell array memory, and a match register, for the purpose of hierarchically ordering, matching and eliminating equivalencies in the canonical forms of library cells. The method includes the reduction of all library elements to their canonical forms and the hierarchical ordering of the these canonicals based on the number of nodes contained in each element. Once ordered, the canonicals are mapped by logic elements having fewer nodes, beginning with the simplest of the canonical forms. Redundantly mapped logical elements are eliminated and the resulting reduced set is stored for subsequent use.
    Type: Grant
    Filed: January 23, 1992
    Date of Patent: September 20, 1994
    Assignee: Cadence Design Systems, Inc.
    Inventors: Cuong Do, Ruey-Sing Wei
  • Patent number: 5349673
    Abstract: A master/slave system which includes an electronic exchange as a master device and various types of terminal units as slave devices connected to the electronic exchange. The electronic exchange is arranged to supply, at the time of a slave device is started, a program for managing and controlling the slave devices to the started slave device. In the system, for example, a control program describing only a control procedure common to the slave devices is stored in the master device and other control programs each uniquely corresponding to each of different specifications of the respective slave devices are stored in the respective slave devices, whereby the size of the control program stored in the master device can be minimized.
    Type: Grant
    Filed: July 25, 1990
    Date of Patent: September 20, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Susumu Yasuda
  • Patent number: 5349664
    Abstract: A method and apparatus for executing an initial program load (IPL) control in a multiprocessor system. The multiprocessor system including a global storage unit and a plurality of clusters, each of the clusters having at least one or more processors and a local storage unit, and one of the clusters having a direct access storage device. The method comprising the steps of executing the IPL from the processor belonging to the cluster having the direct access storage device to the local storage unit belonging to that cluster; transferring the IPL information from the local storage unit executing the IPL to the global storage unit; and transferring the IPL information from the global storage unit to the local storage unit in another cluster not having the direct access storage device.
    Type: Grant
    Filed: August 3, 1992
    Date of Patent: September 20, 1994
    Assignee: Fujitsu Limited
    Inventors: Masayuki Ikeda, Koichi Ueda