Patents Examined by Gary Collins
  • Patent number: 11449117
    Abstract: During normal operation of a processor, voltage droop is likely to occur and there is, therefore, a need for techniques for rapidly addressing this droop so as to reduce the probability of circuit timing failures. This problem is addressed by provided an apparatus that is configured to detect the droop and react to mitigate the droop. The apparatus includes a frequency divider that is configured to receive an output of a clock signal generator (e.g. a phase locked loop) and produce an output signal in which a predefined fraction of the clock pulses in the output of the clock signal generator are removed from the output signal. By reducing the frequency of the clock signal in this way (as may be understood by examining equation 3) VDD is increased, hence mitigating the voltage droop. This technique provides a fast throttling mechanism that prevents excessive VDD droop across the processor.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: September 20, 2022
    Assignee: GRAPHCORE LIMITED
    Inventors: Stephen Felix, Daniel Wilkinson
  • Patent number: 11449030
    Abstract: There is provided a solid shape information generation system to form a solid shape object suitable to cultivate a plant. The solid shape information generation system includes a forming information generator that generates forming information to form a solid shape object used to cultivate a plant using a first material and a second material based on information representing the solid shape object and form an area where at least the plant is sown using the first material whose tensile strength is lower than that of the second material; and an output unit that outputs the forming information for a solid shape forming unit to form the solid shape object.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: September 20, 2022
    Assignee: SONY CORPORATION
    Inventor: Yuichiro Takeuchi
  • Patent number: 11442082
    Abstract: During normal operation of a processor, voltage droop is likely to occur and there is, therefore, a need for techniques for rapidly and accurately detecting this droop so as to reduce the probability of circuit timing failures. The droop detector described herein uses a tap sampled delay line in which a clock signal is split along two separate paths. Each of the taps in the paths are separated by two inverter delays such that the set of samples produced represent sample values of the clock signal that are each separated by a single inverter delay without inversion of the first clock signal between the samples.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: September 13, 2022
    Assignee: GRAPHCORE LIMITED
    Inventors: Stephen Felix, Daniel John Pelham Wilkinson
  • Patent number: 11435801
    Abstract: A powering co-packaged networking system includes a powering co-packaged networking device coupled via a power/data cable to a powered device. The powering co-packaged networking device includes a connector subsystem coupled to a power controller device and an optical/electrical signal conversion processing system that converts between optical signals and electrical signals. The connector subsystem is connected to the powered device via a power/data connector on the power/data cable, and includes an optical signal sub-connector that receives optical signals from the optical/electrical signal conversion processing system and transmits the optical signals via the power/data connector on the power/data cable and through the power/data cable to the powered device, and a power sub-connector that receives power from the power controller device and transmits the power via the power/data connector on the power/data cable and through the power/data cable to the powered device.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: September 6, 2022
    Assignee: Dell Products L.P.
    Inventors: Shree Rathinasamy, Neal Beard
  • Patent number: 11432483
    Abstract: A system and method for calibrating an irrigation system to account for variations in flow rates, motor operating parameters, and other parameters caused by field elevation changes, pipe friction losses, water emitter nozzle wear, pressure-regulator inaccuracies, and other factors. A calibration map is created to account for the flow rate variations or other parameters and then consulted to control operation of the irrigation system.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: September 6, 2022
    Assignee: LINDSAY CORPORATION
    Inventors: Michael George Ricketts, Brian James Magnusson
  • Patent number: 11418671
    Abstract: An information processing apparatus includes a storage unit in which a boot program is stored, a first control unit and a second control unit. The first control unit validates the boot program stored in the storage unit and transmits a pattern signal indicating that the boot program stored in the storage unit is validated. The second control unit executes the boot program stored in the storage unit in accordance with the pattern signal received from the first control unit.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: August 16, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shinichi Ono
  • Patent number: 11409879
    Abstract: The present disclosure relates to an electronic device, such as a system on chip, that may perform firmware updates based on user consent. The system on chip includes a nonvolatile memory (NVM), a main processor, a security NVM, and a security processor. The nonvolatile memory (NVM) stores first firmware and a user permission indicator. The main processor Loads the first firmware to boot a security processor. The security NVM contains first version information. The security processor compares version information of the first firmware to the first version information based on the user permission indicator and executes the first firmware in response to the matching of the comparison result. In some examples, the security processor is implemented on the same chip as the main processor.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: August 9, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Keunyoung Park, Dongjin Park, Jungtae Kim
  • Patent number: 11397018
    Abstract: The disclosure relates to an assembly composed of two or more electric drives, each of which is provided with a housing that is preferably closed all around; a transceiver or radio transmitter inside the housing of each electric drive is configured for wireless data communication with a master controller; for this purpose, a properly mounted transmission opening is provided in each housing in order for data to be transmitted and received through the transmission opening.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: July 26, 2022
    Assignee: ebm-papst Mulfingen GmbH & Co. KG
    Inventors: Martin Bürkert, Helmut Lipp, Thomas Sauer, Günter Haas, Markus Humm, Marco Weckert
  • Patent number: 11392389
    Abstract: An information handling system may include a processor and a read-only memory communicatively coupled to the processor and comprising a basic input/output system (BIOS)-accessible region of the read-only memory including a first subregion communicatively coupled to the processor via a first communications interface and a second subregion communicatively coupled to the processor via a second communications interface. The information handling system may also include the BIOS, configured to responsive to a read request from the processor to the BIOS-accessible region determine whether a memory address associated with the read request is within a decoding range of the first subregion, cause the processor to access the first subregion via the first communications interface if the memory address is within the decoding range, and cause the processor to access the second subregion via the second communications interface if the memory address is outside the decoding range.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: July 19, 2022
    Assignee: Dell Products L.P.
    Inventors: Xiaomei Miller, Chih Yung Lai, Chia Chien Chuang
  • Patent number: 11385985
    Abstract: A power consumption management method and a power consumption management device are provided. When a power module of a power supply for a server is faulty, a power consumption management device receives fault information sent by the power supply, and reduces first power consumption, calculated when the power module works normally, of the server by a first value to second power consumption of the server based on the fault information. The first value is not less than a reduced value, calculated when the power module is faulty, of power consumption of the server. In addition, the power consumption management device adjusts the second power consumption of the server based on a power consumption capping value of the server. According to the application, a breakdown of the server is avoided, and the power utilization after the power module is faulty is further improved.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: July 12, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jiangtao Wang, Zhibing Li, Lang Tao
  • Patent number: 11375677
    Abstract: A system and associated method are disclosed for dynamically and automatically optimizing fluid usage and preventing waste in an at least one pipe system, such as an irrigation system. In at least one embodiment, an at least one fluid sensor is positioned and configured for monitoring a flow of fluid through a pipe of an at least one zone of the pipe system. At least one control valve is positioned in-line with the pipe and configured for being selectively actuated for controlling the flow of fluid therethrough. At least one controller is positioned and configured for being in communication with each of the fluid sensor and control valve. At least one central computing system is in selective communication with the controller and configured for receiving and processing data related to at least one of the fluid sensor, controller and control valve.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: July 5, 2022
    Inventor: Max Safai
  • Patent number: 11372463
    Abstract: Examples described herein provide improved power down of PoE interfaces. Examples described herein may set a power fault value for each of a plurality of PSUs, and set a power threshold value for each of a plurality of PoE interfaces. Examples described herein may detect a fault that interrupts a flow of power from a subset of the PSUs to at least one of the PoE interfaces, and based on detecting the fault, for each PSU in the subset of the PSUs, add the power fault value for the PSU to a total power fault value. Examples described herein may, for each of the PoE interfaces, determine whether the total power fault value satisfies the power threshold value for the PoE interface, and based on a determination that the total power fault value satisfies the power threshold value for the PoE interface, power down the PoE interface.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: June 28, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Rachel Callison, Tsun-Yao Chang
  • Patent number: 11360536
    Abstract: The vector data path is divided into smaller vector lanes. A register such as a memory mapped control register stores a vector lane number (VLX) indicating the number of vector lanes to be powered. A decoder converts this VLX into a vector lane control word, each bit controlling the ON of OFF state of the corresponding vector lane. This number of contiguous least significant vector lanes are powered. In the preferred embodiment the stored data VLX indicates that 2VLX contiguous least significant vector lanes are to be powered. Thus the number of vector lanes powered is limited to an integral power of 2. This manner of coding produces a very compact controlling bit field while obtaining substantially all the power saving advantage of individually controlling the power of all vector lanes.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: June 14, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy David Anderson, Duc Quang Bui
  • Patent number: 11340690
    Abstract: In one or more embodiments, one or more systems, methods, and/or processes may: determine a utilization value of a processor; determine that the utilization value is at or is above a threshold utilization value; determine a temperature value of the processor; determine a temperature value of a voltage regulator that provides power to the processor; determine if the temperature value of the processor is below a first threshold value and if the temperature value of the voltage regulator is below a second threshold value; if so: determine first power utilization information that informs the processor that it is utilizing less power than it is currently utilizing and provide the first power utilization information to the processor; and otherwise: determine second power utilization information that informs the processor that it is utilizing more power than it is currently utilizing and provide the second power utilization information to the processor.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: May 24, 2022
    Assignee: Dell Products L.P.
    Inventors: Terry Lane Matula, Srinivas Kamepalli, Travis Christian North
  • Patent number: 11340688
    Abstract: An electronic apparatus, comprising a display control unit which performs control that in a first case where power supplies are connected to both a first power supply input unit and a second power supply input unit and a power supply capability from the first power supply input unit does not satisfy a prescribed criterion, a remaining capability of power supply from the second power supply input unit is displayed in a display appearance that differs from a remaining time or indicates that the remaining time is longer, and in a second case where a power supply is not connected to the first power supply input unit but a power supply is connected to the second power supply input unit, the remaining capability of power supply from the second power supply input unit is displayed in a second display appearance which indicates the remaining time.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: May 24, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Satoshi Ishimaru, Takutomi Ogawa
  • Patent number: 11340683
    Abstract: Techniques and mechanisms for a power management circuit to monitor a power domain during one or more attempts to configure a low power state of the power domain. In an embodiment, the one or more attempts are performed during an instance of a local power state at a processor that is coupled to the power management circuit. The monitoring is to detect for a condition wherein the power domain has been in a power state, other than the low power state, for longer than a predetermined threshold length of time. Where the condition is detected, the power management circuit generates one or more signals which change the local power state of the processor, or interrupt an operating system that is executed with the processor. In another embodiment, the power management circuit provides analytic data based on the monitoring of the one or more attempts.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: May 24, 2022
    Assignee: Intel Corporation
    Inventors: Christopher Lake, Vaibhav Shankar, Prashant Kodali
  • Patent number: 11314867
    Abstract: In some examples, a trust controller generates a first value and send the first value to a target controller of a subsystem, and generates a first verification value based on the first value and a known good code image for the target controller. The trust controller receives a second verification value from the target controller, the second verification value based on the first value and a code image to be executed at the target controller. The trust controller determines whether the code image to be executed at the target controller is compromised based on the first verification value and the second verification value.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: April 26, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Stewart Gavin Goodson, II, Daniel Humphrey, Robin Kel Schrader
  • Patent number: 11314315
    Abstract: Inventive aspects include a device including storage media. The device includes a PMU, and a controller communicatively coupled to the PMU. The PMU determines that an operating power of the device exceeds a threshold, and transmits a signal to the controller to trigger a power reduction operation. The controller throttles one or more operations until the operating power goes below the threshold. Some embodiments include a method for controlling performance of a storage device. The method includes measuring, by a PMU, a power consumption associated with a storage device. The method includes determining, by the PMU, whether the power consumption is greater than a threshold. In response, the method may include setting a performance throttle. The method may include determining, by the PMU, whether the power consumption is less than the threshold. In response, the method may include releasing the performance throttle.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: April 26, 2022
    Inventors: Young Deok Kim, Pyeongwoo Lee, Sumanth Jannyavula Venkata
  • Patent number: 11307558
    Abstract: Provided is a defect occurrence prediction system for a machine tool that makes it possible to identify the factors causing the occurrence of defects efficiently and effectively, and predict the occurrence of the defects accurately with good precision.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: April 19, 2022
    Assignee: FANUC CORPORATION
    Inventors: Kouya Okudera, Hiroki Mukai, Yuuya Miyahara, Yasushi Okajima, Shinichi Ogawa, Noboru Kurokami
  • Patent number: 11300937
    Abstract: An electronic apparatus includes a communication module configured to wirelessly communicate with an external remote controller; a main memory; and a main processor, wherein the main processor is further configured to transmit a control signal for registering a key value corresponding to a first key from among keys included in the external remote controller as a selected function from among a plurality of functions capable of being performed by the electronic apparatus to the communication module, based on product information of the electronic apparatus stored in the main memory, and wherein the communication module is further configured to register the key value corresponding to the first key to the selected function based on the control signal, and control the main processor to perform the selected function based on a signal corresponding to the key value corresponding to the first key being received from the external remote controller.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: April 12, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sukun Yoon, Younghoon Moon, Youngseok Ko, Jin Seol, Cheulhee Hahm