Abstract: A free-wheeling diode control method includes determining whether a sum of a first pulse width value of a free-wheeling diode obtained according to an inductance current law and a third pulse width value of a main control tube meets a first preset condition, obtaining a determining result, and controlling, according to the determining result, conduction of the free-wheeling diode according to the first pulse width value or a second pulse width value of the free-wheeling diode obtained according to a volt-second balance law.

Abstract: There is provided a drive circuit for turning on/off a power element which controls a main current flow between a first main electrode and a second main electrode in response to a drive signal applied to a control electrode. The drive circuit includes first and second semiconductor switch elements which are connected in series and interposed between a power supply terminal and a ground terminal, a series connection point thereof being connected to the control electrode, third and fourth semiconductor switch elements which are connected in series and interposed between the power supply terminal and the ground terminal, a series connection point thereof being connected to the second main electrode, and a control circuit which controls turn-on/off of the power element by turning on/off the first to fourth semiconductor switch elements. The first semiconductor switch element has a larger on-resistance than the second to fourth semiconductor switch elements.

Abstract: The present disclosure relates to electrostatic protection terminals. One example terminal includes a target interface, a protected circuit, a protection unit, a switch unit, and a switch control unit. The protected circuit is configured to suppress an electrostatic discharge (ESD) current or an electrical overstress (EOS) current. A first end of the protection unit is electrically connected to a first pin of the target interface. A second end of the protection unit is electrically connected to a second pin of the protected circuit. The first pin is any pin of the target interface. The second pin is a pin that is in the protected circuit and that needs to be electrically connected to the first pin. The switch unit is connected to the protection unit in parallel. The switch control unit is configured to control the switch unit to be open or closed.

Abstract: An AC-DC converter with secondary side control and synchronous rectifier (SR) architecture and method for operating the same are provided for reducing the cost, complexity and size of the converter while improving efficiency. In an example embodiment, an integrated circuit (IC) controller for the secondary side of the AC-DC converter comprises a zero-crossing detector (ZCD) block and a negative-sensing (NSN) block coupled to a terminal. The terminal is configured to receive an input signal from a drain node of a SR circuit on the secondary side of the AC-DC converter. The ZCD block is configured to determine when a voltage of the input signal reaches 0V. The NSN block is configured to determine a negative voltage of the input signal. An internal rectifier, coupled between the terminal and local ground, is configured to ensure that substantially no current flows through the terminal during operation of the ZCD block and the NSN block.

Abstract: Electrostatic discharge (ESD) protection for an electronic circuit includes a timer circuit that controls multiple clamp circuits. In this way, less circuit area may be used for the timer circuit as compared to conventional ESD protection schemes. In some embodiments, the ESD protection circuit is employed in a data storage apparatus that includes a non-volatile memory array (e.g., NAND devices).

Abstract: A power factor improvement circuit that performs, on the basis of an output voltage when a switching power-supply apparatus is in a light-load state or a no-load state, a burst operation for switching between states of the switching operation of a switching element includes: a first circuit that outputs a first voltage that corresponds to the error between a reference voltage and a voltage obtained by dividing the output voltage; and a clamp circuit that, while the burst operation is performed, clamps the lower limit of the first voltage, which decreases when the switching operation of the switching element is disabled, at a lower-limit voltage higher than the ground voltage of the power factor improvement circuit and clamps the upper limit of the first voltage, which increases when the switching operation of the switching element is performed, at an upper-limit voltage.

Abstract: A single-stage AC/DC converter includes a boost PFC AC/DC converter and a half-bridge split-capacitor DC/DC converter. The boost PFC AC/DC converter includes a boost inductor, and the half-bridge split-capacitor DC/DC converter includes an inductor in series with a primary winding of a transformer. A method of operation of a single-stage AC/DC converter that includes a boost PFC AC/DC converter and a half-bridge split-capacitor DC/DC converter includes modulating a switching frequency of at least one switch. The method may further include maintaining a constant duty cycle, for example a duty cycle of 0.5. An implementation of the boost inductor in a boost PFC AC/DC converter of a single-stage AC/DC converter includes a variable boost inductor, such as two inductors of approximately equal inductance, and a boost inductor switching circuit, such as two single-pole, double-throw relays.

Abstract: An electronic device having a plurality of external interfaces and capable of supplying a current to external devices connected via the external interfaces, respectively includes power supply control units corresponding to the respective external interfaces and a control unit having respective terminals for outputting a power supply control signal to the power supply control units. The control unit is configured to switch output of the power supply control signal for the power supply control unit corresponding to the selected external interface and control the power supply control signal for the power supply control units corresponding to the selected external interface to be switched off in a case where a state of the common overcurrent detection signal is changed in response to the switching of the output of the power supply control signal.

Abstract: There is provided a power conversion apparatus including first to fifth nodes. The power conversion apparatus includes: an inverter including a first switch between the first and second nodes, a second switch between the first and third nodes, a third switch between the second and fourth nodes, and a fourth switch between the third and fourth nodes; a filter including an inductor connected between the second and fifth nodes and a capacitor connected between the fifth and third nodes; and a current sensor configured to sense resultant current, which is the sum of inductor current flowing in the inductor and output current, wherein the output current is output to a load connected between the third and fifth nodes.

Abstract: Fault-type identification using composite signals composed from symmetrical component voltages and currents is described herein. Angular differences between negative-sequence composite signals and zero-sequence composite signals are used to determine a single-line-to-ground fault, and the faulted phase. Angular differences between positive sequence voltage and negative-sequence composite signals are used to determine a multiple-line-to-ground fault, and the faulted phases. Negative-sequence composite signals and zero-sequence composite signals are calculated using combinations of negative-sequence currents and voltages and zero-sequence voltages and currents, respectively.

Abstract: An intelligent power supply includes: constant current/constant voltage module; dimming control module which is located at a rear end of the constant current/constant voltage module and is electrically connected thereto; switching circuit for electrically connecting the constant current/constant voltage module and load, which is controlled by the dimming control module; the intelligent power supply further including voltage sampling module disposed between the constant current/constant voltage module and the dimming control module; and the power supply voltage of the voltage sampling module is provided by the constant current/constant voltage module, and the dimming control module detects the voltage signal of the sampling resistance of the voltage sampling module in real time; the operating power of the dimming control module is provided by the power supply voltage of the voltage sampling module.

Abstract: The cascaded multilevel inverter utilizes a delta polyphase circuit and transformers in each leg using cross-phase connection windings. Transformers corresponding to a number of phases of the inverter use an in-phase connection winding and a cross-phase connection winding to respective other legs, so that the respective transformers having the in-phase connection windings are connected in series with a DC power supply.

Abstract: A circuit for receiving the output from one of either a current transformer or a di/dt sensor includes: an input pair having a first input and a second input; a first output; a second output; a current transformer input circuit connected between the first input and the second input; and a di/dt sensor input circuit connected between the first input and the second input. The current transformer input circuit is configured to receive output from a current transformer connected to the input pair and to output a signal representative of the current sensed thereby via the first output. The di/dt sensor input circuit is configured to receive output from a di/dt sensor connected to the input pair and to output a signal representative of the current or time rate of change of the current sensed thereby via the second output.

Abstract: A magnetic core for inductor includes a first core segment, a second core segment spaced apart from the first core segment by a gap, and a spacer. The spacer is arranged within the gap and between the first core segment and the second core segment. The spacer includes a semi-conductive material to limit arc radius of magnetic flux lines communicated between the first core segment and the second core segment outside the gap. Inductors, flyback transformers and transformer rectifier units, and power conversion methods are also described.

Abstract: A polarity-selectable high voltage direct current power supply including a first drive assembly that transforms a first low voltage DC input into a first medium voltage alternating current output; a first HV output assembly that transforms the first LV AC output into a first HV DC output, wherein the first HV output assembly defines a first input stage; a polarity selector coupled between the second output junction of the first drive assembly and the first and second input stages of the first HV output assembly, the polarity selector operable between a first configuration and a second configuration; wherein in the first configuration the first HV DC output has a positive polarity; and wherein in the second configuration the first HV DC output has a negative polarity.

Abstract: A circuit includes an input node configured to receive an input reference signal. An output node is configured to provide a replica of the input reference signal with a respective scaling ratio to the input reference signal at the input node. A digital-to-analog converter has a reference input configured to receive the input reference signal from the input node, a digital input configured to receive a digital input signal having a digital signal value, and a digital-to-analog converter output configured to provide an output signal from the digital-to-analog converter resulting from conversion to analog of the digital input signal. The output node of the circuit is configured to sense the output signal from the digital-to-analog converter and to provide the replica of the input reference signal at the output node.

Abstract: A voltage regulator circuit includes a first transistor, an inductor, and a diode. The inductor connects to the diode at a switch node. The voltage converter produces an output voltage that is larger than an input voltage. The first transistor has on and off states and electrically couples a node to ground when in the on state. An error amplifier circuit generates an error signal based on a difference between a reference voltage and a voltage indicative of the output voltage. The error signal causes the first transistor to transition from the on to the off state. An adaptive off-time generator circuit couples to the input voltage node, and generates a signal to cause the first transistor to transition from the off to the on state. The time the first transistor is in the off state is inversely proportional to the time the first transistor is in the on state.

Abstract: Apparatus and methods for sensing a variable amplitude switching signal from a secondary winding in a power conversion system are disclosed herein. By using a comparator with an adaptable reference, variable amplitude secondary winding signals in phase with primary winding signals may be detected in the presence of ringing. Detection of the in phase secondary winding signals, in turn, allows for secondary side control with power factor correction and discontinuous mode operation.

Abstract: A power converter including: a first branch and a second branch of at least two series-connected switches each, coupled in parallel between a first terminal and a second terminal and having the junction points of their switches coupled to two terminals of application of a first voltage; a third branch and a fourth branch of at least two series-connected switches each, coupled in parallel between a third terminal and a fourth terminal, and having the junction points of their switches coupled to two terminals for supplying a second voltage; and at least one piezoelectric element coupling the first terminal to the third terminal.

Abstract: A chip protection circuit applied to a chip. The chip protection circuit comprises a transformer circuit, a first protection circuit and a second protection circuit. The transformer circuit has a first side and a second side. Each of the first side and the second side is disposed with first terminals, second terminals and center tap terminals. Three center tap terminal is coupled to a ground. The first protection circuit comprises a diode having a terminal coupled to the center tap terminal at the first side and another terminal coupled to the ground. The second protection circuit comprises input terminals and output terminals. The input terminals of the second protection circuit are coupled to the first terminal and the second terminals at the second side. The output terminals of the second protection circuit are coupled to the chip.