Patents Examined by Glenn A. Auve
  • Patent number: 11221978
    Abstract: An interrupt system for RISC-V architecture includes an original register in a CLIC, a pushmcause register, a pushmepc register, an interrupt response register, and an mtvt2 register; the pushmcause register is used to store a value in an mcause on a stack by means of an instruction; the pushmepc register is used to store a value in an mepc on a stack by means of an instruction; the interrupt response register is used to respond to a non-vectored interrupt request issued by a CLIC by means of an instruction, obtain an interrupt subroutine entry address, and modify a global interrupt enable; and the mtvt2 register is used to store a base address of an non-vectored interrupt in a CLIC mode.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: January 11, 2022
    Assignee: NUCLEI SYSTEM TECHNOLOGY CO., LTD.
    Inventor: Zhenbo Hu
  • Patent number: 11216407
    Abstract: A single communication interface between a master device and at least one slave device and a method with internal/external addressing mode using the single communication interface. In the single communication interface between a master device and at least one slave device, the master device includes a master interface and the slave device comprises a slave interface and a slave bus-system, whereas the slave interface is directly connected to the slave bus-system, wherein the master interface and the slave interface communicate on a packet based protocol by an internal and external addressing mode inside the slave interface, whereas the addressing mode, data transfer direction and data address location are coded by the packet based protocol inside a first 32-bit word of each transmission between the master device and slave device over the single communication interface.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: January 4, 2022
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Markus Krause, Martin Froehlich
  • Patent number: 11216284
    Abstract: A multi-die and multi-core computing platform in which multiple dies share the same storage device for firmware code storage is shown. After a slave die loads #1 firmware code from the storage device through a bus, the right to use the bus is released by the slave die and the slave die outputs a #0 enable signal to a master die. According to the #0 enable signal, the master die gains the right to use the bus. Through the bus, the master die loads #0 firmware code from the storage device. The slave die executes the #1 firmware code and the master die executes the #0 firmware code to initialize a link between the master and slave dies.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: January 4, 2022
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Jinglong Liu, Qunchao Feng, Yankui Niu, Yongfeng Song, Jintao Wang, Jiangbo Wang
  • Patent number: 11209891
    Abstract: An electronic control unit (ECU) includes a processor, a Controller Area Network (CAN) controller, clock gating logic, and security gating logic. The CAN controller having a status and configured to receive data and control signals from the processor, and a clock signal, package the data to create a CAN protocol frame held in at least one transmit buffer, and shift the CAN protocol frame to a CAN transceiver that is configured to transmit the CAN protocol frame to a CAN bus. The clock gating logic may be configured to selectively disable a clock signal to the CAN controller based on a control signal from the processor. The security gating logic configured to, in response to the status of the CAN controller being active, inhibit disabling the clock signal.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: December 28, 2021
    Inventors: Sekar Kulandaivel, Shalabh Jain, Jorge Guajardo Merchan
  • Patent number: 11210265
    Abstract: In an example, an apparatus comprises a plurality of execution units, and a first memory communicatively couple to the plurality of execution units, wherein the first shared memory is shared by the plurality of execution units and a copy engine to copy context state data from at least a first of the plurality of execution units to the first shared memory. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: December 28, 2021
    Assignee: INTEL CORPORATION
    Inventors: Altug Koker, Prasoonkumar Surti, David Puffer, Subramaniam Maiyuran, Guei-Yuan Lueh, Abhishek R. Appu, Joydeep Ray, Balaji Vembu, Tomer Bar-On, Andrew T. Lauritzen, Hugues Labbe, John G. Gierach, Gabor Liktor
  • Patent number: 11210255
    Abstract: This disclosure generally relates to USB TYPE-C, and, in particular, DISPLAYPORT Alternate Mode communication in a USB TYPE-C environment. In one embodiment, a device determines a DISPLAYPORT mode and determines an orientation of a USB TYPE-C connector plug. A multiplexer multiplexes a DISPLAYPORT transmission based in part on the determined orientation of the USB TYPE-C connector plug.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: December 28, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mark Edward Wentroble, Suzanne Mary Vining, Hassan Omar Ali
  • Patent number: 11204777
    Abstract: A host device is configured to communicate over a network with a storage system. The host device comprises a multi-path input-output (MPIO) driver configured to control delivery of input-output (IO) operations from the host device to the storage system over selected ones of a plurality of paths through the network. The MPIO driver is further configured to create a disk device on the host device, wherein the disk device corresponds to a subset of the plurality of paths to the storage system, and to execute a script enabling a boot image create operation to run on the created disk device.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: December 21, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Arnab Tah, Vighneshwar Hegde
  • Patent number: 11196221
    Abstract: A semiconductor device for determining whether a foreign substance (e.g., water) is present and a method of operating the same are provided. The semiconductor device includes a receptacle including a plurality of pins according to a USB type-C receptacle interface; a first current source providing first current to a CC1 signal pin or a CC2 signal pin among the plurality of pins in a first operation mode; a second current source providing second current to the CC1 signal pin or the CC2 signal pin in a second operation mode; a third current source providing third current to at least two pins of other pins excluding the CC1 signal pin and the CC2 signal pin; and a power delivery integrated circuit (PDIC) controlling the first current source, the second current source and the third current source and detecting the voltage level of a signal outputted to the plurality of pins.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: December 7, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Je Kook Kim
  • Patent number: 11194375
    Abstract: An apparatus to transfer data via a communication link comprises a power bus interface to a power bus of the communication link; at least one data lane transmitter and receiver pair configured to transfer data via a data lane of the communication link; and a power bus data transmitter and receiver pair configured to transfer data via the power bus using pulse width modulation of a data signal on the power bus.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: December 7, 2021
    Assignee: Intel Corporation
    Inventors: Huimin Chen, Abdul Ismail, Karthi Vadivelu, Yong Yang
  • Patent number: 11181962
    Abstract: A portable storage device includes nonvolatile memory devices to store data, a storage controller, and a bridge chipset. The bridge chipset is connected to a first connector of a host through a cable assembly, detects a resistance of the cable assembly, provides the storage controller with USB type information of the first connector based on the detected resistance, and after a USB connection is established with the host, provides the storage controller with USB version information associated with the established USB connection. The storage controller selects one of a plurality of operation modes based on the USB type information, the USB version information, and a request pattern indicating random or sequential access to the data from the host, selects clock signals having maximum frequencies in a range within a maximum power level associated with the selected operation mode, and performs power throttling based on the selected clock signals.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: November 23, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeayoung Kwon, Kyunghun Kim, Minseok Kim, Youngkeun Oh
  • Patent number: 11182326
    Abstract: Apparatus and methods for flexible input/output signaling over a same signaling channel are described. A programmable interface circuit includes a signaling channel that can be adapted, prior to use or during operation, for transmission and/or reception of different types of analog and digital signals. The interface circuit can be used for communications between an isolating communication controller and components of a machine that use diverse signaling types.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: November 23, 2021
    Assignee: OPTEON CORPORATION
    Inventors: T. Eric Hopkins, Timothy N. Schaeffer, Jeffrey Cho
  • Patent number: 11182329
    Abstract: A method for operating a data processing system including a host and a memory system coupled to each other through a plurality of slots and using a Universal Flash Storage (UFS) interface, the method includes: allocating, by the host, dedicated memory regions respectively corresponding to the slots during a booting operation of the host; communicating, between the host and the memory system in parallel through the slots based on command packets and address information for data buffer regions, the command packets and the address information being stored in the dedicated memory regions; and deallocating, by the host, the dedicated memory regions during a shutdown of the host.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: November 23, 2021
    Assignee: SK hynix Inc.
    Inventor: Eun-Soo Jang
  • Patent number: 11169819
    Abstract: Embodiments of information handling systems (IHS) and computer implemented methods are disclosed herein to proactively restore missing firmware components to a computer readable storage device of an IHS. In one embodiment, a method may execute a first set of program instructions, before an operating system (OS) is loaded into a system memory of the IHS, to determine if one or more firmware components previously stored within the computer readable storage device is/are missing. If the first set of program instructions determines at least one firmware component is missing, the method may execute additional program instructions to retrieve a copy of the missing firmware component(s) from a remotely located system, and store the retrieved copy of the missing firmware component(s) within the computer readable storage device. The additional program instructions can be executed before the OS is loaded in some embodiments, and after the OS is loaded in other embodiments.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: November 9, 2021
    Assignee: Dell Products L.P.
    Inventors: Alok Pant, Ibrahim Sayyed, Venkata Atta
  • Patent number: 11169952
    Abstract: The disclosure relates to a data transmission interface for use in a first integrated circuit (IC) for encoding and sending a data packet from the first IC to a second IC via a data bus having four data wires, the data transmission interface arranged to generate four time-dependent binary signals which jointly encode the data packet in signal edges thereof, each of the signals being associated with a unique wire of the data bus and spanning a temporal cycle T within which are defined four consecutive time stamps T1 . . . T4 at which edges can occur in the signals, the data transmission interface further arranged to transmit the signals to the second IC substantially in parallel on their respective data wires, wherein: irrespective of the data packet content, at each time stamp T1 . . . T4 at least one of the four signals has an edge to enable clock recovery at the second IC.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: November 9, 2021
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Ling Wang, Michael Zimin
  • Patent number: 11169560
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 9, 2021
    Assignee: Intel Corporation
    Inventors: Vasudevan Srinivasan, Krishnakanth V. Sistla, Corey D. Gough, Ian M. Steiner, Nikhil Gupta, Vivek Garg, Ankush Varma, Sujal A. Vora, David P. Lerner, Joseph M. Sullivan, Nagasubramanian Gurumoorthy, William J. Bowhill, Venkatesh Ramamurthy, Chris Macnamara, John J. Browne, Ripan Das
  • Patent number: 11163709
    Abstract: A port configuration migration system includes a primary I/O module connected to a server device via a secondary I/O module. A fabric manager system maps a virtual interface to a first downlink port on the primary I/O module that is connected to the secondary I/O module, with the virtual interface providing a virtual direct connection to the server device. The fabric manager system then configures the virtual interface with communication configuration information for the server device such that communications received via the first downlink port are transmitted using the virtual interface. The fabric manager system then receives a discovery communication from the server device via a second downlink port on the primary I/O module that is connected to the secondary I/O module, and remaps the virtual interface to the second downlink port such that communications received via the second downlink port are transmitted using the virtual interface.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: November 2, 2021
    Assignee: Dell Products L.P.
    Inventors: Pawan Kumar Singal, Balaji Rajagopalan, Ning Zhuang, Joyas Joseph, Joseph LaSalle White
  • Patent number: 11163716
    Abstract: Presented herein are embodiments for registering elements of a non-volatile memory express (NVMe) entity in an NVMe-over-Fabric (NVMe-oF) environment. In embodiments, a method for registering with a centralized storage fabric service component via a discovery controller (DC) of the centralize service comprises transmitting a DC registration command to the DC. In embodiments, the DC registration command includes a number of registration entries that the NVMe entity will be submitting for registration. In embodiments, the identified number of NVMe registration entries are transmitted to the centralized service and are stored in a registry. The NVMe registration entry may include an entry type for indicating an NVMe registration entry type, an NVMe qualified name (NQN) for identifying the NVMe entity, and a transport address for specifying an address of the element of the NVMe entity. Other NVMe entities may query the registry to obtain information about NVMe elements in the system.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: November 2, 2021
    Assignee: DELL PRODUCTS L.P.
    Inventors: Erik Smith, Joseph LaSalle White, David Black, Raja Subbiah
  • Patent number: 11157434
    Abstract: A method for deploying a service in a cluster of Input/Output devices comprising several I/O devices comprising a container engine. The method can be performed via a container client. A stack file is obtained that identifies at least one service and specifies at least one device constraint. Then, a command is sent based on the stack file, to deploy a service on a container stack of at least one first I/O device among the IO devices of the cluster if the at least one first I/O device matches the device constraint.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: October 26, 2021
    Assignee: Schneider Electric Industries SAS
    Inventors: Jean-Marie Stawikowski, Kévin Barbier, José Petit, Antonio Chauvet, Matthieu Colasante, Didier Ferry
  • Patent number: 11144488
    Abstract: A computer system includes a first baseboard management controller (BMC) and a first host of the first BMC. The first host operates a first storage service at the first host. The first host is a first storage device connected to one or more storage drives. The first storage service managing a first Remote Direct Memory Access (RDMA) controller for accessing user data stored on the one or more storage drives through a storage network. The first BMC receives state information of the one or more storage drives. The first BMC sends notifications to a client of the first BMC, in response to receiving the state information.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: October 12, 2021
    Assignee: AMERICAN MEGATRENDS INTERNATIONAL, LLC
    Inventors: Anurag Bhatia, Sanjoy Maity, Joseprabu Inbaraj, Jason Messer, Clark Kerr, Muthukkumaran Ramalingam, Gopinath Sekaran
  • Patent number: 11132268
    Abstract: A system, method and computer program product synchronize a plurality of processes of one or more applications executed by a plurality of processors. In addition to the processors, the system includes a plurality of memories with each memory associated with a respective process and configured to maintain a local count representative of a message of the respective process with which the memory is associated and at least one remote count representative of a message of a corresponding process executed by another processor. The system also includes a reflector configured to reflect the local count of the respective process to a remote count of the corresponding process. For synchronization, a first process of a first application executed by a first processor is configured to enter a delay period if the local count and at least one remote count maintained by the memory associated with the first process fail to match.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: September 28, 2021
    Assignee: THE BOEING COMPANY
    Inventors: Dick Wong, Ronald J. Koontz, Wing Chung Lee, Jason Ellis Sherrill