Abstract: A thermal package for electronic components, such as semiconducting chips, is disclosed. Each chip is connected to a printed circuit interconnect substrate by flexible Tape Automated Bonding leads, and a pliant foam pad is attached to the surface of each chip adjacent the printed circuit interconnect substrate. A heat spreader is attached to the major surface of each chip above the printed circuit interconnect substrate. The heat exchangers are mounted to a support plate that is disposed above the printed circuit interconnect substrate. An external heat exchanger is attached to the exposed major surface of the support plate. The heat spreaders are secured to the support plate so they are urged upwards against the external heat sink. Heat generated by the chips is conducted through the heat spreaders to the external heat sink. Conductors on the support plate and the heat sink are used to provide a voltage to the chips.

Abstract: In a semiconductor device which has an air tight metal package containing a high frequency wave range circuit element and which has a waveguide-coaxial line transformation structure, a metal terminal for the waveguide-coaxial line is air-tightly attached directly in a hole of a base of the metal package with a dielectric spacer, usually by glass fusion, whereby the thickness of the base may be reduced and attachment of the terminal to the base is simplified.

Abstract: A mounting pad means for use in combination with solid-state semiconductive translating devices and including a base pad with flange walls extending from said base pad, and with device mounting pad means being secured to the surface of the base pad and comprising a thin layer of silicone base rubber. The base pad an flange walls are formed of a generally rigid laminate with a core having outer metal foil layers disposed on opposite surfaces thereof, and wherein the core is composed of a thin layer of silicone base rubber.

Abstract: A semiconductor device obtained by using plastic molding to obtain an ultraviolet ray erasable type EPROM semiconductor chip in which an ultraviolet ray transparent resin film is inserted between the semiconductor chip and the molding material so as to cover a portion of the surface or the whole surface of the semiconductor chip except for the surfaces of the wire bonding electrodes.

Abstract: A flat thin package for semiconductor die has rigid leads extending perpendicularly from its length which can be plugged into a printed circuit board socket. The package has a low profile above the surface of the printed circuit board.

Abstract: Metal contacts and interconnections for integrated circuits utilize copper as the primary conductor, with the copper being totally encased in refractory metal layers on both top and bottom surfaces and also sidewalls. The contact hole in silicon oxide may be filled with a plug of refractory metal before the copper is deposited, or the first refractory metal layer may be conformally deposited to coat the sidewalls of the hole.

Abstract: A ceramic semiconductor package suitable for high frequency operation includes internal and external ground planes formed on opposite faces of a ceramic base member. The internal ground plane is connected to a ground ring formed on the packaged semiconductor device, and both ground planes are interconnected about the periphery of the package. In this way, a uniform and continuous ground is provided to minimize variations in signal transmission line impedance.

Abstract: A semiconductor integrated circuit of standard-cell type or gate-array type includes a plurality of first cells arranged in a plurality of parallel lines, the first cells having first wirings for supplying power, the first wirings being extended over a plurality of the first cells arranged in the same line in a direction of the same line of the first cells, a second cell disposed in the neighbourhood of some of the first cells and having a dimension larger than the first cells, said second cell having second wirings on a periphery thereof to surround circuit portion of the second cell and means for connecting the second wirings with the first wirings in the first cells in the neighbourhood of the second cell.

Abstract: In a semicondur device comprising a semiconductor element, a pair of electrodes provided on the opposite sides of the semiconductor element, and a cylindrical member provided to surround the semiconductor element and to be in engagement with the pair of electrodes, each of the electrodes has a thread portion on its outer perphery, and the cylindrical member has a thread portion on its inner periheral surface screwed onto each of the thread portions of the electrodes, thereby to provide a hermetic seal for the semiconductor element.

Abstract: In a semiconductor array having a plastic casing and a cooling portion which is at least partly not embedded in the plastic, an insulating portion is provided which is designed to slide onto the cooling portion and to provide at least partial electrical insulation of the cooling portion when slid on.

Abstract: A device for protecting semiconductor devices during excess energy events. The device uses p-MOS field effect transistors in a common n-well with a common gate configuration. An input is coupled to the source of a first p-type transistor and to the n-well. The first transistor is coupled through a series resistor to a second p-MOS transistor. The drains of each transistor are coupled to ground and gate aided breakdown reduces the voltage at which breakdown occurs.

Abstract: A hybrid thick film chip device comprising two or more electrical components mounted in parallel on a single substrate and having common terminals for electrical interconnection to other devices or to circuit boards or the like. In one embodiment, the components comprise a resistor and a capacitor disposed on one surface of the substrate. In another embodiment the resistor is on one surface of the substrate and the capacitor is on the opposite surface. The device is particularly advantageous in forming networks.

Abstract: The present invention provides a pluggable, high density, reliable integrated circuit package. The package has a plurality of integrated circuit chips mounted on a multilayer ceramic substrate. Input-output signals are provided to the module by means of mating male female input-output pins which are located on the bottom of the module. Power is provided to the module from a multilayer ceramic frame through an edge connector that is an integral part of the mulltilayer ceramic substrate. Matching circuit vias located on the edge of the multilayer ceramic substrate and on the edge of the multilayer ceramic frame are cut and tinned with tin-lead to provide power input connections. When the module is plugged into the circuit board the edge connectors on the module mate with the edge connectors in the ceramic frame. Since the frame is made of the same material as the module substrate, the power connectors have excellent thermal match and they are highly reliable.

Abstract: A semiconductor element mounted on a substrate is sealed with a silicone gel which has a complex modulus of elasticity such that breakage of solder bumps due to thermal fatique occurs preferentially by shear stress thereto due to a difference between thermal expansion coefficients of the semiconductor element and the substrate, not by tension thereto due to thermal expansion of the silicone gel between the semiconductor element and the substrate.

Abstract: An integrated circuit device comprising a wiring substrate on one surface of which integrated circuit chips are mounted, a power source substrate of a laminated structure provided in contact with the other surface of the wiring substrate and formed by alternately laminating a plurality of feeding conductor layers of a heat conductive metal and a plurality of electrically insulating layers of an electrically insulating material, and bonding together the laminated layers, a means for electrically connecting the wiring substrate and the power source substrate to each other, and a heat radiating means inserted in at least either the feeding conductor layers or the electrically insulating layers and adapted to radiate the heat, which occurs in the power source substrate, to the outside thereof.

Abstract: In a lateral transistor having a first semiconductor region of one conductivity type, and an emitter region and a collector region both having the opposite conductivity type and disposed in the first semiconductor region; a second semiconductor region having the opposite conductivity type is disposed opposite to the emitter region with respect to the collector region. The thus obtained lateral transistor has a characteristic that a current flowing to the substrate is prevented under a saturation operation state and is suitably used to form, e.g., a current-mirror type constant-current circuit constituting a switching device having improved threshold characteristics.

Abstract: A lead frame for mounting a semiconductor chip in an integrated circuit package incorporates a deformation absorbing member as an integral part of the paddle support arm so that the initial, desired physical and electrical characteristics are unaltered after a forming operation such as paddle downsetting.

Abstract: A semiconductor device includes a metal film, not in ohmic contact with a guard ring region (a second region). The metal film is formed on that surface portion of an insulating film under which the guard ring region is formed to surround a base region (a first region) of a planar transistor. In this arrangement, a planar semiconductor device with a high withstand voltage, which is free of short-circuiting between electrodes upon the measurement of the withstand voltage and involves no degeneration of the withstand voltage resulting from an atmospheric humidity, can be obtained. The metal film, which is not in contact with the guard ring region, is "electrically floated", i.e., is not in contact with any area inclusive of the guard ring region.

Abstract: A composite support assembly for an integrated circuit chip includes a rigid lead frame that is attached to a relatively thin flexible tape-like structure. The tape-like structure is etched with inner lead fingers and outer lead fingers to allow a short pitch, high density arrangement of the lead fingers, thereby enabling bond wires that connect an IC chip to the support assembly to be shortened. As a result, a significant increase in the number of leads is realized, using a standard size IC package.

Abstract: The invention is a semiconductor device assembly and method of making the same. A mounting plate has positioning means for positioning the plate relative to a header, a first mounting surface of the plate is attached to the header and a semiconductor device is attached to a second mounting surface of the mounting plate. The assembly is made by forming the mounting plate, positioning the mounting plate relative to the header by the positioning means, attaching the first mounting surface to the header and the semiconductor device to the second mounting surface. Another method of making the assembly is by defining and etching a mounting plate and attaching the first mounting surface to the header and the semiconductor device to the second mounting surface. This assembly and process provides an efficient means for mounting semiconductor devices and in particular electro-optic devices such as lasers.