Patents Examined by Gustavo A Rosario-Benitez
  • Patent number: 11811332
    Abstract: A direct-current power supply apparatus includes: a reactor having one end connected to an alternating-current power supply; a bridge circuit, connected to an opposite end of the reactor, converting an alternating-current first voltage output from the alternating-current power supply into a direct-current voltage; and a current detector detecting an alternating current flowing between the alternating-current power supply and the bridge circuit. The reactor reduces an inductance in accordance with an increase of the alternating current and, when the alternating current exceeds a first current, has an inductance lower than one third of an inductance at which a current does not flow in the reactor. The bridge circuit performs an active operation when the detection value of the alternating current is larger than or equal to the first current and performs a passive operation when the detection value of the alternating current is lower than the first current.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: November 7, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Satoru Ichiki, Takuya Shimomugi, Koichi Arisawa, Keisuke Uemura, Kenji Iwazaki
  • Patent number: 11811299
    Abstract: A DC voltage conversion circuit includes: a switching circuit having a plurality of switching elements; and a controller that controls operations of the plurality of switching elements. The DC voltage conversion circuit can suppress variations in an output voltage even when an input voltage fluctuates. The controller can execute asymmetric PWM control and phase shift control, performs the phase shift control when a duty ratio is lower than a predetermined ratio, and performs the asymmetric PWM control when the duty ratio is higher than or equal to the predetermined ratio. When switching between the phase shift control and the asymmetric PWM control is performed with the step-down ratios being made to match each other, a control range of the duty ratio can be increased.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: November 7, 2023
    Assignee: ALPS ALPINE CO., LTD.
    Inventor: Mitsunao Fujimoto
  • Patent number: 11799376
    Abstract: A buck-boost circuit is provided. A first terminal of a first switch is connected to an anode of an input power supply, a first terminal of a second switch is connected to an anode of an output power supply, a first terminal of a third switch and a first terminal of a first inductor are connected to a second terminal of the first switch, a first terminal of a fourth switch is connected to a second terminal of the first inductor and a second terminal of the second switch, a fifth switch is connected between the input power supply and the output power supply, and a first terminal of a first capacitor is connected to the anode of the output power supply, and a second terminal of the first capacitor is connected to the anode and a cathode of the input power supply through switches, respectively.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: October 24, 2023
    Assignee: SPREADTRUM COMMUNICATIONS (SHANGHAI) CO., LTD.
    Inventors: Mengzhang Li, Yongjin Wang
  • Patent number: 11791743
    Abstract: An alternator and a rectifier thereof are provided. The rectifier includes a transistor and a gate voltage control circuit. The transistor is controlled by a gate voltage. The gate voltage control circuit generates the gate voltage according to a voltage difference between an input voltage and a rectified voltage. During a first time interval after the voltage difference drops to a first preset threshold voltage, the gate voltage control circuit determines whether the voltage difference is less than a second preset threshold voltage, and decides whether to provide the gate voltage to turn on the transistor. When the transistor is turned on, the voltage difference substantially equals to a first reference voltage. And during a second time interval, the gate voltage control circuit regulates the gate voltage to set the voltage difference substantially to a second reference voltage.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: October 17, 2023
    Assignee: ACTRON TECHNOLOGY CORPORATION
    Inventors: Wei-Jing Chen, Shang-Shu Chung, Yen-Yi Chen, Huei-Chi Wang
  • Patent number: 11770076
    Abstract: Disclosed are a system and method for controlling an active clamp flyback (ACF) converter. The system includes: a drive module configured to control turning-on or turning-off of a main switching transistor SL and a clamp switching transistor SH; a main switching transistor voltage sampling circuit configured to sample a voltage drop between an input terminal and an output terminal of the main switching transistor SL; a first comparator connected to the main switching transistor voltage sampling circuit and configured to determine whether a sampled first sampling voltage is a positive voltage or a negative voltage; and a dead time calculation module configured to adjust, according to an output of the first comparator and a main switching transistor control signal DUTYL of a current cycle, a clamp switching transistor control signal DUTYH of next cycle outputted by the drive module.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: September 26, 2023
    Assignees: SOUTHEAST UNIVERSITY, CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Shen Xu, Minggang Chen, Wanqing Yang, Dejin Wang, Rui Jiang, Weifeng Sun, Longxing Shi
  • Patent number: 11770072
    Abstract: A method for controlling a buck-boost converter includes generating a first threshold voltage with a decreasing voltage level, generating a second threshold voltage with an increasing voltage level, and sensing an inductor current. A signal indicative of the sensed inductor current is compared to the first threshold voltage to control an on time of the high side buck switch and is compared to the second threshold voltage to control an off time of the high side boost switch. Also described is a controller including a compensator responsive to an output voltage feedback signal to generate a compensation voltage and a modulator having a buck signal path coupled to receive the compensation voltage and configured to control an on time of the high side buck switch and a boost signal path coupled to receive the compensation voltage and configured to control an off time of the high side boost switch.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: September 26, 2023
    Assignee: Allegro MicroSystems, LLC
    Inventors: Michele Suraci, Giorgio Oddone
  • Patent number: 11762441
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed including a capacitor, located in a universal serial bus schematic. The methods, apparatus, systems and articles of manufacture include a controller, include a controller including a state machine and a control signal generator, wherein the controller is configured to be coupled to a connector and to a power supply, the state machine is configured to determine a state of the connector, and the control signal generator is configured to, in response to an indication of a device not connected to the connector, generate a signal to indicate to the power supply to charge a capacitor to a threshold voltage, and wherein the control signal generator is further configured to generate the signal until a second state.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: September 19, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael J. Mills, Gregory A. Watkins
  • Patent number: 11742765
    Abstract: A method for determining a scheme for converting power in every power conversion control period and converting power according to the determined scheme may comprise the steps of: calculating average power in a transformer inductor at the time of power conversion according to an SPWM scheme in a control period; calculating average power in the transformer inductor at the time of power conversion according to a DPWM scheme in a control period; and converting power according to a scheme by means of which the calculated average power of the transformer inductor is greater. Here, in the step of calculating the average power in the transformer inductor at the time of power conversion according to the DPWM scheme, it is possible to select a DPWM scheme with the maximum duty in a step-up or step-down condition given in the control period.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: August 29, 2023
    Assignee: HYOSUNG HEAVY INDUSTRIES CORPORATION
    Inventors: Byung Hwan Jeong, Hae Won Seo, Byeng Joo Byen, Hyun Jun Kim
  • Patent number: 11736023
    Abstract: Communicating fault conditions between primary-side and secondary-side controllers of a Universal Serial Bus Power Delivery (USB-PD) device is described. The primary-side controller receives a control signal from the secondary-side controller across a galvanic isolation barrier. The primary-side controller converts the control signal into a first pulse signal and applies the first pulse signal to control a primary-side switch. When the primary-side controller detects that a first fault condition has occurred, the primary-side controller communicates a first information signal about the first fault condition to the secondary-side controller across the galvanic isolation barrier. The first information signal is generated by converting the control signal into a second pulse signal having a different pulse width than the first pulse signal. The primary-side controller applies the second pulse signal to control the primary-side power switch.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: August 22, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Arun Khamesra, Hariom Rai, Pulkit Shah
  • Patent number: 11728720
    Abstract: The present invention concerns a power converter including: a capacitor (CBUS) having first and second electrodes respectively coupled to first (E1) and second (E2) input terminals via a current-limiting element (R1, L1); at least one normally-on transistor (K1, K2, K3, K4, K5, K6); a circuit (170) for powering a circuit (CMD_K1, CMD_K2) for controlling the normally-on transistor; and a switch configurable to, in a first configuration, couple first (g) and second (h) input terminals of the power supply circuit (170) respectively to the first (E1) and second (E2) input terminals of the converter, upstream of the current-limiting element (R1, l1) and, in a second configuration, connect the first (g) and second (h) input terminals of the power supply circuit (170) respectively to the first and second electrodes of the capacitor, downstream of the current-limiting element (R1, L1).
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: August 15, 2023
    Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
    Inventors: Romain Montheard, Sébastien Carcouet, Pierre Perichon
  • Patent number: 11716022
    Abstract: A power converter is disclosed. The power converter includes a switching circuit coupled to a capacitor and further coupled to a regulated power supply node via an inductor. The switching circuit is configured to magnetize the inductor, using the capacitor, in response to activation of a first control signal, and further configured to charge the capacitor, using an input power supply, in response to activation of a second control signal. A control circuit is configured to activate the first control signal based on a comparison of a first threshold value and a current flowing in the inductor. The control circuit is further configured to activate the second control signal based on a comparison of a second threshold value and the current flowing in the inductor.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: August 1, 2023
    Assignee: Apple Inc.
    Inventors: Giovanni Tarroboiro, Pietro Gabriele Gambetta
  • Patent number: 11705811
    Abstract: An apparatus includes a buck converter portion of a buck-boost converter configured to operate under a constant on-time control scheme, wherein an on-time of a high-side switch of the buck converter portion is determined by a buck on-time timer, and a boost converter portion of the buck-boost converter configured to operate under a constant off-time control scheme, wherein an off-time of a low-side switch of the boost converter portion is determined by a boost off-time timer.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: July 18, 2023
    Assignee: M3 Technology Inc.
    Inventors: Bo Yang, Xiaoyu Xi, David Meng
  • Patent number: 11695317
    Abstract: Embodiments of this application provide a converter control method, a converter control apparatus, and a readable storage medium. The control method includes: obtaining a real-time input voltage and a real-time output voltage of a converter; determining a corresponding real-time closed-loop control output value of the converter based on the real-time input voltage and the real-time output voltage by using a closed-loop control algorithm; determining a real-time control strategy of a switch tube of the converter from at least three control strategies based on the real-time closed-loop control output value; and controlling the switch tube based on the determined real-time control strategy. The control method is used to implement efficient and high-precision voltage stabilization control.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: July 4, 2023
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED
    Inventors: Jinfeng Gao, Guiying Lin, Weichen He, Zhimin Dan, Lijun Hang, Yuanbin He, Ke Chen, Jiarui Liao
  • Patent number: 11682968
    Abstract: Various examples of power converters including Integrated Capacitor Blocked Transistor (ICBT) cells and methods of control of power converters having ICBT cells are described. In one example, a power converter includes an upper arm including a plurality of upper ICBT cells connected in series to form a series connection path and a lower arm including a plurality of lower ICBT cells connected in series in the series connection path. A controller can be configured to provide a control signal pair to each of the upper ICBT cells and a complementary control signal pair to each of the lower ICBT cells to control the converter output. A capacitor voltage controller can be configured to balance a voltage potential among ICBT capacitors in at least one of the upper arm and the lower arm.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: June 20, 2023
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Jianghui Yu, Rolando Burgos
  • Patent number: 11677328
    Abstract: A converter and a power supply system are disclosed, and relate to the power electronics field, to resolve a problem that a sampling circuit in an OBC circuit is relatively complex. The converter includes an alternating current unit, a switching unit, a conversion unit, a direct current unit, and a controller. The alternating current unit includes a U line, a V line, a W line, and an N line. The N line is connected to a ground of the controller, so that the controller can be directly connected to the U line, the V line, and the W line, to collect a voltage of the U line, a voltage of the V line, and a voltage of the W line. This simplifies the sampling circuit.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: June 13, 2023
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Weiping Liu, Yongtao Liang, Chen Chen
  • Patent number: 11671005
    Abstract: A method of controlling first and second switches of a switching cell, including measuring a current flowing through the first switch when the first switch is controlled to the off state, and setting a switching dead time according to the measurement.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: June 6, 2023
    Assignee: Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Guillaume Lefevre, Guillaume Piquet-Boisson
  • Patent number: 11671002
    Abstract: A resonant switching power converter includes: plural capacitors; plural switches; at least one charging inductor; at least one discharging inductor; a controller which generates a charging operation signal and at least one discharging operation signal; and at least one zero current detection circuit which detects a charging resonant current flowing through the charging inductor in a charging process and/or detect a discharging resonant current flowing through the discharging inductor in a discharging process. When detecting that a level of the charging resonant current or a level of the discharging resonant current is zero, the zero current detection circuit generates at least one zero current detection signal which is sent to the controller. The controller determines start time points and end time points of the charging process and the discharging process according to the zero current detection signal. There can be plural discharging processes.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: June 6, 2023
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Kuo-Chi Liu, Chung-Lung Pai, Ta-Yung Yang
  • Patent number: 11671029
    Abstract: A converter circuit includes first and second input terminals, control circuitry, and a storage capacitor. The first and second input terminals are configured for connection to an AC power supply to receive an AC signal. The control circuitry is coupled to the first and second input terminals. A terminal of the storage capacitor is coupled to an output node of the control circuitry. The storage capacitor is charged by the control circuitry and configured for use as a DC power source. The control circuitry is configured to couple the first input terminal to the storage capacitor during a portion of a positive half-cycle of the input AC signal to charge the storage capacitor and to decouple the first input terminal from the storage capacitor during an entirety of each negative half-cycle of the input AC signal, to thereby prevent discharging of the storage capacitor by the input AC signal.
    Type: Grant
    Filed: July 5, 2021
    Date of Patent: June 6, 2023
    Assignee: Intelesol, LLC
    Inventor: Mark Telefus
  • Patent number: 11658574
    Abstract: An IC controller for a USB Type-C device includes a register that is programmable to store a pulse width and a frequency. A buck-boost converter of the controller includes a first high-side switch and a second high-side switch. Control logic is coupled to the register and gates of the first/second high-side switches. To perform a soft start in one of buck mode or boost mode, the control logic: causes the second high-side switch to operate in diode mode; retrieves values of the pulse width and the frequency from the register; causes the first high-side switch to turn on using pulses having the pulse width and at the frequency; detects an output voltage at the output terminal of the buck-boost converter that exceeds a threshold value; and in response to the detection, transfers control of the buck-boost converter to an error amplifier loop coupled to the control logic.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: May 23, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hariom Rai, Pulkit Shah, Arun Khamesra, Rajesh Karri, Praveen Suresh
  • Patent number: 11646663
    Abstract: A start-up routine for a Switched-Mode Power Supply (SMPS) gradually increases the duty cycle while reducing an initial dead time to a final optimal dead time for normal operation. Reliability is improved by the larger initial dead time that reduces ringing in switching transistors during low-voltage conditions early in the start-up sequence. Efficiency is improved by reducing the optimal dead time as voltages approach operating levels. The initial dead time is pre-calculated as a function of the input voltage and initial duty cycle. Optimal dead times are pre-calculated as a function of output voltage and output current. The optimal dead time is adjusted for each iteration of a second loop that also increases duty cycle until the target operating output voltage is reached. Pre-calculated dead times are based on the time required to fully charge and discharge parasitic drain-to-source capacitances in the switching transistors in the SMPS circuit.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: May 9, 2023
    Assignee: Hong Kong Applied Science and Technology Research Institute Company Limited
    Inventors: Tak Lok Shum, Xiaoyong Hu, Yuxie Cheng