Patents Examined by Hafizur Rahman
  • Patent number: 12237822
    Abstract: Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: February 25, 2025
    Assignee: PSEMI CORPORATION
    Inventors: Mark L. Burgener, James S. Cable
  • Patent number: 12237827
    Abstract: Filters and methods of making filters are disclosed. A filter device includes a substrate, a piezoelectric plate, and an acoustic Bragg reflector between a surface of the substrate and a back surface of the piezoelectric plate. A first portion of the piezoelectric plate has a first thickness, and a second portion of the piezoelectric plate has a second thickness less than the first thickness. A conductor pattern on front surfaces of the first and second portions of the piezoelectric plate includes a first interdigital transducer (IDT) with interleaved fingers on the first portion, and a second IDT with interleaved fingers on the second portion.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: February 25, 2025
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Ventsislav Yantchev, Patrick Turner, Robert B. Hammond
  • Patent number: 12237826
    Abstract: Acoustic resonator devices and acoustic filter devices. An acoustic resonator includes a piezoelectric plate having front and back surfaces, a portion of the piezoelectric plate forming a diaphragm, and a conductor pattern on the front surface, the conductor pattern comprising an interdigital transducer (IDT), interleaved fingers of the IDT on the diaphragm. A ratio of a mark of the interleaved fingers to a pitch of the interleaved fingers is greater than or equal to 0.12 and less than or equal to 0.3. A thickness of the interleaved fingers is greater than or equal to 0.85 times a thickness of the piezoelectric plate and less than or equal to 2.5 times the thickness of the piezoelectric plate.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: February 25, 2025
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Bryant Garcia, Ventsislav Yantchev, Patrick Turner, Viktor Plesski, Julius Koskela, Soumya Yandrapalli, Neal Fenzi, Robert B. Hammond
  • Patent number: 12231113
    Abstract: Acoustic resonator devices, filter devices, and methods of fabrication are disclosed. An acoustic resonator includes a substrate having a surface and a single-crystal piezoelectric plate having front and back surfaces. The back surface is attached to the surface of the substrate except for a portion of the piezoelectric plate forming a diaphragm that spans a cavity in the substrate. An interdigital transducer (IDT) is formed on the front surface of the single-crystal piezoelectric plate such that interleaved fingers of the IDT are disposed on the diaphragm. The IDT is configured to excite a primary acoustic mode in the diaphragm in response to a radio frequency signal applied to the IDT. The interleaved fingers extend at an oblique angle to an Z crystalline axis of the piezoelectric plate.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: February 18, 2025
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Bryant Garcia
  • Patent number: 12231108
    Abstract: An RF filter system includes a plurality of bulk acoustic wave resonators arranged in a circuit having serial and parallel shunt configurations of resonators. Each resonator having a reflector, a support member including a surface, a first electrode including tungsten, overlying the reflector, a piezoelectric film including crystalline aluminum scandium nitride overlapping the first electrode, a second electrode including tungsten overlapping the piezoelectric film and the first electrode, and a passivation layer including silicon nitride overlying the second electrode. Portions of the support member surface of at least one resonator define a cavity region having a portion of the first electrode of the at least one resonator is located within the cavity region. The pass band circuit response has a bandwidth corresponding to a thickness of at least one of the first electrode, piezoelectric film, second electrode, and passivation layer. The system can include single crystal or polycrystalline BAW resonators.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: February 18, 2025
    Assignee: Akoustis, Inc.
    Inventors: Dae Ho Kim, Mary Winters, Ramakrishna Vetury, Jeffrey B. Shealy
  • Patent number: 12224732
    Abstract: Resonator devices and filter devices are disclosed. An acoustic resonator includes a substrate and a piezoelectric plate having front and back surfaces separated by a piezoelectric plate thickness greater than or equal to 50 nm and less than or equal to 200 nm. An acoustic Bragg reflector is between the substrate and the back surface of the piezoelectric plate. A conductor pattern including an interdigital transducer (IDT) is on the front surface of the piezoelectric plate.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: February 11, 2025
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Gregory L. Hey-Shipton, Neal Fenzi, Mike Eddy, Ventsislav Yantchev
  • Patent number: 12212306
    Abstract: Methods of fabricating filter devices are disclosed. A back surface of a piezoelectric plate having a first thickness is attached to a substrate. The front surface of the piezoelectric plate is selectively etched to thin a portion of the piezoelectric plate from the first thickness to a second thickness less than the first thickness. Cavities are formed in the substrate such that portions of the piezoelectric plate form a plurality of diaphragms spanning respective cavities. A conductor pattern is formed on the front surface. The conductor pattern includes a first interdigital transducer (IDT) with interleaved fingers on a first diaphragm having the first thickness and a second IDT with interleaved fingers on a second diaphragm having the second thickness.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: January 28, 2025
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Chris O'Brien, Andrew Kay, Albert Cardona, Ventsislav Yantchev, Patrick Turner, Robert B. Hammond, Dylan Kelly
  • Patent number: 12199571
    Abstract: Example embodiments relate to hybrid Doherty power amplifier modules. One embodiment includes a printed circuit board having an input RF terminal and an output RF terminal, and on which printed circuit board a primary Doherty amplifier is integrated. The primary Doherty amplifier includes a primary Doherty splitter arranged on the printed circuit board and configured for splitting an input RF signal received at the input RF terminal into a plurality of RF signal components. The primary Doherty amplifier also includes a plurality of amplifying paths, each amplifying path being partially integrated on a semiconductor die of a first kind mounted on the printed circuit board and partially integrated on a semiconductor die of a second kind mounted on the printed circuit board. Further, the primary Doherty amplifier includes a primary Doherty combiner arranged on the printed circuit board.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: January 14, 2025
    Assignee: Ampleon Netherlands B.V.
    Inventors: Zhi Geng, Yi Zhu
  • Patent number: 12199572
    Abstract: A high-frequency amplifier includes a driver amplifier, a Doherty amplifier including carrier and peak which amplify the driver amplifier output, a second substrate laminated on a first substrate, and a base member mounted with the first and second substrates. The driver amplifier is mounted on the second substrate, and the carrier and peak amplifiers are mounted on the first substrate. A front surface of the driver amplifier opposes the first substrate, and a back surface of the driver amplifier is separated from the first substrate. Back surfaces of the carrier and peak amplifiers contact the base member, and the back surface of the driver amplifier connects to an interconnect layer disposed on the second substrate and connected to one end of a via penetrating the second and first substrates, and the other end of the via connects to the base member.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: January 14, 2025
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tatsuya Hashinaga, Yutaka Moriyama
  • Patent number: 12199599
    Abstract: A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an RF+ terminal and the second terminal comprises an RF? terminal. In accordance with some embodiments, the DTCs comprise a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second RF terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: January 14, 2025
    Assignee: PSEMI CORPORATION
    Inventor: Tero Tapio Ranta
  • Patent number: 12191821
    Abstract: Semiconductor devices are provided that include a Group III nitride-based semiconductor layer structure. A first metal layer is formed on an upper surface of the semiconductor layer structure, a first dielectric layer is formed on an upper surface of the first metal layer, and a second metal layer is formed on an upper surface of the first dielectric layer. The first metal layer, the first dielectric layer and the second metal layer form a first capacitor. A second dielectric layer is formed on an upper surface of the second metal layer, a third dielectric layer is formed on an upper surface of the second dielectric layer, and a third metal layer is formed on upper surfaces of the second and third dielectric layers. The second metal layer, the second dielectric layer and the third metal layer form a second capacitor that is stacked on the first capacitor.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: January 7, 2025
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Jeremy Fisher, Dan Namishia, Scott Sheppard
  • Patent number: 12191832
    Abstract: A load-modulated balanced amplifier (LMBA) based on a variable cross-coupled pair (XCP) is provided. The LMBA includes an adaptive bias (ADB) circuit, a first balance terminal amplifier module, a second balance terminal amplifier module, a control terminal amplifier module, a first driver amplifier module, a second driver amplifier module, a third driver amplifier module, a variable XCP, a resistor R5, a resistor R6, a 90-degree differential coupler Q1, a 90-degree differential coupler Q2, and a 90-degree differential coupler Q3.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: January 7, 2025
    Assignee: CHENGDU FLUXWORKS TECHNOLOGY CO., LTD
    Inventors: Kai Yi, Kai Kang, Chenxi Zhao, Huihua Liu
  • Patent number: 12191812
    Abstract: Low-leakage switch circuit techniques to reduce leakage current of an off-state switch, while maintaining a low on-resistance. The low-leakage switch circuit may allow measurement of low current signals in a transimpedance amplifier with improved accuracy without, the need for calibration. The low-leakage switch circuit may include a bootstrapping path connecting two or more terminals or voltage nodes of an off-state switch in the switch circuit. The bootstrapping path is configured to bootstrap major leakage current contributors in the switch circuit, such as the substrate diode leakage, the subthreshold leakage, or combinations thereof.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: January 7, 2025
    Assignee: Analog Devices, Inc.
    Inventors: Yukihisa Handa, Kerry Brent Phillips, Matthew Thomas Juszkiewicz
  • Patent number: 12184261
    Abstract: Acoustic filters, resonators and methods are disclosed. An acoustic filter device includes a substrate having a surface and a single-crystal piezoelectric plate having front and back surfaces, the back surface attached to the surface of the substrate except for a portion of the piezoelectric plate forming a diaphragm that spans a cavity in the substrate. An interdigital transducer is formed on the front surface of the piezoelectric plate with interleaved fingers of the IDT disposed on the diaphragm. At least a portion of a perimeter of the cavity is curved and at least one end zone of the perimeter of the cavity is round.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: December 31, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kuan Zhang, James R. Costa, Andrew Kay, Greg Dyer, Viktor Plesski, Soumya Yandrapalli, Robert B. Hammond, Bryant Garcia, Patrick Turner, Jesson John, Ventsislav Yantchev
  • Patent number: 12184260
    Abstract: Embodiments of this disclosure relate to bulk acoustic wave resonators on a substrate. The bulk acoustic wave resonators include a first bulk acoustic wave resonator, a second bulk acoustic wave resonator, a conductor electrically connecting the first bulk acoustic wave resonator to the second bulk acoustic wave resonator, and an air gap positioned between the conductor and a surface of the substrate.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: December 31, 2024
    Assignee: Skyworks Global Pte. Ltd.
    Inventors: Kwang Jae Shin, Renfeng Jin, Li Chen
  • Patent number: 12184238
    Abstract: An amplifier circuit includes a main amplifier and an auxiliary circuit that improves a slew rate of the main amplifier. The main amplifier is composed of a one-stage CMOS amplifier, amplifies a voltage difference between two input signals, and outputs, from output terminals, an output signal corresponding to the voltage difference of the input signals. The auxiliary circuit controls an auxiliary bias current flowing through the output terminals according to the voltage difference of the input signals, and interrupts the auxiliary bias current at a predetermined timing before completion of settling. Such a scheme enables improvement of a slew rate by the auxiliary circuit and high-speed operation as well as reduction of error due to mismatch between the main amplifier and the auxiliary circuit, thereby yielding high-accuracy output signal output therefrom.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: December 31, 2024
    Assignee: DENSO CORPORATION
    Inventors: Shogo Kawahara, Tetsuya Makihara, Takeshi Morinaga
  • Patent number: 12176878
    Abstract: An acoustic resonator is provided that includes a substrate; an acoustic Bragg reflector supported by the substrate; a piezoelectric plate above the acoustic Bragg reflector and opposite the substrate, the piezoelectric plate having at least one groove extending into a surface thereof; and an interdigital transducer (IDT) having a plurality of interleaved fingers with at least one finger is disposed in the at least one groove of the piezoelectric plate, respectively.
    Type: Grant
    Filed: April 26, 2023
    Date of Patent: December 24, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Viktor Plesski
  • Patent number: 12176886
    Abstract: A high-frequency apparatus includes a resin substrate, a first device including a substrate and provided on the resin substrate, and a second device provided adjacent to the first device on the resin substrate. Each of the first device and the second device includes an acoustic wave device. The second device includes a piezoelectric substrate and a functional element provided on the piezoelectric substrate. The substrate of the first device includes Si or a laminated material including Si. The piezoelectric substrate of the second device includes LiTaO3, LiNbO3, or a laminated material including LiTaO3 or LiNbO3. The resin substrate includes glass.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: December 24, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Koichiro Kawasaki
  • Patent number: 12176866
    Abstract: Described are circuits and techniques to increase the efficiency of radio-frequency (rf) amplifiers including rf power amplifiers (PAs) through “supply modulation” (also referred to as “drain modulation” or “collector modulation”), in which supply voltages provided to rf amplifiers is adjusted dynamically (“modulated”) over time depending upon the rf signal being synthesized. For the largest efficiency improvements, a supply voltage can be adjusted among discrete voltage levels or continuously on a short time scale. The supply voltages (or voltage levels) provided to an rf amplifier may also be adapted to accommodate longer-term changes in desired rf envelope such as associated with adapting transmitter output strength to minimize errors in data transfer, for rf “traffic” variations.
    Type: Grant
    Filed: July 17, 2023
    Date of Patent: December 24, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: James Garrett, Sri Harsh Pakala, Brendan Metzner, Ivan Duzevik, David J. Perreault, John R. Hoversten, Yevgeniy A. Tkachenko
  • Patent number: 12176863
    Abstract: There is disclosed an amplifier circuit comprising: an amplifier having input and output terminals; a temperature dependent variable impedance unit comprising: a first terminal, a second terminal and a variable impedance unit control terminal; a transistor comprising a transistor control terminal coupled to the variable impedance unit control terminal; a first resistor coupled in parallel with the conduction channel; a capacitor coupled in series with the conduction channel between the conduction channel and one of: the first terminal; and the second terminal; and wherein: the first terminal is coupled to one of: the input terminal and the output terminal; the second terminal is for coupling to a reference node; and the variable impedance unit control terminal is configured to receive a control signal that is based on a measured temperature indicative of a temperature of the amplifier circuit and thereby provide a temperature dependent variable impedance for the amplifier circuit.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: December 24, 2024
    Assignee: NXP USA, Inc.
    Inventors: Pierre Pascal Savary, Stephane Damien Thuriés