Abstract: An authentication system or a relay device includes: at least one service application configured to utilize vehicle information; a service manager configured to acquire the vehicle information stored in an electronic control unit; at least one service bus configured to manage transmission and reception of data between the at least one service application and the service manager; and an authorization confirmation unit configured to confirm whether to authorize a vehicle information acquisition request of the confidential information. The authorization confirmation unit is installed in the at least one service bus or in the service manager.

Abstract: An apparatus can comprise a memory array comprising multiple erase blocks coupled to a same plurality of strings of memory cells. Control circuitry can be configured to: receive a command corresponding to a sensing operation to be performed on a selected access line of a first group of access lines corresponding to a first erase block; and determine an adjusted sense voltage to be applied to the selected access line in association with performing the sensing operation. The adjusted sense voltage is based on: a quantity of the first group of access lines that are programmed; or a quantity of the second group of access lines that are programmed; or both.

Abstract: Disclosed herein is an apparatus and method for generating a quantum circuit for an ARIA substitution layer. The apparatus may configure a multiplicative inverse operation quantum circuit by arranging a preconfigured multiplicative inverse operation quantum circuit, configure four types of S-box operation quantum circuits including S1 and S2 operation quantum circuits, which perform two substitution operations used in ARIA by arranging a quantum circuit for performing affine transform and a quantum circuit for addition of a constant value in the multiplicative inverse operation quantum circuit, and S1?1 and S2?1 operation quantum circuits, which perform inverse substitution operations, and construct the ARIA algorithm as a quantum circuit by rearranging the four types of S-box operation quantum circuits for two substitution layers.

Abstract: A secure, field-based data sharing protocol leveraging the DNS infrastructure with DNSSEC, post-quantum cryptography, and real-time usability flows. The protocol enables domain owners to selectively expose structured confidential data (e.g., IBANs, credit cards, wallets, phone numbers) to authorized entities like banks, PSPs, or telcos using a set of predictable, encrypted DNS TXT records. It introduces a format for revocable, auditable, and verifiable publishing of confidential information, distributed without centralized APIs.

Abstract: Methods, systems, and apparatuses include retrieving a defectivity footprint of a portion of memory, the portion of memory composed of multiple blocks. A deck programming order is determined, based on the defectivity footprint, for a current block of the multiple blocks. The current block is composed of multiple decks. The deck programming order is an order in which the multiple decks are programmed. The multiple decks programmed according to the determined deck programming order.

Abstract: A memory is provided in this application, including multiple group regions, a command decoding circuit, and a control circuit. Each group region includes multiple bank groups, and each bank group corresponds to one bank group address. An active instruction is received by the command decoding circuit, and the active instruction is decoded to obtain an active command signal. The bank group address, a row address, and the active command signal are received by the control circuit, and the row address is sent to one of the group regions based on the active command signal and the bank group address.

Abstract: The present application discloses an operation method of a memory, and a memory, a memory system, and an electronic system. The method includes: acquiring a data output command; in response to the data output command, utilizing charge pump cells to boost voltages on all word lines corresponding to each of memory planes to pass voltages, wherein the number of the charge pump cells corresponding to the memory plane of which the data output sequence is the first is greater than or equal to the average number, and the total number of the charge pump cells is less than the total number of charge pump cells that have been configured in the memory; and one of the memory planes that has been pre-charged, reading data of the one of the memory planes, and outputting the data of the one of the memory planes according to the data output sequence.

Abstract: A blockchain-based data processing method including: acquiring a resource consumption task including an initiating object address and a target resource identifier; calling, according to the resource consumption task, a resource consumption function, and determining, based on the resource consumption function, a holding object address holding a target virtual resource in the blockchain, the target virtual resource referring to a virtual resource represented by the target resource identifier; consuming, according to the initiating object address and the holding object address, the target virtual resource to obtain a transaction execution result of the resource consumption task; and broadcasting a resource consumption event corresponding to the transaction execution result to a service device corresponding to the initiating object address, so as to make the service device perform, on a target item, service processing associated with the resource consumption event, the target virtual resource being configured for

Abstract: A variety of applications can include apparatus having a memory device comprising plate select lines coupled to capacitors of memory cells of the memory device, plate line drivers coupled to the plate select lines, and a bias device coupled to each plate line driver. Use of a single bias device can allow for generation of robust current across multiple plate line drivers. The plate line drivers can be arranged with different formats that can operate with a single bias device. Plate select lines and the plate line driver can be structured in a scheme to balance the number of plate select lines and device counts for the plate line drivers.

Abstract: This disclosure describes techniques and mechanisms for providing an automatic and lightweight solution to detect and resolve session stuck failure(s) due to erroneous anti-replay packet drops in SDWAN networks. The techniques may operate in a data plane of the network devices, such as part of an anti-replay feature. The techniques may enable a sending and receiving edge device to communicate via secure tunnels. The receiving edge device may detect an out-of-window error and may generate and send, within the data plane, a message that includes a set control bit to trigger the sending edge device to perform a synchronization and recovery process.

Abstract: The present disclosure provides a three-dimensional memory array and a preparation method thereof, wherein the three-dimensional memory array includes memory cells arranged in an array; wherein in each memory cell: one end of the memory cell is connected to a word line WL, and the other end thereof is connected to a bit line BL; a corresponding gating transistor is arranged at the bottom of each word line WL, and the bottom of the word line WL is connected to the drain of the gating transistor; the gate of the gating transistor is connected to a gate line GL, and the source of the gating transistor is connected to a source line SL; the bit line BL, the word line WL, the source line SL and the gate line GL control the state of the memory cell.

Abstract: A controller iteratively activates a control signal for one-half a clock cycle while sweeping its phase relationship to the rising edge of the clock. Phase relationships that result in the rising edge of the clock occurring while the control signal is active result in the memory device outputting command/address data on the data bus. Phase relationships that do not result in the rising edge of the clock occurring while the control signal is active do not result in the memory device outputting the command/address data on the data bus. By changing the data on the CA bus between activations of the control signal, the controller can ascertain what phase relationships result in the control signal being successfully sampled. From this information, the controller can select a reliable setting for the phase relationship between the control signal and the clock signal.

Abstract: Systems and methods for secure digital communication with reduced resource utilization are provided. Systems and methods may include utilizing an intermediate node. Systems and methods may include establishing secure communication links between one or more client nodes and the intermediate node and between the intermediate node and one or more server nodes.

Abstract: A method for operating a memory device includes following steps. A memory device including a plurality of first electrodes, a plurality of second electrodes and a plurality of memory layers is provided, and a plurality of memory cells are formed at intersections between the first electrodes, the second electrodes and the memory layers. A selected memory cell is selected in the memory cells. ?? V is applied to a selected second electrode in the second electrodes, and the selected second electrode is in electrical contact with the selected memory cell. ? V is applied to a selected first electrode in the first electrodes, and the selected first electrode is in electrical contact with the selected memory cell. 0 V is applied to unselected second electrodes in the second electrodes. 0 V is applied to unselected first electrodes in the first electrodes.

Abstract: The present disclosure related to a client device including a communication interface configured to communicate with an agency server and a counterpart device, a memory, and a processor. The processor may transmit a topic creation request to the agency server, when a topic creation notification is received from the agency server, generate a first subscription DID corresponding to the topic, a pair of first subscription private key and first subscription public key corresponding to the first subscription DID, transmit the first subscription DID to the counterpart device, receive a second subscription DID generated by the counterpart device from the agency server, generate a first encryption key based on the first subscription private key and the second subscription DID, and transmit message data encrypted with the first encryption key to the agency server.

Abstract: This disclosure describes techniques for allowing an organization to manage user identities. In some examples, the management of user identities may be serverless. In some examples, serverless identity management may be enabled through a distributed application on user devices of the organization. The application may generate and/or store information related to the user identities on the user devices. Serverless identity management may further include storing at least some of the information at a location that is easily accessible to the user devices, such as a cloud computing location, while maintaining security for private data. Serverless identity management may therefore provide an organization with greater operational flexibility.

Abstract: An example is a method. A query challenging authenticity is received at an intellectual property (IP) block in an integrated circuit (IC) die. The query may be a query of a query-response pair. A response to the query is generated, at the IP block, using a logic built-in self-test (LBIST) circuit. The response is transmitted from the IP block. The response may be received and compared to an expected response of the query-response pair. Authenticity may be validated when the response matches the expected response.

Abstract: Disclosed herein are system, method, and computer program product embodiments for an Artificial Intelligence (AI)-enabled threat detection system. The embodiments describe evaluating an alert from an alert stream using a threat analysis system. The threat analysis system may include a proxy server for receiving and formatting system event data, a threat analysis pipeline for determining and normalizing risk scores for a set of endpoint data and behavioral metrics respectively, and an action engine for executing an action towards the alert. The action engine may disable the alert, whitelist the alert, and/or transmit a threat notification to an administrator server based on traffic light thresholding.

Abstract: An example system can include a memory device and a processing device. The memory device can include a group of memory cells. The processing device can be coupled to the memory device. The processing device can be configured to determine a distance of a memory die from a center of a memory component. The processing device can be configured to perform a read disturb operation on the memory die based on the determined distance use a first voltage window for a set of memory cells of the group of memory cells during a first time period.

Abstract: A memory device includes a reference voltage generator configured to generate a reference voltage, and a data input/output (I/O) buffer configured to receive a data signal having a first phase, generate a phase control signal having a second phase opposite to the first phase, and generate an output signal based on the data signal, the phase control signal, and the reference voltage.