Patents Examined by Han Yang
  • Patent number: 11823741
    Abstract: In some embodiments, the present disclosure relates a phase change random access memory device that includes a phase change material (PCM) layer disposed between bottom and top electrodes. A controller circuit is coupled to the bottom and top electrodes and is configured to perform a first reset operation by applying a signal at a first amplitude across the PCM layer for a first time period and decreasing the signal from the first amplitude to a second amplitude for a second time period; and to perform a second reset operation by applying the signal at a third amplitude across the PCM layer for a third time period and decreasing the signal from the third amplitude to a fourth amplitude for a fourth time period greater than the second time period. After the fourth time period, the PCM layer has a percent crystallinity greater than the PCM layer after the second time period.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: November 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jau-Yi Wu
  • Patent number: 11822686
    Abstract: Systems and methods are provided for restoring backup data files. One example computer-implemented method includes receiving a restore request including a backup data file having an L1 file, a wrapped L1 key, and an L4 file having an attribute of a user. In response, the method includes unwrapping the L1 key with a private key, decrypting the L1 file via the L1 key, and verifying a sample biometric included in the restore request against a reference biometric from the L1 file. Upon verification of the sample biometric, the method includes decrypting an L2 file of the L1 file, verifying a contact attribute from the L2 file with the user, decrypting an L3 file using the contact attribute, wrapping an L4 key from the L3 file with the public key of the restore request, and transmitting the wrapped L4 key to a mobile device of the user.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: November 21, 2023
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Bryn Anthony Robinson-Morgan, Liang Tian, Prashant Sharma
  • Patent number: 11817169
    Abstract: A memory system includes a memory; and a memory controller which includes a spare buffer suitable for storing an error location in the memory and data at the location, and commands the memory to perform a spare read operation when a read operation needs to be performed in a region of the memory including the error location.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: November 14, 2023
    Assignee: SK hynix Inc.
    Inventors: Munseon Jang, Hoiju Chung, Jang Ryul Kim
  • Patent number: 11817172
    Abstract: A table management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: storing multiple table groups, wherein each of the table groups includes multiple voltage management tables; detecting a status of the memory storage device; determining one of the table groups as a target table group according to the status of the memory storage device, wherein the target table group includes multiple target voltage management tables; reading data from a rewritable non-volatile memory module by using at least one read voltage level according to at least one of the target voltage management tables.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: November 14, 2023
    Assignee: Hefei Core Storage Electronic Limited
    Inventors: Chih-Ling Wang, Qi-Ao Zhu, Jing Zhang, Yang Zhang
  • Patent number: 11816238
    Abstract: According to some embodiments, a user vector generator may access information about a user (e.g., a software deployment developer or operator) in a user data store that contains electronic records each associated with different user. Each record may include, for example, a user identifier and user characteristics. Based on the user characteristics, the system may automatically generate a user vector indicating a computing environment skillset level for that user (e.g., beginner, intermediate, or expert). A machine learning privilege assignment platform may receive an indication of the user vector for the user and, based on the user vector and a machine learning algorithm, generate a privilege decision for that user (e.g., when the user attempts to update the system). An indication of the privilege decision may be output, according to some embodiments, to an SMT solver to review the privilege decision before granting the user access to the computing environment.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: November 14, 2023
    Assignee: SAP SE
    Inventor: Shashank Mohan Jain
  • Patent number: 11817148
    Abstract: Techniques are provided for programming a self-selecting memory cell that stores a first logic state. To program the memory cell, a pulse having a first polarity may be applied to the cell, which may result in the memory cell having a reduced threshold voltage. During a duration in which the threshold voltage of the memory cell may be reduced (e.g., during a selection time), a second pulse having a second polarity (e.g., a different polarity) may be applied to the memory cell. Applying the second pulse to the memory cell may result in the memory cell storing a second logic state different than the first logic state.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: November 14, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Hernan A. Castro, Innocenzo Tortorelli, Agostino Pirovano, Fabio Pellizzer
  • Patent number: 11810608
    Abstract: A high-density low voltage ferroelectric (or paraelectric) memory bit-cell that includes a planar ferroelectric or paraelectric capacitor. The memory bit-cell comprises 1T1C configuration, where a plate-line is parallel to a word-line, or the plate-line is parallel to a bit-line. The memory bit-cell can be 1TnC, where ā€˜nā€™ is a number. In a 1TnC bit-cell, the capacitors are vertically stacked allowing for multiple values to be stored in a single bit-cell. The memory bit-cell can be multi-element FE gain bit-cell. In a multi-element FE gain bit-cell, data sensing is done with signal amplified by a gain transistor in the bit-cell. As such, higher storage density is realized using multi-element FE gain bit-cells. In some examples, the 1T1C, 1TnC, and multi-element FE gain bit-cells are multi-level bit-cells. To realize multi-level bit-cells, the capacitor is placed in a partially switched polarization state by applying different voltage levels or different time pulse widths at the same voltage level.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: November 7, 2023
    Assignee: KEPLER COMPUTING INC.
    Inventors: Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan, Amrita Mathuriya, Sasikanth Manipatruni
  • Patent number: 11809583
    Abstract: Minimizing data exposure during screen sharing, including detecting remote access of an information handling system by an external information handling system; in response to detecting the remote access, identifying a selection of one or more application elements of an application executing on the information handling system for obscuration; applying an image filter to the selected application elements to adjust display properties of the selected application elements such that display content of the application elements is obscured for viewing by the external information handling system; and after applying the image filter to the selected application elements, providing remote access of the information handling system to the external information handling system, including providing remote access to the obscured display content of the selected application elements of the application.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: November 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Zheng Yuan, Danilo Ong Tan
  • Patent number: 11805408
    Abstract: A device within a small cell may establish a first secure communication channel between the device and a network device based on a first type of encryption. The device within the small cell may transmit data between the small cell and a core network via the first secure communication channel. The device within the small cell may receive information associated with a second type of encryption, wherein the second type of encryption is different from the first type of encryption. The device within the small cell may terminate the first secure communication channel. The device within the small cell may establish a second secure communication channel between the device and the network device based on the information associated with the second type of encryption. The device within the small cell may transmit further data between the small cell and the core network via the second secure communication channel.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: October 31, 2023
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Nimalan Kanagasabai, Amir Saghir, Mun Wei Low, Said Hanbaly
  • Patent number: 11798647
    Abstract: Apparatus might include an array of memory cells and a controller for access of the array of memory cells. The controller might be configured to cause the apparatus to apply a sense voltage level to a control gate of a memory cell of the array of memory cells, generate N determinations whether the memory cell is deemed to activate or deactivate while applying the sense voltage level, wherein N is an integer value greater than or equal to three, deem the memory cell to have a threshold voltage in a first range of threshold voltages lower than the sense voltage level in response to a majority of the N determinations indicating activation of the memory cell, and deem the memory cell to have a threshold voltage in a second range of threshold voltages higher than the sense voltage level in response to a majority of the N determinations indicating activation of the memory cell.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: October 24, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Sheyang Ning, Lawrence Celso Miranda, Tomoko Ogura Iwasaki, Ting Luo, Luyen Vu
  • Patent number: 11797702
    Abstract: One example method includes extracting content metadata from data, storing the content metadata in a data catalogue, receiving at the data catalogue, from a user, a request to access the data, transmitting, by the data catalogue to a security service provider, an access request that includes the extracted content metadata and metadata relating to the access request, accessing, by the security service provider, identity metadata concerning an identity of the user, and a data access policy, and transmitting, by the security service provider to the data catalogue, a decision as to whether or not access can be granted to the data, and the decision is based on the data access policy, the identity metadata, and the metadata in the access request.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: October 24, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Nicole Reineke, Hanna Yehuda, Omar Abdul Aal, Farida Shafik, Joel Christner, Shary Beshara, Ahmad Refaat Abdel Fadeel Ahmad El Rouby
  • Patent number: 11797392
    Abstract: A system and method for backing up critical data of edge devices includes originator, surrogate, and target edge devices as well as a vault-broker server. The critical data, encrypted, is transmitted to and stored by a surrogate. The association of originator and surrogate is managed by the vault-broker server. Encryption protects the data from recovery by unauthorized parties while allowing surrogate edge devices to determine if recovery attempts are made by authorized parties.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: October 24, 2023
    Assignee: THALES DIS FRANCE SAS
    Inventors: Ijaz Muhammad Khan, Asad Mahboob Ali
  • Patent number: 11790970
    Abstract: Methods, systems, and devices for memory array with multiplexed select lines are described. In some cases, a memory cell of the memory device may include a storage component, a first transistor coupled with a word line, and a second transistor coupled with a selection line to selectively couple the memory cell with a digit line. The selection line may be provided in parallel to each digit line for multiplexing the digit lines toward a sense amplifier while a plurality of drivers, one for each selection line, may be provided in a staggered configuration under the memory array and split in even drivers and odd drivers for corresponding adjacent tiles of the memory array.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: October 17, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Ferdinando Bedeschi
  • Patent number: 11783067
    Abstract: A first server computing device, including a processor configured to receive, from a first application instance, a first access request for a file. The first access request may include a first modification privilege request and a modification privilege sharing request. The processor may determine that the file is not locked for editing and grant the first application instance access to the file with modification privileges indicated by the first modification privilege request and without modification privilege sharing permissions indicated by the modification privilege sharing request. The processor may set the file to be locked for editing. The processor may receive, from a second application instance, a second access request including a second modification privilege request. The processor may determine that the file is locked for editing and deny the second application instance access to the file.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: October 10, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Diaa Eldin Mohamed Hazem Fathalla, Surender Kumar, Jason Daniel Shay, Michael S. Murstein, Jose J Figueroa-Morales
  • Patent number: 11783076
    Abstract: In one embodiment, a traffic analysis service that monitors a network obtains file metadata regarding an electronic file. The traffic analysis service determines a sensitivity score for the electronic file based on the file metadata. The traffic analysis service detects the electronic file within traffic in the network. The traffic analysis service causes performance of a mitigation action regarding the detection of the electronic file within the traffic, based on the sensitivity score of the electronic file.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: October 10, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Chris Allen Shenefiel, Robert Waitman, David McGrew, Blake Harrell Anderson
  • Patent number: 11783095
    Abstract: A data access manager is provided on a computing device to manage access to secure files stored in memory. The data access manager intercepts function calls from applications to the memory management unit and determines whether an application is allowed to access secure data stored in the memory of the computing device. When an initial request to map the data is received, the data access manager maps both secure data and clear data, obtaining pointers to both secure and clear data. When an application has permission to access the requested data, the data access manager returns the pointer to the clear data. When an application does not have permission to access the requested data, the data access manager returns the pointer to the secure data.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: October 10, 2023
    Assignee: CrowdStrike, Inc.
    Inventors: Artsiom Tsai, Joshua Jones, Andrey Redko
  • Patent number: 11775623
    Abstract: Aspects of the disclosure relate to processing authentication requests to secured information systems using machine-learned user-account behavior profiles. A computing platform may receive an authentication request corresponding to a request for a user of a client computing device to access one or more secured information resources associated with a user account. The computing platform may capture one or more behavioral parameters and activity data associated with one or more interactions with one or more non-authenticated pages. Then, the computing platform may evaluate the one or more behavioral parameters and the activity data using a behavioral profile associated with the user account. Based on this evaluation, the computing platform may identify the authentication request as malicious and may generate and send one or more denial-of-access commands to prevent the client computing device from accessing the one or more secured information resources associated with the user account.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: October 3, 2023
    Assignee: Bank of America Corporation
    Inventors: Michael E. Toth, Xianhong Zhang, Hitesh Shah, Srinivasa Rao Goriparthi
  • Patent number: 11775667
    Abstract: Example implementations relate a system and method for storing configuration files of a host computing device in a secure storage of a Baseboard Management Controller (BMC). The secure storage includes configuration files associated with the host computing device. The BMC is communicatively connected to the host computing device using a communication link. The secure storage is emulated as a storage device to the host computing device. The BMC monitors the secure storage to detect changes in the configuration files. When there is a change in a configuration file, the BMC performs a security action in the host computing device.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: October 3, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Luis Enrique Luciani, Jr.
  • Patent number: 11769537
    Abstract: A memory device includes a memory cell array configured to store data; and a data output circuit configured to transmit status data to an external device through at least one data line in a latency period in response to a read enable signal received from the external device and transmit the data read from the memory cell array to the external device through the at least one data line in a period subsequent to the latency period.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: September 26, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byunghoon Jeong, Kyungtae Kang, Jangwoo Lee, Jeongdon Ihm
  • Patent number: 11769541
    Abstract: The present disclosure relates to a memory device based on a ferroelectric capacitor, which includes a control unit for writing data into a memory cell or reading data from the memory cell and a plurality of memory cells arranged in an array; each memory cell includes an external interface, a first switch, a transistor, a first capacitor and a second capacitor, wherein at least one of the first capacitor and the second capacitor is a ferroelectric capacitor; the first switch has a first port connected with a first word line, a second port connected with a bit line, and a third port connected with one end of the first capacitor; and the transistor has a gate electrode connected with another end of the first capacitor and one end of the second capacitor, a source electrode connected with a first read terminal, and a drain electrode connected with a second read terminal, wherein another end of the second capacitor is connected with a second word line.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: September 26, 2023
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Xueqing Li, Xiyu He, Xiaoyang Ma, Juejian Wu, Zhiyang Xing, Yongpan Liu, Huazhong Yang