Abstract: Systems, methods and apparatus to implement bipolar read retry. In response to a determination that a first result of reading a set of memory cells using a first magnitude of read voltage is erroneous, a second magnitude of read voltage, greater than the first magnitude, is identified for the bipolar read retry. In the retry, a controller uses voltage drivers to apply, to the set of memory cells, first voltages of the second magnitude in a first polarity to obtain a second result of reading the set of memory cells and, after the second result is generated and in parallel with decoding the second result, apply second voltages of the second magnitude in a second polarity, opposite to the first polarity.

Abstract: A memory device to program a group of memory cells to store multiple bits per memory cell. Each bit per memory cell in the group from a page. After determining a plurality of read voltages of the group of memory cells, the memory device can read the multiple pages of the group using the plurality of read voltages. For each respective page in the multiple pages, the memory device can determine a count of first memory cells in the respective page that have threshold voltages higher than a highest read voltage, among the plurality of read voltages, used to read the respective page. The count of the first memory cells can be compared with a predetermined range of a fraction of memory cells in the respective page to evaluate the plurality of read voltages (e.g., whether any of the read voltages is in a wrong voltage range).

Abstract: The present invention relates to a method for encrypting a data pipeline in a computer system. A device receives a request to encrypt a data pipeline. The device can also receive encrypted stages of a data pipeline that are encrypted by an encryption key. The device can generate random locations in storage where the data pipeline stages will be stored. The random locations can be generated in response to the data pipeline stages being encrypted. The random storage locations can be stored in a mapping file. The mapping file can be selected to store the random locations based on the random storage locations being generated. The device can encrypt the mapping file based on the mapping file storing the random storage locations. The device can place the encrypted mapping file in memory.

Abstract: Systems and methods for controlling a peripheral device with a web browser. A system includes a peripheral device and a user computing device executing a web browser and a device manager, the device manager configured to operate the peripheral device and including a device manager web server. An authentication token can be passed to the web browser from a web server upon coupling of the peripheral device with the user computing device and login by the user with the web browser. The web browser can pass the authentication token to the device manager through the device manager web server. The device manager can transmit the authentication token to the web server to pair the web browser with the device manager.

Abstract: A controller configured to perform a training process of sampling data using multi-phase signals which are internally generated according to a data strobe signal, and compensating for a delay time of the data strobe signal using a control code which is generated according to the sampling result.

Abstract: According to one embodiment, a memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a plurality of groups, each including a plurality of memory cells. The memory controller is configured to determine whether to execute a refresh process for a first group based on whether a first temperature in a write process for the first group and a second temperature after the write process for the first group satisfy a first condition.

Abstract: A computer implemented method of securing an application executing in a software container deployed in a computer system includes providing access to the application selectively in accordance with access control rules by sharing an encryption key with authorized accessors.

Abstract: In a method of predicting a remaining lifetime of the nonvolatile memory device, a read sequence is performed. The read sequence includes a plurality of read operations, and at least one of the plurality of read operations is sequentially performed until read data stored in the nonvolatile memory device is successfully retrieved. Sequence class and error correction code (ECC) decoding information are generated. A life stage of the nonvolatile memory device is determined based on at least one of the sequence class and the ECC decoding information. When it is determined that the nonvolatile memory device corresponds to a first life stage, a coarse prediction on the remaining lifetime of the nonvolatile memory device is performed. When it is determined that the nonvolatile memory device corresponds to a second life stage after the first life stage, a fine prediction on the remaining lifetime of the nonvolatile memory device is performed.

Abstract: Methods and systems for copying weight values between weight arrays includes reading outputs from a first array and reading outputs from a second array. Differences between respective outputs of the first array and the second array are determined. Values of the second array are adjusted in accordance with the determined differences.

Abstract: Systems and methods for a machine-learning driven fine-grained file access control approach are provided. According to one embodiment, a server associated with an enterprise network can obtain and store information regarding historical user behavior of users of the enterprise network by observing file access requests initiated by the users. The server receives a file access request initiated by a user, which relates to a file stored within the enterprise network in encrypted form. In response to receipt of the file access request, the server determines a risk score for the user based on multiple factors, including information regarding historical user behavior, the file access request and observed data determined based on the file access request so that based on the risk score, access to the file is permitted by returning a decryption key for the file or denied by withholding the decryption key.

Abstract: Embodiments provide an integrated circuit structure and a memory, and relate to the field of semiconductor memory technologies. The integrated circuit structure includes: a pad region including a plurality of signal pads arranged along a target direction; and a first circuit region arranged on one side of the pad region. The first circuit region includes a plurality of signal input circuit modules arranged along the target direction and correspondingly connected to the plurality of signal pads respectively. Each of the plurality of signal input circuit modules is configured to implement a sampling operation of an input signal and write a sampling result into a storage array. A size of the first circuit region along the target direction is smaller than that of the pad region along the target direction. According to the embodiments, the performance of a write operation can be improved for the memory.

Abstract: Various implementations provide systems and methods for writing data to memory bit cells. An example implementation includes a write circuit that couples both a bitline and a complementary bitline to power (VDD) by positive-channel metal oxide semiconductor (PMOS) transistors. By using PMOS transistors instead of NMOS transistors at the applicable nodes, such implementations may avoid a voltage drop between VDD and the bitlines, thereby allowing the bitlines to reach a substantially full VDD voltage level when appropriate. Additionally, various implementations avoid dynamic nodes that share charge across NMOS transistors, thereby allowing a given bitline to reach a substantially full VDD voltage level when appropriate. Accordingly, some implementations may experience higher levels of writability and static noise margin than other implementations.

Abstract: A memory device includes a plurality of memory cells. Each memory cell includes a multi-gate FeFET that has a first source/drain terminal, a second source/drain terminal, and a gate with a plurality of ferroelectric layers configured such that each of the ferroelectric layers has a respective unique switching E-field.

Abstract: In a system having a plurality of servers, a method is executed to perform an encryption scheme. The method includes a server of the plurality of servers receiving a request token to compute a function on a data point, the data point being encrypted as a ciphertext and the request token being based on the ciphertext and the function. The server grants the request to compute the function on the datapoint by sending a function evaluation key, and participates in a distributed decryption protocol for determining a result of computing the function on the data point by sending a master secret key.

Abstract: A method for decrypting an encrypted message in a cluster may be provided. The method may include generating, by a first private key generator, one or more system parameters and a master key using a security parameter of the cluster and a depth of the maximum of a unit vector, the cluster including a first member and a second member. The method may also include generating, by the first private key generator, a private key of the first member; The method may further include generating, by a second private key generator, a private key of the second member based on the one or more system parameters, the identification vector of the first member, the private key of the first member, and an identification vector of the second member; The method may still further include decrypting the encrypted message the private key of the first member or the second member.

Abstract: A buffer chip includes a first set of input/output (I/O) pins a second set of I/O pins, and is configurable to operate in one of a first mode or a second mode. The first set of I/O pins and the second set of I/O pins are configured to convey first signals between the buffer chip and one or more volatile memory devices on a memory module when the buffer chip is configured to operate in the first mode. The first set of I/O pins is configured to convey the first signals between the buffer chip and the one or more volatile memory devices and the second set of I/O pins is configured to convey second signals between more non-volatile memory devices on the memory module when the buffer chip is configured to operate in the second mode.

Abstract: An encrypted database system includes a memory storing a database comprising a plurality of logical structural elements each respectively including an unencrypted fuzzed value and encrypted sensitive data formed by encrypting a sensitive data value. The system also includes a processor in communication with the memory and configured to form the plurality of logical structural elements and store the plurality of logical structural elements in the memory. Forming a logical structural element comprises generating the unencrypted fuzzed value for the sensitive data value, encrypting the sensitive data value, and storing the encrypted sensitive data value and the unencrypted fuzzed value in the same logical structural element in the database. The unencrypted fuzzed value is within a predetermined value range and is different from the sensitive data value.

Abstract: A method of performing operations involving accessing a set of protected computing resources of a computing device includes (a) receiving, by a frontend service, an instruction via a network connection, the instruction directing the computing device to perform an operation involving accessing the set of protected resources, the set of protected computing resources being configured to refuse access to the frontend service, (b) in response to receiving the instruction, sending a request from the frontend service to a backend service, the request instructing the backend service to access the set of protected resources, the backend service being configured to not communicate via the network connection, the set of protected computing resources being configured to permit access to the backend service, and (c) in response to the backend service receiving the request from the frontend service, the backend service accessing the set of protected resources in fulfillment of the operation.

Abstract: A high-density low voltage ferroelectric (or paraelectric) memory bit-cell that includes a planar ferroelectric or paraelectric capacitor. The memory bit-cell comprises 1T1C configuration, where a plate-line is parallel to a word-line, or the plate-line is parallel to a bit-line. The memory bit-cell can be 1TnC, where ‘n’ is a number. In a 1TnC bit-cell, the capacitors are vertically stacked allowing for multiple values to be stored in a single bit-cell. The memory bit-cell can be multi-element FE gain bit-cell. In a multi-element FE gain bit-cell, data sensing is done with signal amplified by a gain transistor in the bit-cell. As such, higher storage density is realized using multi-element FE gain bit-cells. In some examples, the 1T1C, 1TnC, and multi-element FE gain bit-cells are multi-level bit-cells. To realize multi-level bit-cells, the capacitor is placed in a partially switched polarization state by applying different voltage levels or different time pulse widths at the same voltage level.

Abstract: Leakage of secure content (e.g., unauthorized dissemination of secure content) is prevented even after a user has downloaded a copy of the secure content. In a content management system, the secure content object is accessible by users who access the secure content by downloading copies. While the downloading of a copy to a user device is permitted, further dissemination is not allowed. To enforce this degree of security, the user downloads a virtual file system that is configured to store a local instance of the secure content object in a secure container of the user device. During ongoing operation of the user device, every data movement operation request associated with the local instance of the secure content object is intercepted. Logic implemented in the downloaded a virtual file system will deny any data movement operation request when a target storage location associated with the data movement operation request is other than a location in the secure container.