Abstract: We describe techniques to reduce DC ripple voltage in an inverter by determining a plurality of switching events for each of the three phases in each Pulse Width Modulation (PWM) period. The switching events provide a desired target output voltage for the respective PWM period. From this determination of the switching events, a comparison can be made to determine a first time period between a first and second switching event across all of the phases, and a second time period between the second and a third switching event across all of the phases. The timing of one or more switching events in only one of the phases in the respective PWM period is adjusted in response to the determined time period being greater than a threshold in order to reduce the determined first or second time period.

Abstract: A circuit comprising a NMOS having a gate coupled to a first node and a source terminal coupled to a second node, a second NMOS having a gate coupled to the second node and a source terminal coupled to an output node, a PMOS having a gate coupled to a third node, a drain terminal coupled to a fourth node, and a source terminal coupled to a fifth node, and a second PMOS having a gate coupled to the fourth node, a drain terminal coupled to the output node, and a source terminal coupled to the fifth node. The circuit also includes a voltage protection sub-circuit coupled to the first node, a fast turn-off sub-circuit coupled to the output node, a fast turn-on sub-circuit coupled to the third and fourth nodes, and a node initialization sub-circuit coupled to the first, second, and fourth nodes and the fast turn-on sub-circuit.

Abstract: A method and device for timing in time-varying distance protection based on multiple lines of a tower. The method includes: collecting an instantaneous current value at a time-varying distance protection installation location in the multiple lines of the tower, and acquiring preset parameters; calculating, according to the preset parameters and a multi-line ranging model, a multi-line ranging result; calculating, according to the preset parameters, the multi-line ranging result, and an adaptive calculation model, time of a section-II distance protection action and final time of a section-III distance protection action; and determining, according to the instantaneous current value, the preset parameters, and a cross-line failure auxiliary criterion model, final time of the section-II distance protection action.

Abstract: A VRM system comprises a first output group that comprises a first primary converter. The VRM system also comprises a second output group that comprises a second primary converter. The VRM system also comprises a first VRM output and a second VRM output. The VRM system comprises an adaptable spare converter. The VRM system comprises a first switch and a second switch. Closing the first switch connects the adaptable spare converter with the first VRM output. Closing the second switch connects the adaptable spare converter with the second VRM output.

Abstract: A power margin tracking control method and system for a multi-terminal high-voltage direct current converter station are provided. A power adjustment factor is introduced on the basis of a droop coefficient, to realize a self-adaptive regulation of a converter station operation mode to a real-time fluctuation of a wind and solar power. In this way, the system operation stability and the power fluctuation allocation capability in a grid-connected system are improved. Furthermore, a DC voltage deviation in the multi-terminal high-voltage direct current grid is reduced.

Abstract: The present invention concerns a node of an HVDC grid composed of HVDC nodes and of a plurality of links interconnecting the HVDC nodes, each HVDC node being interconnected to at least one HVDC node of the HVDC grid by a link composed of conductive cables for high voltage direct current transportation and one optical fiber, at least one HVDC node being interconnected to at least two HVDC nodes, each HVDC node comprising, for each link connecting the HVDC node to the at least one other HVDC node, a link module comprising a fault sensing device, a breaker, and an optical transceiver for communicating through the optical fiber of the link.

Abstract: A grid forming vector current control system can be used for controlling a grid intertie. A first terminal is connected to a first power grid and a second terminal is connected to a second power grid. The terminals each include current control unit, a virtual admittance unit, and a phase locked loop (PLL) unit. The virtual admittance unit and the PLL unit are configured to emulate an inertia of a virtual synchronous machine (VSM) and a virtual current source is connected in parallel to the VSM. A controller is configured to use transient power consumed by the first VSM to generate a power-equivalent current reference to control the second virtual current source and to use transient power consumed by the second VSM to generate a power-equivalent current reference to control the first virtual current source.

Abstract: A voltage regulation device includes: an input node configured to receive electrical power from an electrical power source; a primary winding electrically connected to the input node; an output node configured to provide electrical power to a load; a shunt winding electrically connected to the output node; a converter configured to provide a compensation current to the shunt winding; and a control system configured to: determine a harmonic compensation signal based on harmonic frequency data; determine a reactive power compensation signal based on a reactive power set point; and control the converter based on the determined harmonic compensation signal and the determined reactive power compensation signal to produce the output compensation signal. The output compensation signal is configured to reduce the one or more harmonic frequency components in a current that flows in the output node and to control an amount of reactive power at the output node.

Abstract: An impedance injection unit (IIU) system is coupled to a high-voltage (HV) transmission line. The IIUs are activated in sequences of activation in successive time periods. This injects an impedance waveform onto the HV transmission line. The ordering of IIUs in the sequences of activation is repeatedly changed in successive time periods. This equalizes electrical stress across the IIUs used, leading to overall improvement in IIU system lifetimes.

Abstract: A system and method for controlling microgrids composed of inverter-based distributed generation (IBDG) units. This includes a method using multiple IBDGs to inject impedance-modulated harmonic currents during fault conditions, with each IBDG injecting a unique, differentiable harmonic (i.e., non-fundamental) order from neighboring IBDGs. The method also involves using an inverse time-harmonic-current characteristic to detect faults by locally measuring the harmonic currents injected by IBDGs. A harmonic directional overcurrent relay is also used for fault detection.

Abstract: A method for controlling an inverter-based resource (IBR) having a power converter connected to an electrical grid includes receiving a first power limit signal for the IBR from an external controller, receiving a second power limit signal for the IBR, and determining a constrained power limit signal based on the first and second power limit signals. The method also includes applying a first frequency droop function to the constrained power limit signal and determining at least one of a power reference signal or a pitch reference signal for the IBR as a function of an output of the first frequency droop function and the constrained power limit signal. Further, the method includes determining one or more control commands for the IBR based on at least one of the power reference signal or the pitch reference signal and controlling the IBR based on the control command(s) so as to support a grid frequency of the electrical grid within power available at the IBR.

Abstract: A power system includes multiple power units (PUs), each including a circuit breaker (CB), a local controller (LC) and an intelligent electronic device (IED). For any one of the PUs, the IED, when determining that the CB has mechanically failed, outputs a disconnect message via a network to the IED(s) of the remaining PU(s). For each of the remaining PU(s), based on the disconnect message, the IED thereof, when determining that the corresponding CB is a relevant CB, outputs a trip control signal that indicates to trip for receipt by the corresponding LC, so that the LC causes the CB to switch to an open state.

Abstract: The present invention provides a power control circuit connectable to a load adapted to receive a power supply, the power control circuit adapted to absorb power from the power supply and adapted to deliver power to the power supply to stabilize at least one electrical parameter of the power supply. The present invention also provides an associated method of stabilizing at least one electrical parameter of a power supply connectable to a load, the method including absorbing power from the power supply or delivering power to the power supply. The at least one electrical parameter of the power supply includes parameters such as voltage and frequency.

Abstract: A method for controlling a hybrid switched capacitor (SC) converter includes (a) generating control signals for controlling switching devices of the hybrid SC converter, in a manner which regulates one or more parameters of the hybrid SC converter, (b) detecting flying capacitor voltage imbalance in the hybrid SC converter, and (c) in response to detecting flying capacitor voltage imbalance in the hybrid SC converter, generating the control signals in a manner which varies switching state duration of the hybrid SC converter, to move flying capacitor voltage towards balance.

Abstract: A rectifying element includes a MOS transistor series-connected with a Schottky diode. A bias voltage is applied between the control terminal of the MOS transistor and the terminal of the Schottky diode opposite to the transistor. A pair of the rectifying elements are substituted for diodes of a rectifying bridge circuit. Alternatively, the control terminal bias is supplied from a cross-coupling against the Schottky diodes. In another implementation, the Schottky diodes are omitted and the bias voltage applied to control terminals of the MOS transistors is switched in response to cross-coupled divided source-drain voltages of the MOS transistors. The circuits form components of a power converter.

Abstract: A method includes providing a transformer with primary and current injection windings, a primary switch connected to the primary winding, a parasitic capacitance reflected across the primary switch, a secondary rectifier means, and a current injection circuit including a current injection switch connected to the current injection winding, and a unidirectional current injection switch connected to the current injection winding. The method includes switching on the current injection switch to start a current injection flowing from a controlled voltage source, through the unidirectional current injection switch and further through the current injection winding. The current injection reflects into the primary winding, thereby discharging the parasitic capacitance reflected across the primary switch. The method includes turning on the primary switch with a delay time after the current injection switch turns on and turning off the current injection switch after the current injection reaches zero amplitude.

Abstract: An auto-transformer rectifier system comprising an 18-pulse (or multiple of 18-pulse) autotransformer rectifier unit ATRU having three, or a multiple of three, diode bridge rectifiers and a balancing resistor to balance the power flow through the diode bridge rectifiers, wherein the balancing resistor has a variable resistance, and further comprising a controller configured to identify imbalances between power flows of the respective diode bridge rectifiers and to adjust the resistance of the balancing resistor in response to the detected imbalance.

Abstract: A current limit protecting system and method of a motor pre-driver are provided. A current limiting circuit detects a current of a resistor that is connected to a motor, and then compares the current of the resistor with a current threshold to output a current comparing signal. When a controller circuit determines that the current of the resistor is larger than the current threshold according to the current comparing signal, and a working period of a first signal of a first node or a working period of a second signal of a second node of the motor reaches a preset value, a first high-side switch and a second high-side switch are turned off, and a first low-side switch and a second low-side switch are alternately turned on. As a result, a temperature of the motor generally reduces.

Abstract: A system including a vehicle having a motive electrical power path, and a power distribution unit having a current protection circuit disposed in the motive electrical power path. The current protection circuit includes a first leg of the current protection circuit comprising a thermal fuse, a second leg of the current protection circuit comprising a contactor. The first leg and the second leg may be coupled in a parallel arrangement. The system further has a controller that includes a current detection circuit structured to determine a current flow through the motive electrical power path, and a fuse management circuit structured to provide a contactor activation command in response to the current flow. The contactor may be responsive to the contactor activation command.

Abstract: A mode-transition architecture for USB controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes a controller coupled to a slope compensation circuit, the controller to detect a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less or more than the first duty cycle. The controller controls the slope compensation circuit to nullify an error in an output caused by the transition. The controller can cause the slope compensation circuit to apply a charge stored in a capacitor during a first cycle to start a second cycle with a higher voltage than the first cycle.