Patents Examined by Hau Nguyen
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Patent number: 8810594Abstract: One or more embodiments of the present invention relate to a four color image display device. A display device according to an exemplary embodiment of the present invention includes a first pixel adapted to display a first color, a second pixel adapted to display a second color, a third pixel adapted to display a third color, and a white pixel adapted to display a first white. In one aspect, the first to third pixels are adapted to display a second white in combination, and a ratio of the first white and the second white varies according to a gray. Accordingly, a greenish phenomenon of a low-luminance white light in a four color display device may be reduced.Type: GrantFiled: October 23, 2012Date of Patent: August 19, 2014Assignee: Samsung Display Co., Ltd.Inventors: Kyong-Tae Park, Baek-Woon Lee, Alexander Archipov
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Patent number: 8803874Abstract: A system and method of displaying a three-dimensional (3D) map based on road information. A display system, including: a culling area determination unit to determine a culling area based on road information; a data conversion unit to convert data of at least a portion of objects displayed on the culling area; and a display unit to display at least the portion of the objects based on the converted data.Type: GrantFiled: June 29, 2008Date of Patent: August 12, 2014Assignee: Intellectual Discovery Co., Ltd.Inventors: Jung Kak Seo, Yun Han Kim, Dae Myung Kim
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Patent number: 8797334Abstract: The disclosed embodiments provide a system that facilitates seamlessly switching between graphics-processing units (GPUs) to drive a display. In one embodiment, the system receives a request to switch from using a first GPU to using a second GPU to drive the display. In response to this request, the system uses a kernel thread which operates in the background to configure the second GPU to prepare the second GPU to drive the display. While the kernel thread is configuring the second GPU, the system continues to drive the display with the first GPU and a user thread continues to execute a window manager which performs operations associated with servicing user requests. When configuration of the second GPU is complete, the system switches the signal source for the display from the first GPU to the second GPU.Type: GrantFiled: January 6, 2010Date of Patent: August 5, 2014Assignee: Apple Inc.Inventors: Thomas W. Costa, Simon M. Douglas, David J. Redman
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Patent number: 8797317Abstract: The present disclosure relates to a mobile terminal and control method thereof for allowing a touch input to a three-dimensional stereoscopic image. The method disclosed herein may include displaying a three-dimensional stereoscopic image including a plurality of objects, detecting the location of a detection target in a detection region corresponding to the three-dimensional stereoscopic image, selecting a first object based on the location of the detection target, moving the first object along the movement of the detection target in a state that the first object is selected, and generating at least one object between the first and the second object when a distance between the first and the second object is increased in one direction due to the movement of the first object.Type: GrantFiled: July 8, 2011Date of Patent: August 5, 2014Assignee: LG Electronics Inc.Inventor: Jonghwan Kim
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Patent number: 8786617Abstract: A method of carrying out random number generation processing uses a GPU including a plurality of blocks each including at least one core, the random number generation processing including update processing of updating state vectors and conversion processing of converting the updated state vectors into random numbers having another distribution. The method includes carrying out, by one of the plurality of blocks, the update processing (S3), and carrying out, by the plurality of blocks, the conversion processing in parallel based on results of the update processing (S9). Therefore, it is possible to more efficiently generate a random number sequence which is the same as the one obtained through random number generation processing performed in a serial manner, by parallelizing a single random number generator in a GPU.Type: GrantFiled: March 2, 2011Date of Patent: July 22, 2014Assignee: Mizuho-DL Financial Technology Co. Ltd.Inventor: Tomohisa Yamakami
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Patent number: 8786636Abstract: An information processing apparatus includes a display, a sensor, and a controller. The display has a screen. The sensor is configured to detect an inclination. The controller is configured to display a first object on the screen and display a second object associated with the first object on the screen in accordance with the inclination detected by the sensor.Type: GrantFiled: August 18, 2011Date of Patent: July 22, 2014Assignee: Sony CorporationInventors: Yusuke Miyazawa, Seiji Suzuki, Yasushi Okumura
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Patent number: 8786618Abstract: One embodiment of the present invention sets forth a technique for configuring a graphics processing pipeline (GPP) to process data according to one or more shader programs. The method includes receiving a plurality of pointers, where each pointer references a different shader program header (SPH) included in a plurality of SPHs, and each SPH is associated with a different shader program that executes within the GPP. For each SPH included in the plurality of SPHs, one or more GPP configuration parameters included in the SPH are identified, and the GPP is adjusted based on the one or more GPP configuration parameters.Type: GrantFiled: October 6, 2010Date of Patent: July 22, 2014Assignee: NVIDIA CorporationInventors: Jerome F. Duluk, Jr., Jesse David Hall, Patrick R. Brown, Gernot Schaufler, Mark D. Stadler
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Patent number: 8786606Abstract: One embodiment of the present invention sets forth a technique for stroking rendered paths. Path rendering may be accelerated when a graphics processing unit or other processor is configured to identify pixels that are within half of the stroke width of any point along a path to be stroked. The path is represented by quadratic Bèzier segments and a cubic equation is evaluated to determine whether or not each point in a conservative hull that bounds the quadratic Bèzier segment is within the stroke width.Type: GrantFiled: April 29, 2011Date of Patent: July 22, 2014Assignee: NVIDIA CorporationInventor: Mark J. Kilgard
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Patent number: 8780129Abstract: A method and apparatus for hardware rotation is described. In one embodiment, the invention is an apparatus. The apparatus includes a direct access address translation component. The apparatus also includes a frame buffer coupled to the direct access address translation component. The apparatus further includes a 2D coordinate translation component. The apparatus also includes a 2D engine coupled to the 2D coordinate translation component and to the frame buffer. The apparatus further includes a 3D engine. The apparatus also include a 3D coordinate translation component coupled to the 3D engine and the frame buffer. As will be appreciated, further embodiments of the invention are within the spirit and scope of the claimed invention, and the specific details of a specific embodiment as described need not be present in all embodiments of the invention.Type: GrantFiled: May 5, 2010Date of Patent: July 15, 2014Assignee: Silicon Motion, Inc.Inventor: Frido Garritsen
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Patent number: 8780126Abstract: Systems, apparatus, methods and computer program products are described below for rendering a graphical user interface by selectively compositing display contents. In general for each of one or more content producers, where each content producer is associated with content storage containing display content, display content for output is identified depending on the content consumer to which the graphical user interface is being rendered.Type: GrantFiled: June 1, 2012Date of Patent: July 15, 2014Assignee: Apple Inc.Inventor: Michael James Paquette
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Patent number: 8780125Abstract: In one embodiment, a display device comprises a graphics interface, an image processing system, an input device coupled to the image processing system to receive a screen capture signal and transmit the screen capture signal to the image processing system, and a storage subsystem coupled to the image processing system to store, in response to the screen capture signal, screen capture data generated by the image processing system.Type: GrantFiled: September 29, 2006Date of Patent: July 15, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Bruce Aaron Tankleff, Jeffrey Dale Cole, James Ronald Pace, Courtney D. Goeltzenleuchter
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Patent number: 8773446Abstract: What is disclosed is a novel system and method for parallel processing of intra-image data in a distributed computing environment. A generic architecture and method are presented which collectively facilitate image segmentation and block sorting and merging operations with a certain level of synchronization in a parallel image processing environment which has been traditionally difficult to parallelize. The present system and method enables pixel-level processing at higher speeds thus making it a viable service for a print/copy job document reproduction environment. The teachings hereof have been simulated on a cloud-based computing environment with a demonstrable increase of ?2× with nominal 8-way parallelism, and an increase of ?20×-100× on a graphics processor. In addition to production and office scenarios where intra-image processing are likely to be performed, these teachings are applicable to other domains where high-speed video and audio processing are desirable.Type: GrantFiled: February 9, 2011Date of Patent: July 8, 2014Assignee: Xerox CorporationInventors: Shanmuga-Nathan Gnanasambandam, Lalit Keshav Mestha
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Patent number: 8767000Abstract: A data processing method compensates a color of input data for a present frame of a display panel of a display apparatus to generate color compensating data. Dimming levels of a plurality of light emitting blocks included in a light source module for the display panel are determined using the color compensating data. Compensating data of the present frame is generated using the color compensating data and compensating coefficient data including the dimming levels.Type: GrantFiled: July 26, 2011Date of Patent: July 1, 2014Assignee: Samsung Display Co., Ltd.Inventors: Dong-Hak Pyo, Tae-Kwon Jung, Dae-Gwang Jang, Min-Ha Keum, Hak-Mo Choi
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Patent number: 8766989Abstract: The present invention provides a method and system for coordinating graphics processing units in a single computing system. A method is disclosed which allows for the construction of a list of shared display modes that may be employed by both of the graphics processing units to render an output in a display device. By creating the list of shared commonly supportable display modes, the output displayed in the display device may advantageously provide a consistent graphical experience persisting through the use of alternate graphics processing units in the system. One method builds a list of shared display modes by compiling a list from a GPU specific base mode list and dynamic display modes acquired from an attached display device. Another method provides the ability to generate graphical output configurations according to a user-selected display mode that persists when alternate graphics processing units in the system are used to generate graphical output.Type: GrantFiled: July 29, 2009Date of Patent: July 1, 2014Assignee: Nvidia CorporationInventors: David Wyatt, Linda Glanville
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Patent number: 8754893Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.Type: GrantFiled: October 19, 2011Date of Patent: June 17, 2014Assignee: Intel CorporationInventors: Louis A. Lippincott, Patrick F. Johnson
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Patent number: 8754897Abstract: A silicon chip of a monolithic construction for use in implementing a multiple core graphics processing and display subsystem in a computing system having a CPU, a system memory, an operating system (OS), a CPU bus, and a display device with a display surface. The computing system supports (i) one or more software applications for issuing graphics commands, (ii) one or more graphics libraries for storing data used to implement said graphics commands. The silicon chip comprises multiple graphic pipeline cores, a partial frame buffer for buffering pixels corresponding to image fragments, a routing center, control unit, and a display interface, for displaying composited images on the display surface of the computing system.Type: GrantFiled: November 15, 2010Date of Patent: June 17, 2014Assignee: Lucidlogix Software Solutions, Ltd.Inventors: Reuven Bakalash, Offir Remez, Efi Fogel
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Patent number: 8749563Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.Type: GrantFiled: March 18, 2013Date of Patent: June 10, 2014Assignee: ATI Technologies ULCInventors: Laurent Lefebvre, Andrew Gruber, Stephen Morein
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Patent number: 8749568Abstract: A graphics system may include one or more processing units for processing a current display frame, each processing unit including a plurality of parameter registers for storing parameter settings used in processing the current display frame. A parameter buffer in the graphics system may store frame packets, with each frame packet containing information corresponding to parameter settings to be used for at least one display frame. A control circuit coupled to the buffer and to the one or more processing units may retrieve and process a top frame packet from the parameter buffer to update one or more of the parameter registers according to the contents of the top frame packet. The control circuit may issue DMA requests to fill the parameter buffer with frame packets transferred from system memory, where the frame packets may be written by an application (or software) executing on a central processing unit.Type: GrantFiled: January 11, 2010Date of Patent: June 10, 2014Assignee: Apple Inc.Inventors: Joseph P. Bratt, Shing Choo, Peter F. Holland, Timothy J. Millet
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Patent number: 8743122Abstract: A graph exploration module is described which displays graph data (or any data set) using any one of an extensible collection of chart types. Some of the chart types may present aggregated results associated with the graph data. One chart type provides bars which represent aggregations of nodes in the graph data and a collection of links which represent relationships among the bars. The graph exploration module may present the chart in the context of an interactive exploration panel within an exploration canvas. A user can make various selections which prompt the graph exploration module to generate a new exploration panel, together with a link which connects to the new panel to the previous panel. This process can be repeated any number of times to produce one or more exploration paths which reveal a history of exploration actions made by the user(s). That history can be saved and later retrieved.Type: GrantFiled: March 7, 2011Date of Patent: June 3, 2014Assignee: Microsoft CorporationInventors: Nathalie Riche, Bongshin Lee, Cody G. Dunne
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Patent number: 8743105Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.Type: GrantFiled: September 24, 2012Date of Patent: June 3, 2014Assignee: Intel CorporationInventors: Seh W. Kwa, Michael Calyer, Ravi Ranganathan, Narayan Biswal