Abstract: A method and apparatus are provided for implementing seamless error resumption in a shared memory bus structure. Controls and data are stored for each read operation and each write operation. Each read operation and each write operation is monitored to determine when an error has occurred for either a read operation or a write operation. When an error has occurred for the read operation or the write operation, the error is suppressed and the stored controls and data are gated to continue the read operation or the write operation.

Abstract: The present invention provides a data processing apparatus and method for accessing memory. The data processing apparatus has a secure domain and a non-secure domain, in the secure domain the data processing apparatus having access to secure data which is not accessible in the non-secure domain. The data processing apparatus comprises a device coupled via a device bus with the memory, the device being operable, when an item of data in the memory is required by the device, to issue onto the device bus a memory access request pertaining to either the secure domain or the non-secure domain. The memory is operable to store data required by the device, and contains secure memory for storing secure data and non-secure memory for storing non-secure data. In accordance with the invention, the memory access request as issued by the device includes a domain signal identifying whether the memory access request pertains to either the secure domain or the non-secure domain.

Abstract: A storage includes: host interface units; file control processors which receives a file input/output request and translates the file input/output request into a data input/output request; file control memories which store translation control data; groups of disk drives; disk control processors; disk interface units which connect the groups of disk drives and the disk control processors; cache memories; and inter-processor communication units. The storage logically partitions these devices to cause the partitioned devices to operate as two or more virtual NASs.

Abstract: A method of carrying out a data fetch operation for a data-parallel processor such as a SIMD processor is described. The operation is specifically involving the use of a plurality of non-sequential data addresses. The method comprises constructing a linear address vector from the non-sequential addresses, and using the address vector in a block fetch command to a data store.

Abstract: An interface for managing incremental data storage includes a write function that appends an entry to an incremental log, a read function that retrieves a most recent log entry corresponding to a block address, and a snapshot function that automatically partitions the incremental log into an additional volume. The interface may also include a policy assignment function that associates specified policies with explicitly or implicitly specified resources, a read entry function that retrieves sequential entries from the incremental log, and a compact volume function. The provided functions and associated apparatus, method, and system, facilitate management of incremental data including snapshot, remote copy, data compaction, policy management, data restoration, and other operations on data storage devices and systems.

Abstract: A computing system is provided with enhanced data reliability by implementing mirroring and snapshot functionality of the system memory. In the computing system, a processor executes its programs from a first region of a physical memory. Using instructions from the system itself, or from an external console, the first region of the physical memory is periodically mirrored to a second region of the physical memory not used by the processor. This second region can be volatile or nonvolatile memory. The computing system also includes snapshot functionality by which images of the second region of the physical memory are taken at periodic intervals and stored to enable returning the system to a previous state when desired, or in the event of failure.

Abstract: A storage system prevents a time out error of the host I/O caused by a stagnation of command processing in the storage system for accessing a disk device according to the host I/O request and internal I/O request. In DTC, counters for managing the requests in-process for host I/Os (host read) and internal I/Os (pre-fetch, write back) individually are provided, and the number of processing requests to be issued to a virtual disk (RLU) is limited individually. By assigning priority to the host I/Os, the load balance of the host I/Os and internal I/Os can be controlled. For rebuild/copy back, a dedicated load control mechanism is disposed where the load adjustment between ordinary I/Os and rebuild/copy back is performed.

Abstract: Copy-on-write snapshot processing is performed on a storage system in order to produce snapshots of one or more logical volumes in the storage system. The write I/O operations made to the storage system are observed for a certain period of time. Based on the observations an estimate of the size of the storage space required to preserve the snapshot data can be computed. The information can be used to provide sufficient storage space for the snapshot process.

Abstract: A data processing apparatus and method are provided for controlling access to a slave device, the slave device having an address range associated therewith. The apparatus comprises control storage programmable to define a partition identifying a secure region and a non-secure region in the address range, with the data processing apparatus supporting a plurality of modes of operation including a secure mode, and the control storage being programmable only by software executing in the secure mode. A master device is arranged to issue an access request onto a bus, the access request identifying a sequence of addresses within the address range and including a control signal indicating whether the access request is a secure access request or a non-secure access request. The secure region is only accessible by a secure access request.

Abstract: A system and method for managing disk space in a thin-provisioned storage subsystem. If a number of free segments in a free segment pool at a storage subsystem is detected as below a desired minimum, one or more of the following is performed: selecting and adding logical devices (LDEVs) from an internal storage as free segments to the free segment pool, transitioning LDEVs to a virtual device (VDEV), and/or selecting and adding LDEVs from an external storage as free segments to the free segment pool. The transitioning includes identifying partially used or completely used LDEVs and transitioning these to the VDEV. Data migration may also occur by: selecting a source segment at a VDEV for migration, reading data from the source segment, writing the data to a target segment, the target segment being a free segment from the free segment pool, and assigning the target segment to the VDEV.

Abstract: A data processing system includes one or more processing cores, a system memory having multiple rows of data storage, and a memory controller that controls access to the system memory and performs supplier-based memory speculation. The memory controller includes a memory speculation table that stores historical information regarding prior memory accesses. In response to a memory access request, the memory controller directs an access to a selected row in the system memory to service the memory access request. The memory controller speculatively directs that the selected row will continue to be energized following the access based upon the historical information in the memory speculation table, so that access latency of an immediately subsequent memory access is reduced.

Abstract: A storage includes: host interface units; file control processors which receives a file input/output request and translates the file input/output request into a data input/output request; file control memories which store translation control data; groups of disk drives; disk control processors; disk interface units which connect the groups of disk drives and the disk control processors; cache memories; and inter-processor communication units. The storage logically partitions these devices to cause the partitioned devices to operate as two or more virtual NASs.

Abstract: In a non-contact IC card, one block includes 16 bytes as a unit of reading/writing information, and the writing of the information up to 8 blocks which is a maximum simultaneous write size is guaranteed. The structure of a TOC (Table Of Contents) is built on a memory space of the card. When information exceeding the maximum simultaneous write size is written in, single transaction completes the corresponding TOC rewrite so as to prevent contents of the memory from being damaged even if the card is removed from a write device in the middle of writing. When writing data larger than a predetermined size, even if communication between devices is interrupted at any timing, the data consistency can be guaranteed suitably.

Abstract: A SCI controller manages responses and requests between SCI interconnection rings and memory access controllers. The SCI controller includes a request activation queue that stores information about the requests until the SCI rings have the resources to handle the requests. The controller also has a response activation queue that stores information about the responses until the memory access controller is accessible. The queues do not store the request and response packets, but rather store information that is used to construct the request and response packets. The SCI controller also has a contents addressable memory or CAM that checks for an address match between the current requests and responses and previous requests and responses. A table stores more specific information about the previous requests.

Abstract: A control system comprises multiple memories consuming different current amounts for operation, wherein multiple programs corresponding to different functions are stored in the memories, wherein, in accordance with a function to be processed by an operating circuit, one of the programs is read from one of the memories and is processed, and wherein, from a specific memory for which the current consumed during an operation is equal to or smaller than a predetermined amount, the operating circuit reads and executes one of the programs that performs a function for which an operating time period is equal to or greater than a predetermined value.

Abstract: Disclosed are, inter alia, methods, apparatus, data structures, computer-readable medium, mechanisms, and means for merging indications of matching items of multiple groups and possibly associated with skip conditions to identify winning entries of particular use for implementing access control lists. Indications are received typically from an associative memory bank indicating which locations were matched during a lookup operation. Each of the entries is typically associated with one or more hierarchical groups and a skip or no-skip condition. The matching entries are merged to identify one or more wining entries, these being matching entries not in a group that is skipped. A group is typically skipped if the highest priority matching entry of the particular group is associated with a skip condition. A priority encoder can be used to identify a single highest priority winning entry from the winning entries.