Patents Examined by Hung Bui
  • Patent number: 6498731
    Abstract: A protective assembly for electronic components. The protective assembly has a base and a first printed circuit board secured to the base. An electronic component is disposed on the printed circuit board and protected by a rigid member that is also secured to the base. The protective assembly is designed to be mechanically and electrically coupleable to a computer-based system.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: December 24, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Brett D. Roscoe, George D. Megason, Christian H. Post
  • Patent number: 6496376
    Abstract: A set of modules from which custom passive backplanes can be assembled coplanarly couple together and are mounted on a rigid base plate which holds them coupled and coplanar. Each module has a plurality of orthogonally oriented card connectors. Preferably there is a CPU module into which is plugged a CPU card from which an ISA and a PCI originates. On one edge of the CPU module is an connector communicating with the ISA bus. This connector is for chaining together one or more ISA modules, each of which expands the ISA bus to three more ISA connectors. On an opposite edge of the CPU module is an connector communicating with the PCI bus. This connector is for chaining together one or more PCI modules, either 32-bit or 64-bit, each of which expands the PCI bus to three more PCI connectors. Power and ground can be jumpered from module to module or can be directly connected to any module.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: December 17, 2002
    Inventors: John Plunkett, Travis Evans, Mark Perona, Robert Wilson
  • Patent number: 6496383
    Abstract: In an integrated circuit carrier having a large number of power pins allocated to an internal power plane, the current flowing through the power pins may divide very unevenly, and result in current flow through some of the power pins which exceeds the maximum specification for either the package pin or for the socket into which the package may be inserted. In such a package, the magnitude of the current flowing through the highest current power pin may be reduced by configuring the resistance of the power plane(s) and vias to provide approximately the same total resistance to every power pin location. Slots may be cut in a package power plane to alter the current path and raise the impedance of the conduction path between some of the package power pins and the internal contact pads otherwise having the lowest impedance.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: December 17, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Dennis J. Herrell, Thomas J. Hirsch
  • Patent number: 6496381
    Abstract: A contact arrangement for an electrically contactable module that is arranged on a card-shaped carrier, having a first contact bank with a plurality of contact areas, of which at least one is disposed outside of a predefined region. A second contact bank is provided having at least one contact area within the predefined region, and the contact areas of the first contact bank that are arranged outside of the predefined region are in each case electrically connected to contact areas of the second contact bank. Consequently, for example, both chip cards according to ISO 7816 and multimedia card modules can be evaluated by a chip-card reader provided for evaluating ISO-7816 chip cards. At the same time, the ability of the MMC modules to be evaluated by an MMC-module reader provided for that purpose is retained.
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: December 17, 2002
    Assignee: Robert Bosch GmbH
    Inventor: Klaus-Erwin Groeger
  • Patent number: 6496379
    Abstract: A PC board ejector assembly is provided for disengaging a first PC board from a second PC board in a computer chassis. The PC boards each includes at least one connector for connecting the first PC board to the second PC board. The chassis includes a divider wall. The PC board ejector assembly includes a mounting bracket positioned on at least one of the first and the second PC boards, and a disengagement member coupled to the mounting bracket. The mounting bracket is positioned on the PC board such that movement of the disengagement member engages the member against the divider wall to disengage the PC board connectors from one another and permit removal of at least one of the PC boards. A method for disengaging a PC board including a PC board ejector assembly from a chassis is also provided.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: December 17, 2002
    Assignee: Sun Microsystems
    Inventors: Yvetta D. Pols Sandhu, Robert S. Antonuccio
  • Patent number: 6493235
    Abstract: A guide structure and matching printed circuit card carrying cartridge provides hot pluggability functionality even when electronic circuit components need to be disposed in very tight spaces. The guide structure includes front and rear portions linked by slot-defining rungs. Front and rear apertures provide alignment and/or locking functions. The guide structure is easily manufacturable from a single sheet of metal which is stamped and formed to meet all desirable design specifications. A matching self-contained docking cartridge is provided with mating parts for these apertures. EMI shielding and cooling functions are also accommodated.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: December 10, 2002
    Assignee: International Business Machines Corporation
    Inventors: Dennis R. Barringer, Budy D. Notohardjono, Edward J. Seminaro, Harold M. Toffler
  • Patent number: 6490173
    Abstract: An apparatus and method for shielding electrical components mounted on a printed circuit board (PCB) from electromagnetic and radio frequency interference by reducing the dissipation of heat away from solder joints. In an embodiment of the invention a radio frequency (RF) shield for a printed circuit board comprises a shield for RF shielding a portion of the PCB having electronic components mounted thereon. The shield has a first portion and a second portion, wherein the first portion has a reduced cross sectional area, for reducing heat conduction between the first and the second portion when the first portion of the shield is inserted into a first plurality of holes in the PCB, for soldering the first portion of the shield to a copper foil of the PCB.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: December 3, 2002
    Assignee: Thomson Licensing, S.A.
    Inventors: Russell Wayne Perkins, Mark Alan Yoder, Christopher Day States, Theodore Paul Corbin
  • Patent number: 6490170
    Abstract: According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 &mgr;m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 &mgr;m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: December 3, 2002
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Yoji Mori
  • Patent number: 6490163
    Abstract: A portable data storage device includes a main circuit board, a stack of memory circuit boards mounted on the main circuit board, and a USB port pivoted to one end of the main circuit board and adapted to electrically connect the main circuit board to, for example, the USB port of a personal computer at one of a series of angular positions.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: December 3, 2002
    Assignee: Phison Electronic Corp.
    Inventors: Khein-Seng Pua, Chien An Chen, Yu-Fong Lin, Chee-Kong Awyong
  • Patent number: 6487085
    Abstract: A miniaturized high-frequency module includes an integrated circuit and chip capacitors electrically connected therewith within a recess in a substrate and to make a crystal oscillator and the substrate virtually equal in size. Thereby, a miniaturized high-frequency module can be obtained.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: November 26, 2002
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Junichi Kimura, Ryouji Mitsuzono, Terumoto Akatsuka
  • Patent number: 6487086
    Abstract: A memory module (10) having a module bus line (15) that can be electrically connected to a main board bus line (22) by a contact terminal (12). Main board bus line (22) can be discontinuous at a module socket. Module bus line (15) can be configured on a front and back side of memory module (10) and electrically connected to the discontinued main board bus line (22) by contact terminals (12) configured on both sides of memory module (10). The front and back side module bus lines (15) can be electrically connected by a module bus through wiring (19′). Characteristic impedance matching between the main board and memory module (10) may be improved.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: November 26, 2002
    Assignee: NEC Corporation
    Inventor: Hiroaki Ikeda
  • Patent number: 6487088
    Abstract: According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 &mgr;m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 &mgr;m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: November 26, 2002
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Yoji Mori
  • Patent number: 6487091
    Abstract: A technique for supplying power and data signals to panel-mounted components includes distribution of power and data conductors in a trunk wireway and further distribution to component locations via drop cable assemblies disposed in drop wireways. The drop cable assemblies and trunk cable assemblies may include identical cable. The cables have a plurality of parallel conductors in an insulated jacket. Connectors are mounted on the drop cable assemblies for receiving plug-in component cable assemblies routed to individual components mounted within component panels or bays. The components are thus electrically coupled in parallel with one another and may receive both power and data signals via the drop and trunk cable assemblies coupled to a network. Individual components may be independent installed and removed for servicing with interrupting service to upstream or downstream components in the system.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: November 26, 2002
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Chester Malkowski, Jr., G. Erich Heberlein, Jr., Steven J. Litzau
  • Patent number: 6483714
    Abstract: A multilayered wiring board comprising a first stacked structure consisting essentially of a first insulating layer having a first parallel conductor array and a second insulating layer formed thereon, having a second parallel conductor array oriented orthogonal to the first parallel conductor array, the first and second parallel conductor arrays being electrically interconnected by a first through conductor array; and a second stacked structure consisting essentially of a third insulating layer having a third parallel conductor array crossing at an angle of 30 to 60 degrees to the first parallel conductor array and a fourth insulating layer formed on top of the third insulating layer, having a fourth parallel conductor array orthogonal to the third parallel conductor array, the third and fourth parallel conductor arrays being electrically interconnected by a second through conductor array, wherein the second stacked structure is overlaid on the first stacked structure by interposing therebetween an intermedi
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: November 19, 2002
    Assignee: Kyocera Corporation
    Inventors: Masanao Kabumoto, Yoshihiro Nabe, Masaru Nomoto, Shigeto Takeda
  • Patent number: 6483720
    Abstract: A method and implementing electronic tri-plate connection system are provided including a nested set of RF Faraday cages within the system with integrated circuit packages containing the core drivers and receivers as the innermost Faraday cage, and additional Faraday cages being implemented at each outward level through card, board, backplane and unit level and into the network level. There is no distinction between power ground, signal ground or shield ground. All grounds throughout the system are at the same level and all package ground levels are interconnected.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: November 19, 2002
    Assignee: International Business Machines Corporation
    Inventors: Patrick H. Buffet, Paul Lee Clouser, Danny Marvin Neal
  • Patent number: 6480395
    Abstract: A printed circuit board (PCB) includes a first layer having first and second surfaces, with an above-board device mounted thereon. The PCB includes a second layer having third and fourth surfaces. One of the surfaces can include a recessed portion for securedly holding an interstitial component. A via, electrically connecting the PCB layers, is also coupled to a lead of the interstitial component.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: November 12, 2002
    Assignee: Hewlett-Packard Company
    Inventor: Dale R. Kopf
  • Patent number: 6480392
    Abstract: The present invention provides a retaining and fixing structure of interface card comprising an integrally formed retaining structure. The retaining structure is fixedly disposed on a leaf. One side of the leaf forms a pivot, which can be pivotally joined with a pivotal portion inside a computer housing. The retaining structure has a first press device thereon. A connection unit is also provided. The retaining structure can be joined with the connection unit, which has a second press device thereon. The second press device can control a resilient device. The first and second press devices can be used to let the retaining structure and the connection unit be quickly unlocked or joined together, hence facilitating maintenance, replacement, or expansion of interface card inside a mainframe for a user.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: November 12, 2002
    Assignee: Lite-On Enclosure Inc.
    Inventor: Yue-Wen Jiang
  • Patent number: 6477057
    Abstract: A method and implementing computer system are provided in which de-coupling capacitors are used at driver and receiver sources, and defined gaps are created separating power and ground areas on a voltage reference plane of a circuit board. Short-circuit via connections are also provided through one or more vias between spatially separated circuit board layers. Each driver or receiver module includes the driver or receiver along with an associated gap, capacitor and via connections to VDD and ground planes, all included within a defined proximity to effectively block switching energy and/or VDD noise from entering the tri-plate ground-to-ground reference system. In a related exemplary construction, signal lines are placed at predetermined positions between ground planes to provide a tri-plate circuit board structure for transmitting logic signals from a driver to one or more receivers.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: November 5, 2002
    Assignee: International Business Machines Corporation
    Inventors: Patrick H. Buffet, Paul Lee Clouser, Danny Marvin Neal
  • Patent number: 6477058
    Abstract: An integrated circuit device package in accordance with the invention comprises a first land grid array (LGA) interposer socket positioned between, and in communication with, an LGA integrated circuit device and a first side of a first circuit board; a second LGA interposer socket positioned between, and in communication with, a second circuit board and a second side of the first circuit board, wherein the second side of the first circuit board is opposite to and parallel with the first side of the first circuit board; and a clamping mechanism for compressively urging together the LGA integrated circuit device, the first LGA interposer socket, the first circuit board, the second LGA interposer socket, and the second circuit board into electrical interconnection under a predetermined load.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: November 5, 2002
    Assignee: Hewlett-Packard Company
    Inventors: Richard J Luebs, Jonathan W Craig, Jeffrey L. Deeney, David W. Peters
  • Patent number: 6477056
    Abstract: Optoelectric mounting and interconnect apparatus includes housing designed to be engaged in receiving equipment. An optoelectric module is mounted in the housing and includes a ferrule with a lens assembly engaged in the ferrule along the optical axis. One end of the ferrule is formed to receive an optical fiber positioned adjacent the lens assembly and an optoelectric device is affixed to a second end of the ferrule so that light traveling along the optical axis appears at the optoelectric device. A printed circuit board is attached to the housing and electrically coupled to the optoelectric device and has external equipment connections and at least one ground potential connection. A metal can surrounds the module and the printed circuit board so as to extend from receiving equipment to external equipment.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: November 5, 2002
    Inventors: Phillip J. Edwards, Joseph John Vandenberg