Patents Examined by Ishwarbhai B. Patel
  • Patent number: 11011457
    Abstract: A wiring substrate includes a first insulation layer containing insulating resin, a first through hole passing through the first insulation layer is the thickness direction, a pad formed within the first through hole, a second insulation layer containing insulating resin and laminated on a first surface of the first insulation layer, and a first wiring layer provided on the second insulation layer and connecting to the pad. A connecting surface of the pad that connects the first wiring layer includes a curved surface that curves in a protruding shape toward the first surface of the first insulation layer.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: May 18, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Koichi Nishimura, Noriyoshi Shimizu, Jun Furuichi
  • Patent number: 11013111
    Abstract: An electronic device includes a first substrate, a first conductive layer, a plurality of first electrode pads, a plurality of first light-emitting units, a plurality of first signal pads and a conductive structure. The first conductive layer is disposed on the first substrate. The first electrode pads are disposed on the first conductive layer. The first light-emitting units overlap and are disposed on the first electrode pads. The first light-emitting units are electrically connected to the first electrode pads respectively. The first signal pads are disposed on the first conductive layer and electrically connected to the first conductive layer. The conductive structure is disposed on the first signal pads, and at least two of the first signal pads are electrically connected to each other through the conductive structure.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: May 18, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Wen-Chang Tsai, Li-Wei Mao, Ming-Chun Tseng, Chi-Liang Chang, Yi-Hua Hsu, Meng-Chieh Cheng
  • Patent number: 10999928
    Abstract: A circuit board electrically connected to a chip includes a substrate and a circuit layer. A first conductive line of the circuit layer includes a main line and a branch lead connected with each other. The branch lead provided to increase lead quantity for bonding with the chip includes an extension part and a bonding part which is used for bonding a bump of the chip. During thermal compression, gaps existing between the extension part and the main line and between the bonding part and the main line can prevent solder on the main line from flowing toward the bump and overflowing from the branch lead.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: May 4, 2021
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 10999927
    Abstract: A ceramic substrate according to the present disclosure includes a plurality of electrodes on an electronic component mounting surface, and one or more interelectrode wires that connect the electrodes to each other on the electronic component mounting surface. A resist that extends across the interelectrode wire is disposed on the electronic component mounting surface.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: May 4, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yosuke Mino
  • Patent number: 10993329
    Abstract: A first board includes a first insulating substrate including a first main surface, a first electrode pad, and a first resist film. The first electrode pad is a conductor pattern provided on the first main surface. The first resist film is provided on the first main surface and is located closer to the first electrode pad than any conductor provided on the first main surface. The first resist film is spaced away from the first electrode pad with a gap provided between the first resist film and the first electrode pad. The first resist film is thicker than the first electrode pad.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: April 27, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kuniaki Yosui, Daisuke Tonaru, Hideyuki Taguchi, Genro Kato
  • Patent number: 10993322
    Abstract: A circuit board includes: an insulating layer having at least a part formed of an insulating resin; and an electrode pad embedded in the insulating layer and having a neck formed on an outer side surface, the neck being held in contact with the insulating resin of the insulating layer. The electrode pad includes: a first conductor layer having an end surface exposed from one surface of the insulating layer; and a second conductor layer formed on the first conductor layer and having a grain boundary density different from a grain boundary density of the first conductor layer. The neck is formed in a region of the outer side surface, the region corresponding to a boundary part between the first conductor layer and the second conductor layer.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: April 27, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Keigo Sato, Hiroshi Taneda, Noriyoshi Shimizu
  • Patent number: 10984949
    Abstract: A resin molded substrate has at least a pair of terminal through holes for allowing lead terminals of a cylindrical capacitor to be inserted through, and at least one protrusion for supporting a side of a bottom portion of the capacitor so as to space from a front surface of the substrate the side of the bottom portion of the capacitor having the lead terminals inserted through the terminal through holes. The pair of lead terminals at the bottom portion are inserted through the terminal through holes of the resin molded substrate, whereby the capacitor is mounted in an upright state with a solder, so that the protrusion spaces the side of the bottom portion from the front surface of the resin molded substrate.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: April 20, 2021
    Assignee: FANUC CORPORATION
    Inventors: Yuuki Inoue, Masaya Tateda
  • Patent number: 10980113
    Abstract: A circuit board structure that includes a resin-based conductive adhesive layer is disclosed, in which a conductive layer is arranged between a first circuit board and a second circuit board. The conductive layer includes a first conductive paste layer and the resin-based conductive adhesive layer is formed on the first conductive paste layer. The resin-based conductive adhesive layer contains a sticky resin material and a plurality of conductive particles distributed in the sticky resin material. The plurality of conductive particles establish an electrical connection between the first conductive paste layer and the resin-based conductive adhesive layer.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: April 13, 2021
    Assignee: Advanced Flexible Circuits Co., Ltd.
    Inventors: Kuo-Fu Su, Chih-Heng Chuo, Gwun-Jin Lin
  • Patent number: 10980124
    Abstract: A multilayer electronic component includes a multilayer capacitor including a capacitor body in which internal electrodes are stacked to be parallel with respect to a mounting surface and external electrodes disposed on opposing end surfaces of the capacitor body, respectively, and a metal frame having a solder pocket and including a vertical portion, an upper horizontal portion extending from an upper end of the vertical portion, and a lower horizontal portion extending from a lower end of the vertical portion, the upper horizontal portion connected to an upper band portion of each of the external electrodes. 0.1?G/CT?0.7 is satisfied, in which CT is a height of the vertical portion and G is a distance between the lower band portion of each of the external electrodes and a lower end of the metal frame.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: April 13, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Heung Kil Park, Gu Won Ji, Se Hun Park
  • Patent number: 10980114
    Abstract: A printed circuit board according to one embodiment of the present invention is a printed circuit board including a plate-shaped or a sheet-shaped insulating material having a penetrating hole, and a metal plating layer layered on both surfaces of the insulating material and an inner peripheral surface of the insulating material, wherein an inner diameter of the penetrating hole monotonically decreases from a top surface of the insulating material toward a back surface, and wherein the inner diameter of the penetrating hole at a center in a thickness direction of the insulating material is smaller than an average of an opening diameter on the top side and an opening diameter on the back side.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: April 13, 2021
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Eiko Imazaki, Koji Nitta, Kousuke Miura, Shoichiro Sakai, Kenji Takahashi, Masahiro Matsumoto, Hirohisa Saito
  • Patent number: 10950985
    Abstract: The invention relates to a shield connection element for a printed circuit board, comprising a contact part with a central flat soldering section for soldering onto a printed circuit board, and two crimping sections adjacent thereto, of which at least one is designed for connection to a cable shield of a cable.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: March 16, 2021
    Assignee: Amphenol-Tuchel Electronics GmbH
    Inventors: Christian Ungerer, Wolfgang Kerner, Manuel Obel, Peter Oberhammer
  • Patent number: 10945338
    Abstract: A wiring substrate includes a substrate with a first principal face and a second principal face. The first principal face has a first corner and first and second sides. The second principal face has a second corner corresponding to the first corner, and a third and a fourth side, respectively corresponding to the first and second sides. The substrate further comprising a first side surface connected to the first side, a second side surface connected to the second side, a third side surface connected to the third side, a fourth side surface connected to the fourth side, a first fracture part located between the first and third side surfaces to connect them, and a second fracture part located between the second and the fourth side surfaces to connect them. In the substrate's thickness direction, the length of the second side surface is smaller than the first side surface.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: March 9, 2021
    Assignee: Kyocera Corporation
    Inventor: Yoshitomo Onitsuka
  • Patent number: 10945335
    Abstract: Apparatuses and methods related to the field of microchip assembly and handling, in particular to devices and methods for assembling and handling microchips manufactured with solid edge-to-edge interconnects, such as Quilt Packaging® interconnect technology. Specialized assembly tools are configured to pick up one or more microchips, place the microchips in a specified location aligned to a substrate, package, or another microchip, and facilitate electrical contact through one of a variety of approaches, including solder reflow. This specialized assembly tooling performs heating functions to reflow solder to establish electrical and mechanical interconnections between multiple microchips. Additionally, the interconnected microchips may be arranged in an arbitrarily large array.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: March 9, 2021
    Assignee: Indiana Integrated Circuits, LLC
    Inventors: Jason M. Kulick, Tian Lu
  • Patent number: 10912189
    Abstract: A circuit board is provided. The circuit board includes a first pin row, a second pin row and a plurality of signal vias. The first pin row includes a first side and a second side, wherein the first side of the first pin row and the second side of the first pin row are opposite to each other. The second pin row includes a first side and a second side, wherein the first side of the second pin row and the second side of the second pin row are opposite to each other. A plurality of traces of the circuit board are electrically connected to a plurality of pins of the first pin row and a plurality of pins of the second pin row respectively through the signal vias. Three consecutive signal vias of the signal vias are sequentially disposed at the first side of the first pin row, the first side of the second pin row, and the second side of the first pin row.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: February 2, 2021
    Assignee: PEGATRON CORPORATION
    Inventor: Te-Yu Liao
  • Patent number: 10905003
    Abstract: The present invention relates generally to electric circuit testing, building, or implementing using a breadboard-style printed circuit board (PCB). Aspects of the present invention include eliminating the need to use hookup wires when building and testing electric circuits on PCBs. In one or more embodiments, a PCB system having rows and columns of signal tie points connected in a breadboard layout and using an embedded wire and a solder bridge to form partial connections between signal tie points may be built. In one or more embodiments, an embedded wire and solder bridge is capable of connecting a column of signal tie points, and/or an embedded wire and solder bridge is capable of connecting a power rail to a signal tie point. Thus, a circuit may be implemented and tested by applying a small amount of solder to the solder bridge without the need for hookup wire.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: January 26, 2021
    Inventor: Samuel P Kho
  • Patent number: 10897816
    Abstract: A rigid-flex circuit board includes a core substrate, a first adhesive layer, and a first outer conductive circuit layer. The core substrate includes a first and a second base layer, a first and a second conductive circuit layer respectively on the first and second base layer, and an insulating layer between the first and second base layer. The first and second conductive circuit layer are embedded in the insulating layer. The first adhesive layer is on the first base layer and defines a first opening which exposes the first opening. The first outer conductive circuit layer is on the first adhesive layer and defines an opening aligned with the first opening. A portion of the core substrate located within the first opening is defined as a flexible board section, and the portions of the core substrate located outside of the first opening are defined as a hard board section.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: January 19, 2021
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Tzu-Chien Yeh, Lin-Jie Gao
  • Patent number: 10893601
    Abstract: This heat dissipation circuit board includes a metal substrate, an insulating layer provided on at least one of the surfaces of the metal substrate, and a circuit layer provided on the opposite surface to the metal substrate of the insulating layer. The insulating layer contains a resin that is selected from polyimide, polyamide-imide, and the mixture thereof, and ceramic particles having a specific surface area of 10 m2/g or more. The ceramic particles form agglomerates, and the amount of the ceramic particles is in the range of 5 vol % or more and 60 vol % or less.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: January 12, 2021
    Assignee: MITSUBISHI MATERIALS CORPORATION
    Inventors: Fumiaki Ishikawa, Kazuhiko Yamasaki
  • Patent number: 10892568
    Abstract: A connection assembly generally comprising a thick conductor piece including a receptacle with an inner wall and a thin conductor piece. The thin conductor piece has a protrusion for insertion into the receptacle. A press-fit element can be inserted into the receptacle with the protrusion arranged in the receptacle between the press-fit element and the thick conductor piece.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: January 12, 2021
    Assignee: TE Connectivity Germany GmbH
    Inventor: Tran-Son Don
  • Patent number: 10887983
    Abstract: A printed circuit board includes a circuit layer and a ground layer disposed above the circuit layer. The ground layer includes ground layer sections each having metal members, arranged in parallel in one direction on a plane. Areas of the metal members of adjacent ground layer sections are different from each other. The areas of the metal members are determined based on respective areas of circuits of the circuit layer corresponding to respective ground layer sections.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: January 5, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sung-Jun Lim, Seong-Hwan Park, Kyung-Ho Lee, Kyung-Moon Jung, Chul-Kyu Kim
  • Patent number: 10869389
    Abstract: A printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, a conductive pattern that is stacked on at least one surface side of the base film and that includes a plurality of wiring portions arranged adjacent to one another, and an insulating layer that covers outer surfaces of the base film and the conductive pattern. The plurality of wiring portions have an average spacing of 1 ?m or more and 20 ?m or less and an average height of 30 ?m or more and 120 ?m or less. A filling area ratio of the insulating layer between the plurality of wiring portions adjacent to one another in sectional view is 95% or more.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: December 15, 2020
    Assignee: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kohei Okamoto, Yoshihito Yamaguchi, Kousuke Miura, Hiroshi Ueda, Atsushi Kimura