Patents Examined by J. Dudek
  • Patent number: 11966597
    Abstract: A data service implements a configurable data compressor/decompressor using a recipe generated for a particular data set type and using compression operators of a common registry (e.g., pantry) that are referenced by the recipe, wherein the recipe indicates at which nodes of a compression graph respective ones of the compression operators of the registry are to be implemented. The configurable data compressor/decompressor provides a customizable framework for compressing data sets of different types (e.g., belonging to different data domains) using a common compressor/decompressor implemented using a common set of compression operators.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: April 23, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Dmitri Pavlichin, Shubham Chandak, Itschak Weissman, Christopher George Burgess
  • Patent number: 11960393
    Abstract: A flash device includes user storage space for storing user data and over provisioning space for garbage collection within the flash device. The flash device receives an operation instruction, and then performs an operation on user data stored in the user storage space based on the operation instruction. Further, the flash device identifies a changed size of user data after performing the operation. Based on the changed size of data, a target adjustment parameter is identified. Further, the flash device adjusts the capacity of the over provisioning space according to the target adjustment parameter.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: April 16, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jianhua Zhou, Po Zhang
  • Patent number: 11960412
    Abstract: A method for managing data in a NAND flash storage system is provided. The method includes one or more of receiving an empty data segment directive at a storage controller, returning a data string including data of a predetermined logic level in response to a read command requesting to read data associated with a logical identifier included in the empty data segment directive, maintaining an index of mapping between the logical identifier and a physical storage location, updating the index to indicate data at the physical storage location does not need to be preserved, monitoring one or more physical storage locations, including the physical storage location, to determine a percentage of the one or more physical storage locations that do not need to be preserved, and initiating garbage collection on the one or more physical storage locations in response to the percentage reaching a threshold. The empty data segment directive includes a logical identifier associated with the physical storage location.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: April 16, 2024
    Inventors: David Flynn, Jonathan Thatcher, Michael Zappe
  • Patent number: 11960724
    Abstract: A device for detecting zone parallelity includes a detection control circuit configured to generate respective first and second requests for first and second zones among a plurality of zones included in a solid state drive (SSD). An SSD controller is configured to control the SSD by generating a first command and a second command corresponding to the first request and the second request, respectively, and to schedule the first command and the second command. The detection control circuit determines zone parallelity of the first and second zones using response characteristics of the responses of the SSD to the first request and the second request. The response characteristics may include a latency of a response.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: April 16, 2024
    Assignees: SK hynix Inc., Industry-Academic Cooperation Foundation, Dankook University
    Inventors: Jongmoo Choi, Myunghoon Oh
  • Patent number: 11954348
    Abstract: Techniques are provided for combining data block and checksum block I/O into a single I/O operation. Many storage systems utilize checksums to verify the integrity of data blocks stored within storage devices managed by a storage stack. However, when a storage system reads a data block from a storage device, a corresponding checksum must also be read to verify integrity of the data in the data block. This results in increased latency because two read operations are being processed through the storage stack and are being executed upon the storage device. To reduce this latency and improve I/O operations per second, a single combined I/O operation corresponding to a contiguous range of blocks including the data block and the checksum block is processed through the storage stack instead of two separate I/O operations. Additionally, I/O operation may be combined into a single request that is executed upon the storage device.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: April 9, 2024
    Assignee: NetApp, Inc.
    Inventors: James Alastair Taylor, Suhas Girish Urkude
  • Patent number: 11947830
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive key value (KV) pair data, group a plurality of KV pair data based on a data clustering value, aggregate the grouped plurality of KV pair data, and program the aggregated plurality of KV pair data to the memory device. A length of the KV pair data is less than a size of a flash management unit (FMU). The KV pair data includes a key and a value. Each KV pair data of the plurality of KV pair data has a length less than the size of the FMU. The received KV pair data is stored in a temporary location and grouped together in the temporary location. The grouping is based on a similarity of characteristics of plurality of KV pair data.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: April 2, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: David Avraham, Alexander Bazarsky, Ran Zamir
  • Patent number: 11947812
    Abstract: A system including: one or more processors; a memory storing instructions that, when executed by the one or more processors are configured to cause the system to: receive a plurality of user names and a plurality of anonymized user identifiers; receive a plurality of user attributes associated with one or more users of the plurality of users; receive a first plurality of hash values that uniquely identify an association between each user attribute and one or more users; receive a first request for a listing of user names associated with a first user attribute; receive a first secret key; generate a second plurality of hash values; determine a first subset of the first plurality of hash values that match the second plurality of hash values; generate a first graphical user interface including the listing of user names; and transmit the first graphical user interface to the first user device.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: April 2, 2024
    Assignee: CAPITAL ONE SERVICES, LLC
    Inventors: Carla S. Erb, Sheel Shah, James E. Deaver, II, Caleb J. Cockrill, Aaron Woodard, Samantha Bennett, Christopher Halima, Andrew Moore, Daniel Hazeley
  • Patent number: 11941264
    Abstract: A data storage apparatus with a variable computer file system is disclosed. The variable computer file system adopts the concept of a dedicated sub-file system and is activated or deactivated according to whether authentication is granted. Each dedicated sub-file system is activated or deactivated according to whether authentication is granted, and is recognized by a host computer. Deactivated dedicated sub-file systems cannot be recognized or accessed by the host computer. Accordingly, since a third party accessing the host computer cannot access a dedicated sub-file system without possessing a means for activating the dedicated sub-file system, security is greatly strengthened.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: March 26, 2024
    Inventor: Deok Woo Kim
  • Patent number: 11941258
    Abstract: A system includes a memory device, and a processing device, operatively coupled with the memory device, to perform operations including detecting a failure of a key-value store, identifying a non-filled zone of the memory device resulting from the failure, wherein the non-filled zone stores, in the key-value store, at least one of: an uncommitted key block or an uncommitted value block, and recovering the non-filled zone to obtain a recovered zone.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Pierre Labat, Nabeel Meeramohideen Mohamed, Steven Moyer
  • Patent number: 11941270
    Abstract: A data storage device includes a non-volatile memory device having a number of memory dies. The data storage device further includes a controller. The controller is configured to poll each of the memory dies at a first predetermined rate for a thermal status bit and determine whether the thermal status bit of at least one memory die of the number of memory dies is an active thermal status bit activated. The controller is further configured to reduce the operating performance of the at least one memory die in response to determining that the thermal status bit of the at least one memory die of the plurality of memory dies is the active thermal status bit.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: March 26, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventor: Niles Yang
  • Patent number: 11934680
    Abstract: Embodiments of the systems and methods disclosed herein includes a NAND flash memory having a boot volume. The boot volume can include a primary boot partition, a secondary boot partition, and a rootdisk partition. The primary boot partition can be configured to receive a kernel component of a file. The secondary boot partition can be configured to receive a copy of the kernel component of the file. The rootdisk partition can be configured to receive a root filesystem of the file.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: March 19, 2024
    Assignee: ARRIS Enterprises LLC
    Inventors: Walter H. Anderes, Richard P. Rementilla, David L. Berger
  • Patent number: 11934321
    Abstract: A memory management method is provided, which includes assigning separate virtual addresses to processes in user space, include to a file system configured to read/write to persistent storage. Virtual memory objects (VMOs) are created in user space that are backed by a user space pager service. Such objects including pages representing a file associated with information maintained in persistent storage. A pager manages reading/writing to persistent storage. The pager populates pages for a given VMO using data retrieved from persistent storage. Upon populating the pages, a state of the VMO is set to a clean state. Upon writing to the pages, the state of the VMO is set to a dirty state. Upon initiating writing back to persistent storage, the state of the VMO is set to an awaiting clean state. Upon ending the writing back, the state of the VMO is set to clean.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: March 19, 2024
    Assignee: GOOGLE LLC
    Inventors: Rasha Eqbal, Adrian Danis, Christopher James Suter
  • Patent number: 11934679
    Abstract: A method, computer program product, and computing system for dividing a volume into a plurality of segments. The plurality of segments may be assigned to a plurality of nodes of a multi-node storage system. One or more input/output (IO) request paths for accessing the plurality of segments may be defined based upon, at least in part, assigning the plurality of segments to the plurality of nodes.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: March 19, 2024
    Assignee: EMC IP Holding Company, LLC
    Inventors: David Meiri, Vinay G. Rao, Sanjib Mallick
  • Patent number: 11928337
    Abstract: A method for managing a data record in a computer system comprises: at least one computing server for hosting a computer session running with an operating system having a deduplication index and managing access to a session storage space; a shared storage space; an administration server for administering the shared storage space, executing a data management program; the computer session executing an interception program implementing the following steps: intercepting a read call to read at least one data record transmitted in the session; accessing the deduplication index and determining whether the data record is recorded in the shared storage space; if so, reading, from the deduplication index, the address of the data record in the shared storage space and redirecting the read call to this address; if not, overlooking the read call so that it is processed by the operating system.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: March 12, 2024
    Assignee: SHADOW
    Inventor: Arnaud Lamy
  • Patent number: 11928340
    Abstract: Apparatus and methods for managing data in a computer system are disclosed. An example apparatus is to at least: facilitate storage of first subsidiary data, the first subsidiary data representing information related to a customer account; facilitate storage of second subsidiary data, the second subsidiary data representing at least a portion of the information related to the customer account; determine a geographic location of a computing device that is remote to the data storage device; determine whether the geographic location of the computing device satisfies a predefined criterion; and, when the geographic location of the computing device satisfies the predefined criterion, change the first subsidiary data and change the second subsidiary data.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 12, 2024
    Assignee: PointsBet Pty Ltd.
    Inventor: Manjit Gombra Singh
  • Patent number: 11928358
    Abstract: A command management method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: obtaining a plurality of commands from a memory of a host system; storing the commands in a first buffer region of the memory storage device; in response to a first command and a second command meeting a pairing condition in the first buffer region, putting the first command and the second command in the first buffer region in a first command queue of the memory storage device; and continuously executing the first command and the second command in the first command queue.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: March 12, 2024
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Ming-Hui Tseng
  • Patent number: 11922068
    Abstract: A Near Memory Processing (NMP) Dual In-line Memory Module (DIMM) is provided that includes random access memory (RAM), a Near-Memory-Processing (NMP) circuit and a first control port. The NMP circuit is for receiving a command from a host system, determining an operation to be performed on the RAM in response to the command, and a location of data within the RAM with respect to the determined operation. The first control port interacts with a second control port of the host system to enable the NMP circuit to exchange control information with the host system in response to the received command.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 5, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eldho Mathew Pathiyakkara Thombra, Ravi Shankar Venkata Jonnalagadda, Prashant Vishwanath Mahendrakar, Jinin So, Jong-Geon Lee, Vishnu Charan Thummala
  • Patent number: 11921908
    Abstract: A method of volume compressed header identification includes reading, by a processing device of a host, compressible data on a sector of a storage volume of a storage array. The method further includes compressing the compressible data to generate compressed data for the sector. The method further includes adding, by the processing device of the host, metadata associated with the storage volume to the compressed data. The method further includes writing the compressed data, including the added metadata, to the sector of the storage volume of the storage array.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: March 5, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Yuval Frandzel, Kiron Vijayasankar, Alexandre Xavier Duchateau, Constantine P. Sapuntzakis
  • Patent number: 11914861
    Abstract: Adjusting storage capacity in a computing system that includes a computing device configured to send access requests to a storage device characterized by a first storage capacity, including: reducing data; determining, in dependence upon an amount of storage capacity saved by reducing the data, an updated storage capacity for the storage device; and exporting an updated storage capacity to the computing device.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: February 27, 2024
    Assignee: PURE STORAGE, INC.
    Inventor: John Colgrove
  • Patent number: 11914871
    Abstract: An electronic control device includes a nonvolatile memory having allocated two storage areas that are exclusively switchable between an active state and an inactive state, the two storage areas being set such that in a state in which a program is written in the storage area in the active state, a program is written for updating to the storage area in the inactive state in response to an instruction from an external device, followed by switching the storage area in the active state to the inactive state and switching the storage area in the inactive state to the active state. In the electronic control device, when the program written in the storage area in the active state differs from the program written in the storage area in the inactive state, the program written in the storage area switched to the active state is copied to the storage area in the inactive state.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: February 27, 2024
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Motoki Tatsumi, Mayumi Maeda, Toshihisa Arai