Abstract: A development application leverages the programmability of shader execution units in the graphics processing subsystem to make graphics processing subsystem state data accessible to applications executed outside the graphics processing subsystem. The development application modifies shaders to include state output instructions adapted to direct a shader execution unit to copy graphics processing subsystem state data to a location in the computer system that is accessible to applications executed outside of the graphics processing subsystem. Following the execution of the state output instructions, the shader execution unit can be halted or can continue executing the shader. The development application can modify the shader to include state restoration instructions adapted to direct the shader execution unit to set state data of the graphics processing subsystem to previous or new values.

Abstract: Embodiments described herein provide a programmable mapping scheme for mapping information to resources of a system. In an embodiment, a programmable lattice method operates to map information to resources of a system. For example, the programmable lattice method can be used to map pixel data to graphics processing resources of a graphics processing system. In another embodiment, a programmable hybrid method operates to map information to resources of a system. For example, the programmable hybrid method can be used to map pixel data to graphics processing resources of a graphics processing system. The mapping methods described are applicable to any multi-dimensional array processing (e.g., 2D and 3D). The methods provide a uniform distribution of resources and tend to reduce resource collisions when allocating information to a resource.

Abstract: Systems and methods for graphics data management are described. One embodiment includes a method for reducing bank collisions within a level 2 (L2) cache comprising the following: reading texture data from external memory configured to store texture data used for texture filtering within the graphics processing unit, partitioning the texture data into banks, performing a bank swizzle operation on the banks, and writing the banks of data to the L2 cache.

Abstract: A method of displaying a computer application comprising a plurality of objects within an initially transparent application window comprises creating an animated content window below the application window for each animated content object of the computer application and directing the player responsible for playing the animated content object to draw the animated content directly therein. The objects of the computer application are examined and a clipping mask for each animated content object corresponding generally to the animated content window created therefor is defined. Starting from bottom to top, an object from the list is selected. If the selected object is not an animated content object, the object is drawn within the application window except in areas corresponding to the clipping masks.

Abstract: An image pipeline performs image processing operations (for example, Bayer-to-RGB conversion, white balancing, autoexposure, autofocus, color correction, gamma correction, zooming, unsharp masking, mirroring, resizing, color space conversion) on tiles whose sizes are varied, whose widths are less than the width of the output image frame being generated, and whose heights are less than the height of the output image frame. A tile processor program executing on a processor in the camera determines configuration information for configuring each pipeline stage based on user input and camera usage. The configuration information is determined so that the pipeline outputs properly combine to form the output image frame. The sizes, shapes, locations and processing order of the tiles are determined such that a single tile of a particular size is in a desired location with respect to the overall image frame, thereby facilitating such functions as autofocus, autoexposure and face detection.

Abstract: A computer-implemented method for image registration includes accepting a three-dimensional (3-D) image of an organ. The image includes a first plurality of image points with respective image coordinates. A map defining a distribution of values of a physiological parameter over the organ is accepted. The map includes a second plurality of map points with respective map coordinates. Confidence levels are associated with one or more of the map coordinates and image coordinates. Weights are assigned to at least some of the map points and image points responsively to the confidence levels of the respective map coordinates and image coordinates. The 3-D image is fitted with the map by calculating a geometrical transformation between the map coordinates and the image coordinates based on the weights.

Abstract: In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an I2C data bus each coupled to a host device, a method of transferring EDID from the memory device over the I2C data bus to a requesting one of the data ports while servicing a processor memory access request without clock stretching.

Abstract: Systems and methods that independently control divided and/or isolated processing resources of a Graphical Processing Unit (GPU). Synchronization primitives for processing are shared among such resources to process interaction with the engines and their associated different requirements (e.g. different language). Accordingly, independent threads can be created against particular nodes (e.g., a video engine node, 3D engine node), wherein multiple engines can exist under a single node, and independent control can subsequently be exerted upon the plurality of engines associated with the GPU.

Abstract: A plurality of vertex or fragment processors on a graphics processor perform computations. Each vertex or fragment processor is capable of executing a separate program to compute a specific result. A combiner manages the combination of the results from the respective processors, and produces a final transformed vertex or pixel value. The vertex or fragment processors and the combiner can be programmable to modify their operations. As such, the vertex or fragment processors can operate in a parallel or serial configuration, or both. The combiner manages and resolves the operations of the serial and/or parallel configurations. A synchronization barrier enables the combiner to perform data-dependency analysis to determine the timing and ordering of the respective processors' execution. A transformation module can include one or more programmable vertex processors that transforms three-dimensional geometric data into fragments.

Abstract: The invention relates to a computer implemented civil engineering objects system and methods for defining and representing three-dimensional civil engineering design components. The types of civil engineering objects comprise spot object, linear object and surface object. Each type of civil engineering objects are further classified as various categories based on their geometric and engineering similarities. Each civil engineering object comprises positioning geometry data for defining its spatial positioning in a Cartesian coordinates system, relative parametric perimeters data for defining its three-dimensional outline geometry relating to its positioning geometry, and relative parametric model means for calculating its spatial coordinates and geometric features from its positioning geometry data and relative parametric perimeters data according to its predefined relative parametric model.

Abstract: A graphics system has output states corresponding to a transformation of a user state of a software application to a graphics hardware state. The graphics system utilizes a technique, such as a conventional output state cache, to recognize that the overall state vector has taken on a previously-seen value. Additionally, a transition cache maps transitions in changing input state to changing output state. The transition cache is used to provide an alternative technique to determine output states based on transitions of input state.

Abstract: An improved graphics processing system and method are described for magnifying visual output information for printing, display, or other output. A graphics engine transforms display information so as to magnify one or more components or areas of an output image for display via output hardware such as a screen or printer. Magnification parameters are supplied to the graphics engine by one or more magnification applications. In an embodiment of the invention, the graphics engine performs compositing of magnified and unmagnified content for display. In an alternative embodiment, the graphics engine outputs corresponding scaled image material to the appropriate magnification application for rendering. In a further embodiment, the graphics engine may operate in both modes.

Abstract: An image signal processing apparatus which is capable of preventing the “simultaneous display of an original image and the immediately preceding image” as well as dropping of frames. A signal processor subjects an image pickup signal corresponding to a subject outputted from an image pickup device to signal processing. A VRAM (Video Random Access Memory) section is composed of at least three storage areas that store image signals outputted from the signal processing circuit. A VRAM management information section stores management information indicative of storage states of the respective storage areas of the VRAM section. A compression circuit subjects an image signal read from the VRAM section to compression processing. An image display processing circuit subjects an image signal read from the VRAM section to image display processing. An image display section displays images based on the image signal outputted from the image display processing circuit.

Abstract: A graphical user interface which employs logical barriers for temporarily preventing cursor movement between graphical elements under certain circumstances.

Abstract: An apparatus for determining visibility of agents in a scene from multiple viewpoints in a there-dimensional environment. The apparatus comprises a programmable vertex processor operable to execute a plurality of vertex programs. A programmable fragment processor is provided that is operable to execute a plurality of pixel shaders programs, said vertex programs and said pixel shaders programs operable to render each object in the scene multiple times from multiple viewpoints. A processing unit is provided that is operable to analyze the rendered viewpoints to determine visibility area of the agents.

Abstract: A kernel-mode graphics driver (e.g., a D3D driver running under Microsoft Windows) exploits the parallelism available in a dual-core computer system. When an application thread invokes the kernel-mode graphics driver, the driver creates a second (“auxiliary”) thread and binds the application thread to a first one of the processing cores. The auxiliary thread, which generates instructions to the graphics hardware, is bound to a second processing core. The application thread transmits each graphics-driver command to the auxiliary thread, which executes the command. The application thread and auxiliary thread can execute synchronously or asynchronously.

Abstract: A method of continuously rotating a subject object top over bottom over top on a display screen encompasses jumping to a view having a longitude that is 180 degrees from the previous and displaying the image in an up-side-down orientation. Upon pausing, or completing the rotation by releasing the mouse button, a higher resolution image loads and displays thereby improving the sharpness or allowing the user to zoom in on additional detail.

Abstract: A plurality of sub-processors and a management processor process the first task. A graphic processor unit executes image processing corresponding to the first task processed by the management processor. One of the sub-processors performs a second task different from the first task. An image process related to the first task and originated in the sub-processor is accepted by the graphic processor unit and associated first rendering data is transferred to the graphic processor unit. Meanwhile, when the need arises in the one of the sub-processors for a second image process related to the second task, the one of the sub-processor saves second rendering data for the second image process in a main memory. Subsequently, when the graphic processor unit starts the second image process corresponding to the second task, the second rendering data is transferred from the main memory to a graphic memory.

Abstract: Shader programs that execute on graphics processing units (GPUs), such as vertex and pixel shaders may be generated by defining individual shader snippets. Each snippet may represent and/or specifies a particular shader operation. In one embodiment, each snippet may indicate a particular vertex shader operation, a particular pixel (or fragment) shader operation, or both. Various combinations of these snippets may then be combined to create more complex shader programs. A shader snippet framework may be configured to receive information specifying individual snippets, as well as the combinations of snippets representing various shader programs. The framework may define such shader programs using only the identifiers for the various snippets and thus a shader program, as described herein, may not include any actual code, but instead may refer to an ordered list of snippets. At runtime, the snippets are then instantiated and executed to execute the shader program.

Abstract: A virtually-addressed local texture memory stores selected regions (a sparse representation) of a texture for use by a graphics processor. The graphics processor requests a texel of the texture by referencing a virtual address of the texel. A memory interface references an address map to determine whether the requested texel is in one of the regions of the texture that is resident in the local texture memory. If so, the texel is retrieved from the local memory and used in the rendering operation; if not, an alternative texel that is resident in the local memory is retrieved and used in the rendering operation. Non-resident regions that include requested texels are retrieved from a primary texture data store at regular intervals (e.g., once per frame) and stored in local texture memory for use in a subsequent rendering operation.