Abstract: Machine logic (for example, software) for cache management. comprising cache management method includes the following operations: determining, in response to a cache entry is created, a category for the cache entry; and determining a predicted time point of an invalidation event associated with the category, wherein occurrence of the invalidation event will cause invalidation of catching entries of the category; setting a valid period of the cache entry based on the predicted time point.

Abstract: A hash-optimized backup system and method takes data blocks and generates a probabilistically unique digital fingerprint of the content of each data block using a substantially collision-free algorithm. The process compares the generated fingerprint to a database of stored fingerprints and, if the generated fingerprint matches a stored fingerprint, the data block is determined to already have been backed up, and therefore does not need to be backed up again. Only if the generated fingerprint does not match a stored fingerprint is the data block backed up, at which point the generated fingerprint is added to the database of stored fingerprints. Because the algorithm is substantially collision-free, there is no need to compare actual data content if there is a hash-value match. The process can also be used to audit software license compliance, inventory software, and detect computer-file tampering such as viruses and malware.

Abstract: A memory device includes a memory cell array having a plurality of memory cells, and a page buffer unit including a plurality of page buffers configured to store a plurality of pieces of data sequentially read from some of the plurality of memory cells at different read voltage levels, respectively, and to perform a logic operation on the plurality of pieces of data, respectively. The memory device further includes a counting unit configured to count the number of memory cells that exist in each of a plurality of sections defined by the different read voltage levels, based on results of the logic operation.

Abstract: A method for a device to optimize memory includes: when a newly created process needs to be added into a control group, detecting whether a total resource value of memory resources occupied by all processes in the control group at a current moment reaches a critical resource value; if it is detected that the total resource value of memory resources occupied by all processes in the control group at the current moment reaches the critical resource value, cancelling restriction of the predetermined resource threshold on the control group and adding the newly created process into the control group that is not restricted by the predetermined resource threshold; and performing a swap-out operation on memory resources occupied by an idle process in the control group, so that the total resource value of memory resources occupied by all processes in the control group is less than the predetermined resource threshold.

Abstract: An apparatus, system, and method are disclosed for managing eviction of data. A cache write module stores data on a non-volatile storage device sequentially using a log-based storage structure having a head region and a tail region. A direct cache module caches data on the non-volatile storage device using the log-based storage structure. The data is associated with storage operations between a host and a backing store storage device. An eviction module evicts data of at least one region in succession from the log-based storage structure starting with the tail region and progressing toward the head region.

Abstract: A method for managing data in a hierarchical storage device which includes primary storage disks and secondary storage disks. The primary storage disks have higher performance than the secondary storage disks. The storage device detects an access frequency of a data block stored in the secondary storage disks. Based on the access frequency of a data block, the storage device determines that the access frequency of the data block reaches an access threshold value. And then, based upon the determination, the storage device moves the data block to the primary storage disks. After that, the storage device divides the data block into a plurality of sub-blocks and detects an access frequency of each of the sub-blocks. Finally, the storage device moves one or more of the sub-blocks of which access frequencies are less than the access threshold value back to the secondary storage disks.

Abstract: In one embodiment, a system includes a processor and a memory communicatively coupled to the processor. The processor is configured to receive a write request associated with a cache pool, which comprises a plurality of disks. The write request comprises data associated with the write request. The processor is additionally configured to select a first disk from the plurality of disks using a life parameter associated with the first disk. The processor is further configured to cause the data associated with the write request to be written to the first disk.

Abstract: A data storage device includes a central processing unit (CPU) executing an application and a hardware filter. A method of operation the data storage device may include initializing the hardware filter based on initialization information corresponding to a changed application when the application is changed so that the hardware filter supports the changed application, filtering read data that is output from a second memory based on filtering condition data, outputting the filtered data using the hardware filter that has been initialized, and transmitting the filtered data to a host via a first memory.

Abstract: A firmware loading system including a first memory device and a calculation unit. The first memory device includes a first firmware code, wherein the first firmware code has a predetermined code and a plurality of parameter tables, and the parameter tables are arranged to set up a plurality of registers of a second memory device. The calculation unit is arranged to perform a firmware insertion procedure, wherein, during the firmware insertion procedure, the calculation unit selects one of the parameter tables according to a selection signal, compiles the selected parameter table and the predetermined code into a second firmware code, and writes the second firmware code in a flash memory of the second memory device.

Abstract: Embodiments of the invention provide a method and system for dynamic memory management implemented in hardware. In an embodiment, the method comprises storing objects in a plurality of heaps, and operating a hardware garbage collector to free heap space. The hardware garbage collector traverses the heaps and marks selected objects, uses the marks to identify a plurality of the objects, and frees the identified objects. In an embodiment, the method comprises storing objects in a heap, each of at least some of the objects including a multitude of pointers; and operating a hardware garbage collector to free heap space. The hardware garbage collector traverses the heap, using the pointers of some of the objects to identify others of the objects; processes the objects to mark selected objects; and uses the marks to identify a group of the objects, and frees the identified objects.

Abstract: Systems, methods, and computer programs are disclosed for scheduling tasks in a heterogeneous processor cluster architecture in a portable computing device. One embodiment is a system comprising a first processor cluster and a second processor cluster. The first processor cluster comprises a first shared cache, and the second processor cluster comprises a second shared cache. The system further comprises a controller in communication with the first and second processor clusters for performing task migration between the first and second processor clusters. The controller initiates execution of a task on a first processor in the first processor cluster. The controller monitors a processor workload for the first processor and a cache demand associated with the first shared cache while the task is running on the first processor in the first processor cluster. The controller migrates the task to the second processor cluster based on the processor workload and the cache demand.

Abstract: An electronic device includes a memory controller; a first memory device coupled to the memory controller; a second memory device coupled to the memory controller, the second memory device being a different type of memory from the first memory device; and a conversion circuit between the memory controller and the second memory device. The memory controller is configured to send a first command and first data to the first memory device according to a first timing scheme to access the first memory device, and send a second command and a packet to the conversion circuit according to the first timing scheme to access the second memory device. The conversion circuit is configured to receive the second command and the packet, and access the second memory device based on the second command and the packet.

Abstract: A storage device includes a magnetic storage unit storing data, a semiconductor storage unit, and a controller configured to determine whether or not to control the semiconductor storage unit to store a portion of the data, based on history of access to the data, and control the semiconductor storage unit to store the portion of the data according to the determination.

Abstract: A system includes a set-associative storage container and a processor configured to generate a vector that is a random number. Two or more residue functions are applied to the vector that each produces a state signal including a different number of states based on the vector. A set status is determined that identifies whether each set of the set-associative storage container is enabled or disabled. One of the state signals is selected that has a same number of states as a number of the sets that are enabled. The selected state signal is mapped to the sets that are enabled to assign each of the states of the selected state signal to a corresponding one of the sets that are enabled. A set selection of the set-associative storage container is output based on the mapping to randomly select one of the sets that are enabled from the set-associative storage container.

Abstract: A method of training a command signal for a memory module. The method includes programming a memory controller into a mode where a single bit of an address signal is active for a single clock cycle. The method then programs a programmable delay line of the address signal with a delay value and performs initialization of the memory module. The memory module is then placed in a write leveling mode. A write leveling procedure is then performed and a response to the write leveling procedure is determined from the memory module. A determination is made whether the memory module is in a pass state or an error state based on the response.

Abstract: Preventing duplicate entries of identical data in a storage device, including: receiving a write request to write data to the storage device; calculating one or more signatures for the data associated with the write request; determining whether any of the calculated signatures match a calculated signature contained in a recently read signature buffer, each entry in the recently read signature buffer associating a calculated signature for data that has been read with an address of a storage location within the storage device where the data is stored; and responsive to determining that one of the calculated signatures matches a calculated signature contained in the recently read signature buffer, determining whether the data associated with the calculated signature is a duplicate of data stored at a particular address that is associated with the calculated signature contained in the recently read signature buffer.

Abstract: A search server for which data stored in a hierarchical control server utilizing a plurality of storage devices is the object of a search, wherein the search server is designed to update a search index to data while the data exists in an upper-hierarchy storage of the hierarchical control server. Included in a computer system are: a storage unit for storing the usage status of an upper-hierarchy storage area of a hierarchical storage having the upper-hierarchy storage area and a lower-hierarchy storage area; and a determination unit for determining, according to the stored usage status, which process should be given priority between an indexing process for data that is an index-updating candidate among data stored in the hierarchical storage, or a migration process for moving the data to the lower-hierarchy storage area.

Abstract: A method for generating a virtual volume (VV) in a storage system architecture. The architecture comprises a host and one or more disk array subsystems. Each subsystem comprises a storage controller. One or more of the subsystems comprises a physical storage device (PSD) array. The method comprises the following steps: mapping the PSD array into a plurality of media extents (MEs), each of the MEs comprises a plurality of sections; providing a virtual pool (VP) to implement a section cross-referencing function, wherein a section index (SI) of each of the sections contained in the VP is defined by the VP to cross-reference VP sections to physical ME locations; providing a conversion method or procedure or function for mapping VP capacity into to a VV; and presenting the VV to the host. A storage subsystem and a storage system architecture performing the method are also provided.

Abstract: Methods and apparatus related to non-volatile memory page sector rotation are described. In one embodiment, logic rotates the order of one or more sectors by a rotation value prior to storage of the one or more sectors in a non-volatile memory device. Logic then rotates the one or more sectors back by the rotation value after reading the one or more sectors from the non-volatile memory device. Furthermore, at least one indirection block (corresponding to the one or more sectors) is stored in at least two different logical memory pages of the non-volatile memory. Other embodiments are also disclosed and claimed.

Abstract: A computer-implemented method includes generating a vector that is a random number. Two or more residue functions are applied to the vector to produce a state signal including a different number of states. A set status of a set-associative storage container in a computer system is determined. The set status identifies whether each set of the set-associative storage container is enabled or disabled. One of the state signals is selected that has a same number of states as a number of the sets that are enabled. The selected state signal is mapped to the sets that are enabled to assign each of the states of the selected state signal to a corresponding one of the sets that are enabled. A set selection of the set-associative storage container is output based on the mapping to randomly select one of the sets that are enabled from the set-associative storage container.