Abstract: A memory subsystem is provided including an interface circuit adapted for coupling with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for emulating at least one memory circuit with at least one aspect that is different from at least one aspect of at least one of the plurality of memory circuits. Such aspect includes a signal, a capacity, a timing, and/or a logical interface.

Abstract: A breakpoint control mechanism for an In-Circuit Emulation system. Break bits are assigned to each instruction address and stored in a lookup table within a base station containing a virtual microcontroller. As a program counter increments, a determination is made as to whether or not a break is to occur by reading the break bit from the lookup table. When a break is to occur, a breakpoint controller issues a break command over an interface to an actual microcontroller under test, thus freeing the microcontroller under test from having to include a look-up table on board for a breakpoint control or otherwise provide specifically for breakpoint control.

Abstract: The proposed prediction of trends is based on history values of an observable. In more detail, a mathematical model is fitted on history values of an observable, said mathematical model having a ratio factor defined as a ratio between a number of history values used for calculation of a given observable value and a number of observable values modelled simultaneously. Information defining a minimum forecast horizon and a maximum forecast horizon together with respective ratio factor values is received, together with information defining a desired forecast horizon. A desired ratio factor value corresponding to the desired forecast horizon is determined based at least on said desired forecast horizon and said minimum and maximum forecast horizons together with said respective ratio factor values. The desired ratio factor value is used in fitting said mathematical model on said history values of said observable.

Abstract: Space frames consist of combination of one or more basic modules to function as a decorative feature or a building element in architectural design. There are certain aesthetic criteria to meet on the design of a basic space frame module; space frame module, geometric regularity, and dimension regularity for all the angles and lengths between edges. Designers exercise their own creativity to develop space frame modules base on these criteria. The present invention relates to a hybrid algorithm based on evolutionary algorithm for graph encoding scheme (EAGES) and genetic algorithm (GA) to evolve the design automatically in relative small number of generations. The hybrid algorithm is a tool to architects and designers to rapidly produce aesthetically pleasing designs with the resources available to them.

Abstract: A method of designing adjacent components is provided that results in a minimum “perceived gap” between the components, i.e., a minimum total distance between a change in curvature of the first component at the gap and a change in curvature of the second component at the gap.

Abstract: An analysis tool analyzes a model to determine the digital effect of the model in a modeling or programming environment. With the analysis tool, a user can determine minimum hardware functionality needed to execute the software generated from the model. The hardware functionality may include the word size of the microprocessor that executes the software appropriately. The hardware functionality may also include the execution speed of the microprocessor executing the software. The hardware functionality may further include the functionality of other hardware elements, such as the word length of an Analog to Digital converter. The analysis tool enables a user to produce a system at a low cost while achieving necessary performance criteria.

Abstract: A method of creating and using a hardware independent communication interface block for block diagram environments is disclosed. The communication interface block includes user-selectable parameters controlling how a system being modeled by a block diagram communicates with image and data acquisition devices and control instruments or other electronic device interfaced with an external system. Based on the user selected parameters, the communication interface block calls an appropriate constructor to create an instrument object or acquisition device object which is used to enable communication with the control instrument or acquisition device respectively. The instrument object/acquisition device object calls a software driver appropriate for the hardware interface of the control instrument/acquisition device. The use of a common interface block provides scalability and ease of use to the block diagram environment when interacting with control instruments and acquisition devices.

Abstract: The present invention provides for converting a user-specified element of a graphical model into at least one intermediate representation that represents the user-specified element. An intermediate representation of the present invention may support simulation, propagation, and/or code generation. An element for a graphical model is provided, and the element and/or the graphical model are converted into an intermediate representation that may represent algorithmic aspects of the element or that is capable of being simulated and/or capable allowing propagation. The present invention allows a user to provide a single code for a user-specified element that may be used to support simulation, propagation and/or code generation of an element or graphical model.

Abstract: An element grouping method for Finite Element Method (FEM) analysis is implemented in a computer to group elements forming an analyzing mode. The method automatically obtains nodes of specific elements having a common parameter from the elements forming the analyzing model which is an analyzing target, and automatically groups nodes having a referring number which is a predetermined value or less. The specific elements belonging to the grouped nodes are automatically grouped as edge elements. A check is made to determine whether or not all specific elements in an edge portion of the analyzing model are grouped as the edge elements. Specific elements, other than the specific elements in the edge portion which are grouped as the edge elements, are automatically grouped as the in-plane elements.

Abstract: The invention provides a method and apparatus for predicting the failure of a component using a probabilistic model of a material's microstructural-based response to fatigue. The method predicts the component failure by a computer simulation of multiple incarnations of real material behavior, or virtual prototyping. The virtual prototyping simulates the effects of characteristics that include grain size, grain orientation, micro-applied stress and micro-yield strength that are difficult to simulate with real specimens. The invention provides an apparatus for predicting the response of a component to fatigue using the method.

Abstract: A computer-implemented method may include defining an input bus signal in a graphical block diagram model by associating the input bus signal with a first group of signals, at least two of the first group of signals having a different data type; defining an output bus signal in the graphical block diagram model by associating the second bus signal with a second group of signals, each of the second group of signals corresponding to one of the first group of signals; defining an input to a non-virtual operation block in the graphical block diagram model as the input bus signal; defining an output to the non-virtual operation block in the graphical block diagram as the output bus signal; and simulating an operation performed on the input bus signal by the non-virtual operation block, the operation being performed on each of the first group of signals and output to each of the second group of signals.

Abstract: A particle behavior analysis method uses plural computers connected via a network to analyze particle behavior considering an interaction force with a different substance acting on a particle. The method includes analyzing the particle behavior by using a force decomposition paralleling algorithm using a force matrix considering at least two or more types of interaction forces.

Abstract: A system may include a memory to store a graphical block diagram model including a graphical block, the graphical block being associated with a lookup table and one or more inputs for receiving input data. The system may further include one or more processors to update data stored in the lookup table based on the received input data, where data stored in the lookup table includes data for simulating an embedded control system.

Abstract: A method, system and computer program product are disclosed for simulating a storage area network including a set of correlated devices, each of the devices having a device agent. The method comprises the step of forming a set of simulation agents representing said device agents, including the steps of, (i) for each of the simulation agents, obtaining a set of agent profiles, and storing said agent profiles in a data store, and (ii) obtaining files describing class definitions for the simulation agents, and storing said files in the data store. With this information and data, a Visual Workbench is used to generate a display of said simulation agents. The preferred embodiment provides a framework and implementation that simulates the CIM agent of any SAN device. Each individual device CIM agent can be simulated in this framework based on the specification defined in an XML file and/or through snapshot mechanism.

Abstract: In one embodiment, a method for displaying elements of an attribute in an executable block diagram model is provided. The method may include displaying an executable block diagram model in a first window and receiving a first input from an input device, wherein the first input associates with a first parameter of a block diagram modeling component in the executable block diagram model, the first parameter is represented in the executable block diagram model by a first graphical affordances. The method may include triggering the display of a value of a first parameter in a first user interface widget in the first window.

Abstract: The present invention improves in one aspect the accuracy, efficiency, and robustness of fixed-step solvers when simulating a physical system that does not change in energy at the critical event. The present invention uses the energy of the error as the figure of merit in finding the first state of the system under the new constraints. The present invention enables a fixed-step solver to be more robust even when the critical event falls between two time samples. The present invention may also be applied to variable-step solvers. Moreover, the present invention may also be used to simulate a physical system when the energy changes at the critical event in the physical system.

Abstract: A simulation model can individually and selectively simulate sub-processes of a full-scale production system. Such a customized simulator can directly simulate all the processes of a system, any combination of processes of a system, or a single process of a system. The remaining processes of the system are left to be executed by an operator or equivalent software program. The model and corresponding information can be used for test, design, evaluation, adjustment, certification, and training purposes.

Abstract: Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.

Abstract: A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, respectively. It further permutes a plurality of encoded data frames. The randomizer randomizes the permuted enhanced data, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the data coded at the rate of 1/N1 into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets.

Abstract: A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, respectively. It further permutes a plurality of encoded data frames. The randomizer randomizes the permuted enhanced data, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the data coded at the rate of 1/N1 into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets.