Patents Examined by Jill N. Holloman
  • Patent number: 6107013
    Abstract: An exposure method includes the phase-shifting mask supply step, the phase-shifting mask being prepared by selectively forming a light-shielding portion and a phase shifter on a substrate, and the resist exposure step of performing both exposure of a resist by dark field illumination light and exposure of the resist by bright field illumination light by using the phase-shifting mask, thereby removing residual resist generated by the influence of the edge of the phase shifter.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: August 22, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahito Fujisawa, Satoshi Tanaka, Akiko Mimotogi, Shoji Mimotogi, Soichi Inoue
  • Patent number: 6060224
    Abstract: The present invention provides a method for maskless lithography. A plurality of individually addressable and rotatable micromirrors together comprise a two-dimensional array of micromirrors. Each micromirror in the two-dimensional array can be envisioned as an individually addressable element in the picture that comprises the circuit pattern desired. As each micromirror is addressed it rotates so as to reflect light from a light source onto a portion of the photoresist coated wafer thereby forming a pixel within the circuit pattern. By electronically addressing a two-dimensional array of these micromirrors in the proper sequence a circuit pattern that is comprised of these individual pixels can be constructed on a microchip. The reflecting surface of the micromirror is configured in such a way as to overcome coherence and diffraction effects in order to produce circuit elements having straight sides.
    Type: Grant
    Filed: January 14, 1999
    Date of Patent: May 9, 2000
    Inventors: William C. Sweatt, Richard H. Stulen
  • Patent number: 6051369
    Abstract: A lithography process includes a step of forming an antireflective coating film on a substrate. A film is formed on the antireflective film and a radiation sensitive film is formed on the film. The radiation sensitive film is selectively exposed. During the selective exposing, the antireflective film covers the lower surface of the portion of film on which the radiation sensitive film is formed, and the antireflective coating film reduces reflections of radiation during the selective exposing of the radiation sensitive film. A fabrication process using the lithography process is also described.
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: April 18, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsukasa Azuma, Takashi Sato
  • Patent number: 6048668
    Abstract: Patterning a film by accumulating a first electric charge in a first area of a film under treatment, applying a resist to the film, and subsequently exposing a second area of the resist adjoining the first area to the first electric charge.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: April 11, 2000
    Assignee: Fujitsu Limited
    Inventor: Tsunehiro Hato
  • Patent number: 6042995
    Abstract: A lithographic process for semiconductor device fabrication is disclosed. In the process a patterned mask having a multilayer film formed on a substrate is illuminated by extreme ultraviolet (EUV) radiation and the radiation reflected from the pattern mask is directed onto a layer of energy sensitive material formed on a substrate. The image of the pattern on the mask is thus introduced into the energy sensitive material. The image is then developed and transferred into the underlying substrate. The multilayer film is inspected for defects by applying a layer of energy-sensitive film (called the inspection film) in proximity to the multilayer film and exposing the energy-sensitive material to EUV radiation. The thickness of the multilayer film is such that a portion of the EUV radiation is transmitted through the inspection film, reflected from the multilayer film and back into the inspection film.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: March 28, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Donald Lawrence White
  • Patent number: 6042998
    Abstract: The present invention extends the available spatial frequency content of an image through the use of a method and apparatus for combining nonlinear functions of intensity to form three dimensional patterns with spatial frequencies that are not present in either of the individual exposures and that are beyond 2/.lambda. in all three spatial directions. The resulting pattern has spatial frequency content beyond the limits set by optical propagation of spatial frequencies limited to 2/.lambda. (e.g. pitch reduction from .about..lambda./2 to at least .about..lambda./4). The extension of spatial frequencies preferably extends the use of currently existing photolithography capabilities, thereby resulting in a significant economic impact. Multiplying the spatial frequency of lithographically defined structures suitably allows for substantial improvements in, inter alia, crystal growth, quantum structure growth and fabrication, flux pinning sites for high-T.sub.
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: March 28, 2000
    Assignee: The University of New Mexico
    Inventors: Steven R. J. Brueck, Saleem H. Zaidi
  • Patent number: 6042993
    Abstract: In a process for photolithographic generation of structures in the sub-200 nm range, a layer of amorphous hydrogen-containing carbon (a-C:H) with an optical energy gap of <1 eV or a layer of sputtered amorphous carbon (a-C) is applied as the bottom resist to a substrate (layer thickness .ltoreq.500 nm); the bottom resist is provided with a layer of an electron beam-sensitive silicon-containing or silylatable photoresist as the top resist (layer thickness .ltoreq.50 nm); the top resist is structured by means of scanning tunneling microscopy (STM) or scanning force microscopy (SFM) with electrons of an energy of .ltoreq.80 eV; and then the structure is transferred to the bottom resist by etching with an anisotropic oxygen plasma and next is transferred to the substrate by plasma etching.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: March 28, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Leuschner, Ewald Gunther, Albert Hammerschmidt, Gertrud Falk
  • Patent number: 6040117
    Abstract: A negative photoresist stripping liquid composition is provided which comprises from 30 to 75% by weight of dimethyl sulfoxide, from 20 to 65% by weight of 1,3-dimethyl-2-imidazolidinone, from 0.1 to 5% by weight of a tetraalkylammonium hydroxide and from 0.5 to 15% by weight of water. The composition has a superior stripping performance especially against photoresists that are alkali-developable and can form films of at least 20 .mu.m in thickness, and has no problem of freezing even when stored outdoors in the winter. The composition is useful for the stripping of negative photoresists for bump formation and for fabricating circuit substrates.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: March 21, 2000
    Assignee: JSR Corporation
    Inventors: Toshiyuki Ota, Kimiyasu Sano, Hideaki Tashiro, Hozumi Sato
  • Patent number: 6037103
    Abstract: In a mask imaging method (by shooting a laser beam) for forming holes in a resin layer of a printed board, a sectional shape is reshaped by beam reshaping optics. Light path holes corresponding to the holes to be formed in the resin layer are used. The reshaped laser beam shoots the light path holes formed in the mask individually at once. Simultaneous passage of the laser beam through the light path holes formed in the mask is allowed, to form the holes in the resin layer. Exposure of the periphery and inside of a hole to the laser beam results in removal of a decomposition residue and/or processing residue.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: March 14, 2000
    Assignee: Nitto Denko Corporation
    Inventor: Atsushi Hino
  • Patent number: 6030753
    Abstract: A magnetoresistive (MR) head and a method are disclosed providing a longitudinal bias layer and conductor leads at end regions of sensor elements to form a sensor region between the end regions. A uniform longitudinal bias thin film layer is deposited overlaying the entirety of the upper MR sensor, and a uniform conductor thin film layer is deposited overlaying the entirety of the longitudinal bias thin film layer. A photoresist process is conducted over the conductor thin film layer to develop a mask of the end regions and to expose a central region between the end regions.
    Type: Grant
    Filed: May 10, 1999
    Date of Patent: February 29, 2000
    Assignee: International Business Machines Corporation
    Inventor: Tsann Lin
  • Patent number: 6030752
    Abstract: A method of stitching segments defined by adjacent image patterns of a photolithographic system during the manufacture of a semiconductor device is disclosed. The method includes forming a material over a semiconductor substrate, projecting a first image pattern over the substrate that defines a first segment and a contact region, projecting a second image pattern over the substrate that defines a second segment with an end that overlaps the contact region, and removing a portion of the material corresponding to the first and second image patterns to form the first and second segments stitched by a portion of the contact region. The contact region has a greater width than the first and second segments. In this manner, the contact region accommodates misalignments that might otherwise lead to inadequate coupling or decoupling between the first and second segments. The invention is particularly well-suited for stitching polysilicon gates of N-channel and P-channel devices.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: February 29, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: H. Jim Fulford, Jr., Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael, Bradley T. Moore, Derick J. Wristers
  • Patent number: 6027858
    Abstract: A process of tenting plated through holes with a photoimageable dielectric is provided which includes a dielectric film comprising a photoimageable epoxy based resin layer and a peelable polyester layer. In accordance with the process of the present invention, the peelable polyester layer of the dielectric film is removed prior to baking, developing, patterning or curing the structure.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: February 22, 2000
    Assignee: International Business Machines Corporation
    Inventors: Gerald Walter Jones, Ross William Keesler, Voya Rista Markovich, Heinke Marcello, James Warren Wilson, William Earl Wilson
  • Patent number: 6027859
    Abstract: The present invention generally provides a semiconductor substrate having an extended test structure and a method of fabricating such a substrate. A method of forming an extended test structure on a semiconductor substrate, consistent with one embodiment of the invention, includes forming a first test structure pattern over a first portion of the substrate and forming a second test structure pattern of the second portion of the substrate which partially overlaps the first portion of the substrate such that the first test structure pattern and the second test structure overlap. The first test structure pattern may be formed using, for example, reticle and a second test structure pattern may be formed using the same reticle. The first and second test structure patterns may, for example, be formed in a scribe line of the substrate.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: February 22, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Robert Dawson, Mark W. Michael, Fred Hause
  • Patent number: 6027865
    Abstract: A method is provided for accurate patterning of photoresist during lithography process. A photoresist layer is deposited on a surface of a semicondictor wafer. The photoresist layer is then illuminated using a lithography apparatus including a mask, a two-thirds annular aperture stop and a quadra pole aperture stop. Portions of the photoresist layer are removed to provide a resulting patterned photoresist layer.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: February 22, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: Katsuyoshi Andoh
  • Patent number: 6025117
    Abstract: A polysilane having a repeating unit represented by the following general formula (LPS-I), ##STR1## wherein A is a bivalent organic group, R.sup.1 substituents may be the same or different and are selected from hydrogen atom and substituted or unsubstituted hydrocarbon group and silyl group. The polysilane is excellent in solublity in an organic solvent so that it can be formed into a film by way of a coating method, which is excellent in mechanical strength and heat resistance. The polysilane can be employed as an etching mask to be disposed under a resist in a manufacturing method of a semiconductor device. The polysilane exhibits anti-reflective effect during exposure, a large etch rate ratio in relative to a resist, and excellent dry etching resistance.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: February 15, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiko Nakano, Rikako Kani, Shuji Hayase, Yasuhiko Sato, Seiro Miyoshi, Toru Ushirogouchi, Sawako Yoshikawa, Hideto Matsuyama, Yasunobu Onishi, Masaki Narita, Toshiro Hiraoka
  • Patent number: 6022669
    Abstract: A first photosensitive liquid solution is applied to a substrate, patterned through exposure to radiation and development, and annealed to form a desired solid material, such as SrBi.sub.2 Ta.sub.2 O.sub.9, that is incorporated into a component of an integrated circuit Fabrication processes are designed protect the self-patterned solid material from conventional IC processing and to protect the conventional materials, such as silicon, from elements in the self-patterned solid material. In one embodiment, a layer of bismuth oxide is formed on the SrBi.sub.2 Ta.sub.2 O.sub.9 and a silicon oxide hole is etched to the bismuth oxide. The bismuth oxide protects the SrBi.sub.2 Ta.sub.2 O.sub.9 from the etchant, and is reduced by the etchant to bismuth. Any remaining bismuth oxide and much of the bismuth are vaporized in the anneal, and the remaining bismuth is incorporated into the SrBi.sub.2 Ta.sub.2 O.sub.9.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: February 8, 2000
    Assignees: Symetrix Corporation, Mitsubishi Materials Corporation
    Inventors: Hiroto Uchida, Nobuyuki Soyama, Kensuke Kageyama, Katsumi Ogi, Michael C. Scott, Joseph D. Cuchiaro, Gary F. Derbenuick, Larry D. McMillan, Carlos A. Paz de Araujo
  • Patent number: 6020111
    Abstract: In a method of manufacturing a semiconductor device, a first film essentially consisting of silicon is deposited on the surface of a semiconductor substrate. A second film essentially consisting of material having a proper etching selection ratio relative to tungsten is deposited on the first film. A third film essentially consisting of tungsten is deposited on the second film. A resist pattern is formed on the third film. The third film is etched and patterned to the surface of the second film, by using the resist pattern as a mask. The second film is etched to have the same shape as the third film. The first film is etched to have the same shape as the third film. After the step of patterning the third film and before the step of patterning the first film, the resist pattern is heated to a temperature of 80.degree. C. or higher, the semiconductor substrate is exposed in atmospheric air, and the resist pattern is removed.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: February 1, 2000
    Assignee: Fujitsu Limited
    Inventor: Satoru Mihara
  • Patent number: 6013417
    Abstract: Circuitry is formed on a substrate having at least one plated through-hole employing two different photoresist materials. A first photoresist is applied on a conductive layer located on a substrate and is developed to define a desired conductive circuit pattern. A second photoresist is laminated onto the structure and is developed so that the second photoresist material remains in the vicinity of the through-hole. The conductive layer is etched to provide the desired circuit pattern, and the remaining portions of the second and first photoresists are removed.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: January 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Robert David Sebesta, James Warren Wilson
  • Patent number: 6010830
    Abstract: Disclosed is a method for forming a barrier rib of plasma display panel. The method includes the steps of: providing a transparent substrate on which address electrodes having a first thickness are arranged in parallel with each other, a first distance apart from each other; forming a photosensitive paste film on the substrate including the address electrodes; patterning the photosensitive paste film to form a first barrier rib having a second thickness and a first width, wherein the barrier rib is displaced between two adjacent address electrodes; printing a second barrier rib on the first barrier rib by screen printing method; and plasticizing both of the first and second barrier ribs.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: January 4, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Hyun Mook Choi, Dae Joong Yoon
  • Patent number: 6010828
    Abstract: The present invention provides a method of and a device for planarizing a photosensitive material, such as a photoresist, located over an irregular surface of a semiconductor wafer. In one embodiment, the method comprises the steps of passing radiation through a first medium and a second medium wherein the first medium is interfaced with the second medium. The method further comprises the steps of passing the radiation from the second medium into the photosensitive material that is interfaced with the second medium to expose the photosensitive material. The first and second mediums and the photosensitive material have radiation absorption coefficients such that the radiation terminates substantially within a plane of the photosensitive material. The method further includes the step of etching the exposed photosensitive material to the plane.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: January 4, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Maxwell W. Lippitt