Patents Examined by Jiong-Ping Lu
  • Patent number: 11862472
    Abstract: Methods for polishing dielectric layers using an auto-stop slurry in forming semiconductor devices, such as three-dimensional (3D) memory devices, are provided. The methods include forming a stack structure in a staircase region and a core array region, the stack structure including a staircase structure in the staircase region; forming a dielectric layer over the staircase region and a peripheral region outside the stack structure; and polishing the dielectric layer using an auto-stop slurry containing a ceria-based abrasive.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: January 2, 2024
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventor: Xiaohong Zhou
  • Patent number: 11842923
    Abstract: Disclosed is a semiconductor processing approach wherein a wafer twist is employed to increase etch rate, at select locations, along a hole or space end arc. By doing so, a finished hole may more closely resemble the shape of the incoming hole end. In some embodiments, a method may include providing an elongated contact hole formed in a semiconductor device, and etching the elongated contact hole while rotating the semiconductor device, wherein the etching is performed by an ion beam delivered at a non-zero angle relative to a plane defined by the semiconductor device. The elongated contact hole may be defined by a set of sidewalls opposite one another, and a first end and a second end connected to the set of sidewalls, wherein etching the elongated contact hole causes the elongated contact hole to change from an oval shape to a rectangular shape.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: December 12, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Glen F. R. Gilchrist, Shurong Liang
  • Patent number: 11837467
    Abstract: In certain embodiments, a method of processing a semiconductor substrate includes positioning a semiconductor substrate in a plasma chamber of a plasma tool. The semiconductor substrate includes a film stack that includes silicon layers and germanium-containing layers in an alternating stacked arrangement, with at least two silicon layers and at least two germanium-containing layers. The method includes exposing, in a first plasma step executed in the plasma chamber, the film stack to a first plasma. The first plasma is generated from first gases that include nitrogen gas, hydrogen gas, and fluorine gas. The method includes exposing, in a second plasma step executed in the plasma chamber, the film stack to a second plasma. The second plasma is generated from second gases comprising fluorine gas and oxygen gas. The second plasma selectively etches the silicon layers.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: December 5, 2023
    Assignee: Toyko Electron Limited
    Inventors: Pingshan Luan, Christopher Catano, Aelan Mosden
  • Patent number: 11822250
    Abstract: A solution including an organic solvent (S), and an antioxidant (A), in which an antioxidant (A) includes a tocopherol compound (A1).
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 21, 2023
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Hiroyuki Iida, Motoki Takahashi, Masaharu Nakamura
  • Patent number: 11820919
    Abstract: The present disclosure provides a new corrosion control chemistry for use in ruthenium (Ru) chemical-mechanical polishing (CMP) processes. More specifically, the present disclosure provides an improved CMP slurry chemistry and CMP process for planarizing a ruthenium surface. In the CMP process disclosed herein, a ruthenium surface (e.g., a post-etch ruthenium surface) is exposed to a CMP slurry containing a halogenation reagent, which reacts with the ruthenium surface to create a halogenated ruthenium surface, and a ligand for ligand-assisted reactive dissolution of the halogenated ruthenium surface. Relative amounts of the halogenation agent and the ligand can be controlled in the CMP slurry, so as to provide a diffusion-limited etch process that improves pos-etch surface morphology, while providing high material removal rates.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: November 21, 2023
    Assignee: Tokyo Electron Limited
    Inventor: Paul Abel
  • Patent number: 11807942
    Abstract: Described herein is a continuous coil pretreatment process used to treat the surface of an aluminum alloy sheet or coil for subsequent deposition of an acidic organophosphorus compound. The process can include applying a cleaner to a surface of an aluminum sheet or a coil; etching the surface of the aluminum sheet or the coil with an acidic solution; rinsing the surface of the aluminum sheet or the coil with deionized water; applying to the surface of the aluminum sheet or the coil a solution of an acidic organophosphorus compound; rinsing the surface of the aluminum sheet or the coil with deionized water; and drying the surface of the aluminum sheet or the coil.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: November 7, 2023
    Assignee: Novelis Inc.
    Inventors: Michael Bull, Theresa Elizabeth MacFarlane
  • Patent number: 11807947
    Abstract: A method of forming a metallic pattern on a substrate is provided. The method includes applying onto a metallic surface, a chemically surface-activating solution having an activating agent that chemically activates the metallic surface; non-impact printing an etch-resist ink on the activated surface to produce an etch resist mask according to a predetermined pattern, wherein at least one ink component within the etch-resist ink undergoes a chemical reaction with the activated metallic surface to immobilize droplets of the etch-resist ink when hitting the activated surface; performing an etching process to remove unmasked metallic portions that are not covered with the etch resist mask; and removing the etch-resist mask.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: November 7, 2023
    Assignee: Kateeva, Inc.
    Inventors: Nava Shpaisman, Moshe Frenkel
  • Patent number: 11807792
    Abstract: A semiconductor processing liquid including hydrofluoric acid, and an organic solvent, in which the organic solvent contains a compound represented by the formula below in which X1 is a single bond or an alkylene group having 1 to 6 carbon atoms, in which an ether bond may be interposed, Y10 is one of —O—, —(C?O)—, —O—(C?O)—, and —(C?O)—O—, Y20 is one of —(C?O)—, —O—(C?O)—, and —(C?O)—O—, and Y11 and Y21 are each independently a single bond or an alkylene group having 1 to 6 carbon atoms in which an ether bond may be interposed, provided that, X1, Y11, and Y21 do not contain hydroxyl groups in structures thereof, and when X1 is a single bond, Y10 is not —O—) H3C—Y11—Y10—X1—Y20—Y21—CH3??(1).
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: November 7, 2023
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Takahiro Eto, Lihong Liu
  • Patent number: 11806836
    Abstract: A composition is provided that comprises a calcium carbonate slurry. The calcium carbonate slurry comprises a plurality of calcium carbonate particles suspended in a solution, where the solution comprises a dispersant and an anionic surfactant. The concentration of the calcium carbonate particles in the calcium carbonate slurry is equal to or less than about 2.0 wt. %.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: November 7, 2023
    Assignee: Illumina, Inc.
    Inventors: Robert Yang, Samantha K. Brittelle, You-Jung Cheng, Scott William Bailey, James M. Tsay
  • Patent number: 11798813
    Abstract: Exemplary etching methods may include flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the processing region with the oxygen-containing precursor. The substrate may include an exposed region of ruthenium, and the contacting may produce ruthenium tetroxide. The methods may include vaporizing the ruthenium tetroxide from a surface of the exposed region of ruthenium. An amount of oxidized ruthenium may remain. The methods may include contacting the oxidized ruthenium with a hydrogen-containing precursor. The methods may include removing the oxidized ruthenium.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: October 24, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Baiwei Wang, Xiaolin C. Chen, Rohan Puligoru Reddy, Oliver Jan, Zhenjiang Cui, Anchuan Wang
  • Patent number: 11795550
    Abstract: A method of etching a metal barrier layer and a metal layer is provided. The method includes forming the metal barrier layer and the metal layer on a substrate, and using an etching composition to etch the metal barrier layer and the metal layer. The etching composition may include an oxidant selected from nitric acid, bromic acid, iodic acid, perchloric acid, perbromic acid, periodic acid, sulfuric acid, methane sulfonic acid, p-toluenesulfonic acid, benzenesulfonic acid, or a combination thereof, a metal etching inhibitor including a compound expressed by Chemical Formula 1, and a metal oxide solubilizer selected from phosphoric acid, phosphate, carboxylic acid having 3 to 20 carbon atoms, or a combination thereof.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: October 24, 2023
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SOULBRAIN CO., LTD.
    Inventors: Jungah Kim, Mihyun Park, Jinwoo Lee, Keonyoung Kim, Hyosan Lee, Hoon Han, Jin Uk Lee, Jung Hun Lim
  • Patent number: 11788007
    Abstract: Provided are compositions and methods useful in etching, i.e., removing amorphous carbon hard masks which have been doped with elements such as boron, chlorine, or nitrogen. The compositions utilize concentrated sulfuric acid, water, and at least one oxidizing agent. In the operation of the method, the composition selectively removes the doped hard mask layer, even in the presence of layers such as silicon dioxide, silicon nitride, tantalum nitride, and polysilicon, with good selectivity.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: October 17, 2023
    Assignee: ENTEGRIS, INC.
    Inventors: Hsing-Chen Wu, Emanuel I. Cooper, Min-Chieh Yang
  • Patent number: 11791166
    Abstract: Systems and methods for etching titanium containing layers on a workpiece are provided. In one example, a method includes placing the workpiece on a workpiece support in a processing chamber. The workpiece includes a first layer and a second layer. The first layer is a titanium containing layer. The method includes admitting a process gas into the processing chamber. The process gas includes an ozone gas and a fluorine containing gas. The method includes exposing the first layer and the second layer on the workpiece to the process gas to at least partially etch the first layer at a greater etch rate relative to the second layer.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: October 17, 2023
    Assignees: BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY CO., LTD, MATTSON TECHNOLOGY, INC.
    Inventors: Qi Zhang, Haichun Yang, Hua Chung, Ting Xie, Michael X. Yang
  • Patent number: 11781218
    Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: October 10, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick
  • Patent number: 11773324
    Abstract: A semiconductor processing liquid including hydrofluoric acid, and an organic solvent, in which the organic solvent contains a compound represented by the formula below in which X1 is a single bond or an alkylene group having 1 to 6 carbon atoms, in which an ether bond may be interposed, Y10 is one of —O—, —(C?O)—, —O—(C?O)—, and —(C?O)—O—, Y20 is one of —(C?O)—, —O—(C?O)—, and —(C?O)—O—, and Y11 and Y21 are each independently a single bond or an alkylene group having 1 to 6 carbon atoms in which an ether bond may be interposed, provided that, X1, Y11, and Y21 do not contain hydroxyl groups in structures thereof, and when X1 is a single bond, Y10 is not —O—) H3C—Y11—Y10—X1—Y20—Y21—CH3??(1).
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: October 3, 2023
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Takahiro Eto, Lihong Liu
  • Patent number: 11776807
    Abstract: Methods for controlling the formation of oxygen containing thin films, such as silicon oxycarbide (SiOC) and silicon oxycarbonitride (SiOCN) thin films, on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor that comprises oxygen and a second reactant that does not include oxygen. In some embodiments the plasma power can be selected from a range to achieve a desired step coverage or wet etch rate ratio (WERR) for films deposited on three dimensional features.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: October 3, 2023
    Assignee: ASM IP Holding, B.V.
    Inventors: Lingyun Jia, Viljami J. Pore, Marko Tuominen, Sun Ja Kim, Oreste Madia
  • Patent number: 11768436
    Abstract: A protective film-forming composition which protects against a semiconductor wet etching solution, contains a solvent and a compound or polymer thereof containing at least one pair including two adjacent hydroxyl groups in a molecule thereof, and forms a protective film which can quickly be removed by dry etching and exhibits excellent resistance against a semiconductor wet etching solution during the lithographic process when producing semiconductors; a method for producing a resist pattern-equipped substrate which uses the protective film; and a method for producing a semiconductor device.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: September 26, 2023
    Assignee: NISSAN CHEMICAL CORPORATION
    Inventors: Takafumi Endo, Yasunobu Someya, Takahiro Kishioka
  • Patent number: 11764061
    Abstract: Water soluble organic-inorganic hybrid masks and mask formulations, and methods of dicing semiconductor wafers are described. In an example, a mask for a wafer singulation process includes a water-soluble matrix based on a solid component and water. A p-block metal compound, an s-block metal compound, or a transition metal compound is dissolved throughout the water-soluble matrix.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: September 19, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Wenguang Li, James S. Papanu
  • Patent number: 11756838
    Abstract: Disclosed is a method of forming a semiconductor device. The method includes providing a precursor having a substrate and gate stacks over the substrate, wherein each of the gate stacks includes an electrode layer, a first hard mask (HM) layer over the electrode layer, and a second HM layer over the first HM layer. The method further includes depositing a dielectric layer over the substrate and the gate stacks and filling spaces between the gate stacks; and performing a first chemical mechanical planarization (CMP) process to partially remove the dielectric layer. The method further includes performing an etching process to remove the second HM layer and to partially remove the dielectric layer, thereby exposing the first HM layer. The method further includes performing a second CMP process to at least partially remove the first HM layer.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jen Shen, Ying-Ho Chen, Yung-Cheng Lu
  • Patent number: 11754927
    Abstract: Photoresist pattern trimming compositions comprise a polymer, an aromatic sulfonic acid, and an organic-based solvent system, wherein the aromatic sulfonic acid is of general formula (I): wherein: Ar1 represents an aromatic group; R1 independently represents a halogen atom, hydroxy, substituted or unsubstituted alkyl, substituted or unsubstituted heteroalkyl, substituted or unsubstituted carbocyclic aryl, substituted or unsubstituted heterocyclic aryl, substituted or unsubstituted alkoxy, or a combination thereof, wherein adjacent R1 groups together optionally form a fused ring structure with Ar1; a represents an integer of 2 or more; and b represents an integer of 1 or more, provided that a+b is at least 3 and is not greater than the total number of available aromatic carbon atoms of Ar1, and two or more of R1 are independently a fluorine atom or a fluoroalkyl group bonded directly to an aromatic ring carbon atom.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: September 12, 2023
    Assignee: ROHM AND HAAS ELECTRONIC MATERIALS LLC
    Inventors: Irvinder Kaur, Colin Liu, Xisen Hou, Kevin Rowell, Mingqi Li, Cheng-Bai Xu