Abstract: A first light emitting structure includes a first semiconductor layer, an active layer, and a second semiconductor layer. A second light emitting structure includes a third semiconductor layer, an active layer, and a fourth semiconductor layer. A first electrode and a second electrode connect to the first semiconductor layer, and the second semiconductor layer, respectively. A third electrode and a fourth electrode connect to the third semiconductor layer, and the fourth semiconductor layer, respectively. A first contact portion includes a first region connected to the first electrode and a second region making contact with a top surface of the first semiconductor layer, and a second contact portion connects to the second and third electrodes. A third contact portion includes a first region connected to the third electrode and a second region making contact with a top surface of the third semiconductor layer.

Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.

Abstract: A thin film transistor (TFT) array substrate includes a substrate, a gate electrode, a gate line, a first data line, and a second data line on the substrate, a gate insulating layer that covers the gate electrode and the gate line and includes a first opening that exposes a portion of the first data line and a second opening that exposes a portion of the second data line, an active layer disposed on the gate insulating layer so that at least one portion of the active layer overlaps the gate electrode, a drain electrode and a source electrode that extend from opposite sides of the active layer, a pixel electrode that extends from the drain electrode, and a connection wiring that extends from the source electrode, and connects the first data line to the second data line through the first and second openings of the gate insulating layer.

Abstract: (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. (MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.

Abstract: Methods and apparatus for forming a semiconductor on glass-ceramic structure provide for: subjecting an implantation surface of a donor semiconductor wafer to an ion implantation process to create an exfoliation layer of the donor semiconductor wafer; bonding the implantation surface of the exfoliation layer to a precursor glass substrate using electrolysis; separating the exfoliation layer from the donor semiconductor wafer to thereby form an intermediate semiconductor on precursor glass structure; sandwiching the intermediate semiconductor on precursor glass structure between first and second support structures; applying pressure to one or both of the first and second support structures; and subjecting the intermediate semiconductor on precursor glass structure to heat-treatment step to crystallize the precursor glass resulting in the formation of a semiconductor on glass-ceramic structure.

Abstract: The emission efficiency of a light-emitting device including a microcavity structure is improved. The light-emitting device includes a plurality of light-emitting elements. The plurality of light-emitting elements each include a reflective electrode, a transparent electrode, a plurality of light-emitting layers, and a semi-transmissive and semi-reflective electrode stacked in that order. The plurality of light-emitting layers emit light of different colors. A surface roughness of the transparent electrode in the light-emitting element which is among the plurality of light-emitting elements and in which light emitted from the light-emitting layer closest to the reflective electrode is amplified and emitted outside is greater than surface roughnesses of the transparent electrodes in the other light-emitting elements.

Abstract: A semiconductor apparatus includes a semiconductor chip formed with cut fuses over one surface thereof; and migration preventing modules preventing occurrence of a phenomenon in which metal ions of the fuses migrate to cut zones of the fuses; each migration preventing module including: a ground electrode formed in the semiconductor chip to face the fuse with a first insulation member interposed therebetween; a floating electrode formed over the fuse with a second insulation member interposed therebetween to face the ground electrode with the fuse interposed therebetween; and a power supply electrode formed over the floating electrode with a third insulation member interposed therebetween.

Abstract: A capacitor having a configuration in which capacitors are coupled in series to each other is described. The capacitor formed on a substrate according to an exemplary embodiment of the present invention includes: a polysilicon layer doped with an impurity; a first insulation layer formed on the polysilicon layer; a first metal layer formed on the first insulation layer and including first and second areas; a second insulation layer formed on the first metal layer; and a second metal layer formed on the second insulation layer and coupled to the second area of the first metal layer. The second metal layer is overlapped with at least a part of the first area of the first metal layer.

Abstract: The present application discloses a semiconductor structure and a method for manufacturing the same. A semiconductor structure according to the present invention can adjust the threshold voltage by capacitive coupling between a backgate region either and a source region or a drain region with a common contact, i.e. a source contact or a drain contact, which leads to a simple manufacturing process, a higher integration level, and a lower manufacture cost. Moreover, the asymmetric design of the backgate structure, together with the doping of the backgate region which can be varied as required in an actual device design, can further enhance the effects of adjusting the threshold voltage and improve the performances of the device.

Abstract: A memory cell and a method of manufacturing a memory cell are provided. The memory cell includes a substrate; at least one first electrode disposed above the substrate; at least one second electrode disposed above the at least one first electrode; a moveable electrode disposed between the at least one first electrode and the at least one second electrode; wherein the moveable electrode is configured to move between the at least one first electrode and the at least one second electrode; wherein the moveable electrode comprises metal.

Abstract: A method includes patterning a plurality of magnetic tunnel junction (MTJ) layers to form a MTJ stack, and forming a first dielectric cap layer over a top surface and on a sidewall of the MTJ stack. The step of patterning and the step of forming the first dielectric cap layer are in-situ formed in a same vacuum environment. A second dielectric cap layer is formed over and contacting the first dielectric cap layer.

Abstract: Embodiments of a semiconductor device, a circuit including a semiconductor device and a driver circuit, and a method for operating a semiconductor device are described. In one embodiment, a semiconductor device includes a substrate, a source region, a drain region, and a drain extension region formed in the substrate, and an insulation layer adjacent to the drain extension region. A gate layer and a field plate are formed one of within and on the insulation layer. The field plate is located adjacent to the drain extension region and is electrically insulated from the gate layer and the source region such that a voltage can be applied to the field plate independent from voltages applied to the gate layer and the source region. Other embodiments are also described.

Abstract: In a silicon carbide semiconductor device, a plurality of trenches has a longitudinal direction in one direction and is arranged in a stripe pattern. Each of the trenches has first and second sidewalls extending in the longitudinal direction. The first sidewall is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall is at a second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle. A first conductivity type region is in contact with only the first sidewall in the first and second sidewalls of each of the trenches, and a current path is formed on only the first sidewall in the first and second sidewalls.

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate in which a multi-depth trench is formed, the multi-depth trench including a shallow trench and a deep trench arranged below the shallow trench, a first dielectric material formed in partial area of the multi-depth trench, the first dielectric material including a slope in the shallow trench that extends upward from a corner where a bottom plane of the shallow trench and a sidewall of the deep trench meets, the slope being inclined with respect to the bottom plane of the shallow trench, and a second dielectric material formed in areas of the multi-depth trench in which the first dielectric material is absent.

Abstract: A touch screen substrate includes a base substrate, a first switching element and a first sensing element which senses infrared light. The first switching element includes a first switching gate electrode, a first active pattern disposed on the first switching gate electrode, a first switching source electrode disposed on the first active pattern and a first switching drain electrode disposed apart from the first switching source electrode. The first sensing element includes a first sensing drain electrode connected to the first switching source electrode, a first sensing source electrode disposed apart from the first sensing drain electrode, a second active pattern disposed below the first sensing drain electrode and the first sensing source electrode and including a first amorphous layer, a doped amorphous layer and a second amorphous layer, and a first sensing gate electrode disposed on the first sensing drain electrode and the first sensing source electrode.

Abstract: A nitride based heterojunction semiconductor device includes a gallium nitride (GaN) layer disposed on a substrate, an aluminum (Al)-doped GaN layer disposed on the GaN layer, a Schottky electrode disposed in a first area on the Al-doped GaN layer, an AlGaN layer disposed in a second area on the Al-doped GaN layer, and an ohmic electrode disposed on the AlGaN layer. The first area is different from the second area.

Abstract: Shallow trench isolation structures are provided for use with UTBB (ultra-thin body and buried oxide) semiconductor substrates, which prevent defect mechanisms from occurring, such as the formation of electrical shorts between exposed portions of silicon layers on the sidewalls of shallow trench of a UTBB substrate, in instances when trench fill material of the shallow trench is subsequently etched away and recessed below an upper surface of the UTBB substrate.

Abstract: A method (70) of forming sensor packages (20) entails providing a sensor wafer (74) having sensors (30) formed on a side (26) positioned within areas (34) delineated by bonding perimeters (36), and providing a controller wafer (82) having control circuitry (42) at one side (38) and bonding perimeters (46) on an opposing side (40). The bonding perimeters (46) of the controller wafer (82) are bonded to corresponding bonding perimeters (36) of the sensor wafer (74) to form a stacked wafer structure (48) in which the control circuitry (42) faces outwardly. The controller wafer (82) is sawn to reveal bond pads (32) on the sensor wafer (74) which are wire bonded to corresponding bond pads (44) formed on the same side (38) of the wafer (82) as the control circuitry (42). The structure (48) is encapsulated in packaging material (62) and is singulated to produce the sensor packages (20).

Abstract: The present disclosure relates to a structure and method to create a self-repairing dielectric material for semiconductor device applications. A porous dielectric material is deposited on a substrate, and exposed with treating agent particles such that the treating agent particles diffuse into the dielectric material. A dense non-porous cap is formed above the dielectric material which encapsulates the treating agent particles within the dielectric material. The dielectric material is then subjected to a process which creates damage to the dielectric material. A chemical reaction is initiated between the treating agent particles and the damage, repairing the damage. A gradient concentration resulting from the consumption of treating agent particles by the chemical reaction promotes continuous diffusion the treating agent particles towards the damaged region of the dielectric material, continuously repairing the damage.

Abstract: The present invention relates to a package structure for light-emitting diodes (LEDs). The package structure includes a substrate, a heat-dissipating structure disposed on the substrate, and a plurality of LED chips uniformly disposed on the heat-dissipating structure. The heat-dissipating structure has a central portion and at least one peripheral portion surrounding thereof. The central portion is capable of dissipating more heat than the peripheral portion. Thus, the temperature difference between the LED chips disposed on the central portion and the LED chips disposed on the peripheral portion can be reduced.