Abstract: A wireless power transfer system for wirelessly powering a conveyance apparatus of a first conveyance system and a conveyance apparatus of a second conveyance system including: a wireless electrical power transmitter located along a support or a side of the first conveyance system and a support or a side of the second conveyance system; a wireless electrical power receiver of the first conveyance system located along a surface of the conveyance apparatus of the first conveyance system opposite the support or the side of the first conveyance system; a wireless electrical power receiver of the second conveyance system located along a surface of the conveyance apparatus of the second conveyance system opposite the support or the side of the second conveyance system, wherein the wireless electrical power transmitter is configured to wirelessly transmit electric power to the wireless electrical power receiver of the first and second conveyance system.

Abstract: A device includes: a capacitor having first and second terminals; a first switch; a second switch coupled to the second terminal; a first multiplier coupled between the first and second terminals; a second multiplier coupled between the first and second terminals; and a buffer having an input terminal and an output terminal. The first switch is coupled between the output terminal and the first terminal.

Abstract: A power supply system P is provided with a fuel cell 1 and a battery unit 2 connected to the fuel cell 1. The battery unit 2 is provided with a first battery 21 connected to the fuel cell 1 so as to supply power to an auxiliary machine 12 of the fuel cell 1 and to be able to be charged with generated power of the fuel cell 1, a second battery 22 connected to the auxiliary machine 12 of the fuel cell 1 through a path p4 different from that of the first battery 21 so as to be able to supply power, and switchers R1, R2 configured to switch the power supply source to the auxiliary machine 12 of the fuel cell 1 between the first battery 21 and the second battery 22.

Abstract: A self charging mug that is capable of charging or discharging an energy storage system thereof to charge a phone and heat or cool a liquid therein. The self charging mug includes an outer shell and an inner shell nested within the outer shell. The self charging mug also includes a thermal interface member in contact with the inner shell and a thermal electric plate engaged with the thermal interface member. The self charging mug further includes a component fixture assembly and an energy storage system arranged within the component fixture assembly. The self charging mug also includes a bidirectional power supply and a seal connector secured to the bidirectional power supply. The self charging mug also includes a battery management system in contact with the component fixture assembly and a charge and discharge controller arranged on a surface of the battery management system in order to control the charging and discharging of the battery according to the present invention.

Abstract: Various examples are provided related to wireless charging of electric vehicles. In one example, a wireless charging system includes a transmitter pad including a primary coil supplied by a power source, and alignment control circuitry configured to determine an alignment condition of the transmitter pad with respect to a receiver pad of an electric vehicle. In another example, a wireless charging system includes a receiver pad including a secondary coil; and alignment processing circuitry configured to determine an alignment condition of the receiver pad with respect to a transmitter pad comprising a primary coil supplied by a power source. In another example, a method includes measuring output voltages of a plurality of auxiliary coils mounted on a secondary coil located over a primary coil of the wireless charging system and determining a lateral misalignment between the primary and secondary coils using the output voltages.

Abstract: A system includes a digital phase-locked loop (DPLL) having a loop filter and a digitally-controlled oscillator (DCO). The system also includes a clock generator coupled to an output of the DPLL, and a plurality of clock domains coupled to the clock generator. The DPLL is configured to transition between a low power mode and a normal mode, wherein the loop filter is configured to maintain its value when the DPLL transitions from the normal mode to the low power mode. The DCO is configured to output a DCO clock signal based on the maintained loop filter value when the DPLL transitions from the low power mode to the normal mode.

Abstract: A system for controlling a tattoo machine configured to push ink includes a computerized processor configured to control a voltage supplied to the tattoo machine. The computerized processor includes programming configured to monitor a hand gesture input, determine a desired command for the tattoo machine based upon the monitored hand gesture input, and control the voltage supplied to the tattoo machine based upon the determined desired command. Monitoring the hand gesture input can include monitoring a touch-free hand gesture sensor.

Abstract: A solenoid generator (11) comprises: —a first electrical winding (23) wound along a longitudinal axis (X11) of the generator; —a second electrical winding (24) wound along the aforesaid longitudinal axis (X11) of the generator around the first winding (23) so as to form, with respect to the first winding (23) a tubular chamber; and —an annular magnet (22) fitted around the first winding (23) and capable of relative movement with respect to the first winding (23) and to the second winding (24) in the aforesaid tubular chamber along the longitudinal axis (X11) of the generator. Preferential application is in power-supply systems for mobile/portable devices, such as mobile communication devices.

Abstract: A power supply system disclosed herein may include: a first voltage sensor measuring voltage of a main power source; a power converter connected to a main power source through a relay; a voltage converter; and a controller. The power converter includes a capacitor connected to the main power source and a second voltage sensor measuring voltage of the capacitor. The controller precharges the capacitor with the voltage converter before closing the relay. The controller may be configured to: set target voltage by a measurement value of the first voltage sensor; acquire the measurement value of the first voltage sensor again as verification voltage when a difference between the target voltage and control voltage which is a measurement value measured by the third voltage sensor has fallen within a predetermined tolerance; and close the relay if a difference between the control voltage and the verification voltage is within the tolerance.

Abstract: A primary unit for an inductive charging system includes a primary coil, which is configured to generate a magnetic field in response to a coil current through the primary coil; a first inverter, which is coupled to the primary coil via a first capacitor and which is configured to charge and/or discharge the first capacitor based on a first input voltage; and a second inverter, which is coupled to the primary coil via a second capacitor and which is configured to charge and/or discharge the second capacitor based on a second input voltage. The primary unit has a control unit, which is configured to identify capacitance information with respect to an effective capacitance of a primary resonant circuit of the primary unit, and to actuate the first inverter and the second inverter depending on the capacitance information in order to effect the coil current through the primary coil.

Abstract: A wireless power supply device includes a first housing, a transmitting coil assembly mounted in the first housing, a second housing, and a receiving coil assembly mounted in the second housing and electromagnetically coupled with the transmitting coil assembly. The first housing has a U-shaped outer contour and includes a first portion, a second portion, and a third portion. The second portion and the third portion extend perpendicularly to the first portion from opposite ends of the first portion. The second portion and the third portion form a recess between the second portion and the third portion. The second housing extends into the recess.

Abstract: An integrated circuit includes: a clock domain having a clock domain input; and clock management logic coupled to the clock domain. The clock management logic includes: a PLL having a reference clock input and a PLL clock output; a divider having a divider input and a divider output, the divider input coupled to the PLL clock output; and bypass logic having a first clock input, a second clock input, a bypass control input, and a bypass logic output, the first clock input coupled to divider output, the second clock input coupled to the reference clock input, and the bypass logic output coupled to the clock domain input. The bypass logic selectively bypasses the PLL and divider responsive to a bypass control signal triggered by a reset signal. The reset signal also triggers a reset control signal delayed relative to the bypass control signal.

Abstract: An apparatus is provided for low latency adaptive clocking, the apparatus comprises: a first power supply rail to provide a first power; a second power supply rail to provide a second power; a third power supply rail to provide a third power; a voltage divider coupled to the first, second, and third power supply rails; a bias generator coupled to voltage divider and the third power supply rail; an oscillator coupled to the bias generator and the first supply rail; and a clock distribution network to provide an output of the oscillator to one or more logics, wherein the clock distribution network is coupled to the second power supply rail.

Abstract: An electronic device includes three delay-locked loops, three dummy voter circuits, and a voter circuit. Each of the three delay-locked loops has a first input end, a second input end, an output end to maintain the phase difference between the reference clock signal received from the first input end and the intermediate clock signal output from the output end. Each of the three voter circuits is connected between the second input end and the output end of each of the three delay-locked loops to delay the phase of the intermediate clock signal by the phase difference. The voter circuit receives the intermediate clock signal from each of the three delay-locked loops, and outputs an output clock signal according to the logic of the intermediate clock signal from each of the three delay-locked loops. The phase difference compensates for the phase delay of the intermediate clock signal passing through the voter circuit.

Abstract: An output terminal of a power supply circuit is coupled to a load. A control circuit charges multiple intermediate capacitors using an input voltage in a time-sharing manner. Furthermore, the control circuit selects at least one intermediate capacitor that is not being charged from among the multiple intermediate capacitors, and couples the intermediate capacitor thus selected to an output capacitor.

Abstract: An electronic circuit includes a clock signal generator configured to deliver a clock signal. A propagation circuit is configured to propagate the clock signal on a plurality of propagation branches. A number of timers are coupled to at least some of the branches. The timers are clocked by corresponding replicas of the clock signal and configured to generate a pulse signal every N pulses of the corresponding replica of the clock signal. A comparator is configured to generate an alarm signal having a first state when two of the pulse signals are phase-offset with respect to one another.

Abstract: The disclosure provides a delay estimation device and a delay estimation method. The delay estimation device includes a pulse generator, a digitally controlled delay line (DCDL), a time-to-digital converter (TDC), and a control circuit. The pulse generator receives a reference clock signal, outputs a first clock signal in response to a first rising edge of the reference clock signal, and outputs a second clock signal in response to a second rising edge of the reference clock signal. The DCDL receives the first clock signal from the pulse generator and converts the first clock signal into phase signals based on a combination of delay line codes. The TDC samples the phase signals to generate a timing code based on the second clock signal. The control circuit estimates a specific delay between the first clock signal and the second clock signal based on the timing code.

Abstract: A multi-line supply unit for a vehicle control unit, including at least two supply lines each connected to a vehicle voltage source at the input and brought together at a common node at the output; and a protective device, including, in each of the supply lines, at least one first damping diode looped into the supply lines in the forward direction, between the vehicle voltage source and the node; and an operating method for such a multi-line supply unit. At least one switch element is looped into each of the supply lines, respectively, in parallel with the damping diode, respectively; an evaluation and control unit measuring and evaluating a line voltage at the inputs of the supply lines, respectively, and measuring and evaluating a reverse-polarity-protected supply voltage at the common node, and controlling the switch elements in the supply lines as a function of the evaluation, using corresponding control signals.

Abstract: An automotive power converter includes a pair of series connected switches and an inductor including a core having a leg, a winding wound around the leg, and a terminal center tapping the switches. The leg includes a plurality of alternating frames and solid blocks arranged to define a continuous contact surface for the winding and to define internal cavities within the leg such that each of the frames surrounds one of the internal cavities.

Abstract: A phase detection circuit is configured to receive an input clock signal and a reference clock signal. The phase detection circuit is configured to generate a divided clock signal from the reference clock signal. The phase detection circuit is configured to generate a phase detection signal after comparing the phase of the input clock signal with the divided clock signal.