Patents Examined by Jose K Abraham
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Patent number: 12142429Abstract: Cold-sprayed aluminum capacitors on lead frame metal foils are provided for applications in 3D power package integration. This additive manufacturing process allows pre-patterned low-temperature processing of aluminum electrodes on metal lead frames, insulated metal substrates or even heat-spreaders and cold-plates. Cold-sprayed capacitors can eliminate several process integration and reliability issues that are associated with traditional discrete surface-assembled capacitors.Type: GrantFiled: March 26, 2024Date of Patent: November 12, 2024Assignee: The Florida International University Board of TrusteesInventors: Markondeyaraj Pulugurtha, Arvind Agarwal, Cheng Zhang, Reshmi Banerjee, Denny John
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Patent number: 12120824Abstract: A placement head for automatically placing electronic components on a component carrier. The placement head has a chassis; a first rotor assembly that is mounted so that it is rotatable relative to the chassis about a first axis of rotation and that has a first quantity of first handling devices; and a second rotor assembly that is mounted so that it is rotatable relative to the chassis about a second axis of rotation and that has a second quantity of second handling devices. Each handling device includes a sleeve to which a component holding device for temporarily picking up a component can be attached, and a drive device with a linear drive for moving the sleeve along its longitudinal axis, and a rotary drive for rotating the sleeve about its longitudinal axis. Furthermore, a placement machine with such a placement head and a method for automatic assembly of a component carrier using such a placement head.Type: GrantFiled: June 17, 2021Date of Patent: October 15, 2024Assignee: ASMPT GMBH & CO. KGInventors: Karl-Heinz Besch, Thomas Bliem, Thomas Rossmann, Klaus Sattler, Michele Trigiani, Markus Huber
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Patent number: 12119141Abstract: Methods and systems for a dielectric material coated busbar are provided. In one example, a conductive material may be formed into a shape of a busbar and portions of the busbar may be selectively coated with a dielectric material which may be both electrically insulating and thermally conductive. The dielectric coated portions of the busbar may dissipate heat to a heat sink via a thermal interface material compressed on the busbar.Type: GrantFiled: April 9, 2020Date of Patent: October 15, 2024Assignee: DANA TM4 INC.Inventors: Marc-Antoine Beaupre, Francois Dube, Luke Miller, Cristian Campean
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Patent number: 12109641Abstract: The present disclosure generally relates to a method and apparatus for forming a substrate having a graduated refractive index. A method of forming a waveguide structure includes expelling plasma from an applicator having a head toward a plurality of grating structures formed on a substrate. The plasma is formed in the head at atmospheric pressure. The method further includes changing a depth of the plurality of grating structures with the plasma by removing grating material from the plurality of grating structures.Type: GrantFiled: November 17, 2021Date of Patent: October 8, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Kang Luo, Ludovic Godet, Daihua Zhang, Nai-Wen Pi, Jinrui Guo, Rami Hourani
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Patent number: 12113410Abstract: A method of manufacturing a motor assembly comprising a motor and an impeller coupled to a rotation shaft of the motor, the method includes disposing a plurality of balls in a ring-shaped groove formed in a surface of the impeller; rotating the impeller at a speed greater than a resonant rotation speed to move the balls to a compensation position for compensating for an eccentricity in the motor assembly; and fixing the balls at the compensation position in the groove.Type: GrantFiled: June 23, 2022Date of Patent: October 8, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Minsung Kim, Kwanwoo Hong, Jeonghoon Kang, Sung Han
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Patent number: 12108525Abstract: An objective of the present invention is to prevent a copper foil used as a recognition mark from being stripped from a base film in a flexible printed board while preventing the recognition accuracy for the recognition mark from being reduced. A flexible printed board includes a base film; a copper foil pattern on the base film, wherein the copper foil pattern has a hollow shape with an outer circumferential section and an inner circumferential section and is configured to function as a recognition mark; a coverlay having an opening formed therein, wherein the coverlay is bonded to the base film and covers the outer circumferential section of the copper foil pattern such that an edge of the opening is positioned between the outer circumferential section and the inner circumferential section of the copper foil pattern.Type: GrantFiled: January 19, 2022Date of Patent: October 1, 2024Assignee: YAZAKI CORPORATIONInventors: Hidehiko Shimizu, Tomohiro Sugiura
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Patent number: 12108544Abstract: A circuit board including an adhesive part, a ceramic board part with the adhesive part, and a printed circuit board part with the adhesive part. The ceramic board and printed circuit board parts are made of different materials. The adhesive part includes: an adhesive layer including an adhesive material, an adhesive part opening, and a conductive paste filled in an inside of the adhesive part opening. A method including providing a ceramic board part, providing a printed circuit board part, and producing an adhesive part. Batch-bonding the printed circuit board part, the adhesive part, and the ceramic board part with one another. Producing the adhesive part includes: bonding a protection layer on two surfaces of an adhesive layer, forming an adhesive part opening penetrating the adhesive layer and the protection layer, filling the adhesive part opening with a conductive paste, and removing the protection layer.Type: GrantFiled: December 20, 2021Date of Patent: October 1, 2024Assignee: TSE CO., LTD.Inventors: Eun Ha Park, Sang Wook Youn, Young Jun Kim, Yu Jin Choi, Kum Sun Park, Chung Hyeon Kim
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Patent number: 12107466Abstract: First receiving recesses for receiving distal end portions of slot insertion portions of normal coil segments, and second receiving recesses for receiving distal end portions of long slot insertion portions of variant coil segments are formed at circumferential intervals on outer peripheral surface of an inner twisting jig corresponding to the innermost layer. In a state where the distal end portions of the long slot insertion portions before being twisted are inserted into the second receiving recesses, the first receiving recesses are at positions displaced in the circumferential direction with respect to the distal end portions to be housed therein. Primary twisting is performed by rotating the inner twisting jig in this state, and then the distal end portions of the normal coil segments are inserted into the first receiving recesses and the secondary twisting is performed with a rotational amount larger than that of the primary twisting.Type: GrantFiled: July 20, 2022Date of Patent: October 1, 2024Assignee: ODAWARA ENGINEERING CO., LTD.Inventors: Noboru Wakebe, Yuji Miyazaki
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Patent number: 12096549Abstract: Electronic modules having complex contact structures may be formed by encapsulating panels containing pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within the panel along the cut lines. Holes defining contact regions along the electronic module sidewall may be cut into the panel along the cut lines to expose the buried interconnects. The panel may be metallized, e.g. by a series or processes including plating, on selected surfaces including in the holes to form the contacts and other metal structures followed by cutting the panel along the cut lines to singulate the individual electronic models. The contacts may be located in a conductive grove providing a castellated module.Type: GrantFiled: January 24, 2022Date of Patent: September 17, 2024Assignee: Vicor CorporationInventors: Patrizio Vinciarelli, Patrick R. Lavery, Rudolph F. Mutter, Jeffery J. Kirk, Andrew T. D'Amico
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Patent number: 12095437Abstract: Acoustic resonator devices and filters are disclosed. An acoustic resonator chip includes a piezoelectric plate attached to a substrate, a portion of the piezoelectric plate forming a diaphragm spanning a cavity in the substrate. A first conductor pattern formed on a surface of the piezoelectric plate includes an interdigital transducer with interleaved fingers on the diaphragm, and a first plurality of contact pads. A second conductor pattern is formed on a surface of an interposer, the second conductor pattern including a second plurality of contact pads. Each pad of the first plurality of contact pads is directly bonded to a respective pad of the second plurality of contact pads. A seal is formed between a perimeter of the acoustic resonator chip and a perimeter of the interposer.Type: GrantFiled: October 9, 2021Date of Patent: September 17, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Patrick Turner, Mike Eddy, Andrew Kay, Ventsislav Yantchev, Charles Chung
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Patent number: 12088007Abstract: Exemplary embodiments are described herein for compactable antennas and methods of making such an antenna. Exemplary compactable antennas include a support structure and a reflector surface. The support structure may directly or indirectly define the reflector shape. Exemplary embodiments comprise deployable support structures to permit the compactable antenna to have a smaller volume stowed configuration and a larger volume deployed configuration.Type: GrantFiled: February 5, 2021Date of Patent: September 10, 2024Assignee: L'Garde, Inc.Inventors: Arthur Libornio Palisoc, Linden Bolisay
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Patent number: 12063745Abstract: A method for processing substrates, in particular wafers, masks or flat panel displays, with a semi-conductor industry machine, wherein a computer-supported process is used to determine the presence and/or position and/or orientation of the substrate. Further, a system designed to execute the method. The computer-supported process includes an artificial neural network.Type: GrantFiled: May 3, 2021Date of Patent: August 13, 2024Assignee: Integrated Dynamics Engineering GmbHInventor: Andreas Birkner
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Patent number: 12063748Abstract: Systems, methods, and devices related to catalyzed metal foils are disclosed. Contemplated metal foils have a bottom surface, preferably roughened to Ra of at least 0.1 ?m, bearing a catalyst material. The metal foils are etchable, typically of aluminum or derivative thereof, and is less than 500 ?m thick. Methods and systems for forming circuits from catalyzed metal foils are also disclosed. The catalyst material bearing surface of the metal foil is applied to a substrate and laminated, in some embodiments with a thermoset resin or thermoplastic resin therebetween or an organic material first coating the catalytic material. The metal foil is removed to expose the catalyst material, and a conductor is plated to the catalyst material.Type: GrantFiled: February 12, 2021Date of Patent: August 13, 2024Assignee: Averatek CorporationInventors: Shinichi Iketani, Sunity K Sharma, Gary Lawrence Borges, Michael Riley Vinson
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Patent number: 12062898Abstract: A method for manufacturing a busbar (1), in particular a laminated busbar (1), configured for mounting an electronic component, in particular a passive electronic component such as a capacitor, on the busbar (1), comprising: providing a first conductive layer (11) made from aluminum, providing a first connector element (15) for connecting the first conductive layer (11) and the electronic component, wherein the first connector element (15) is at least partially covered with nickel and/or tin, and creating an bond between the first conductive layer (11) and the first connector element (15) by laser welding.Type: GrantFiled: April 29, 2019Date of Patent: August 13, 2024Assignee: ROGERS BVInventors: Wei Shi, Liang Tang
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Patent number: 12062515Abstract: Method of manufacturing a high voltage power fuse having a dramatically reduced size facilitated by silicated filler material, a formed fuse element geometry, arc barrier materials and single piece terminal fabrications. The method includes: connecting a full-range fuse element assembly including first and second metal strip fuse elements defining a plurality of weak spots therein and being connected in parallel to one another, the first metal strip fuse element configured to uniquely respond to a short circuit current condition and the second metal strip fuse element configured to uniquely respond to an overload current condition and a set of arc barriers at selected locations to surround respective cross sectional portions are disclosed.Type: GrantFiled: October 30, 2019Date of Patent: August 13, 2024Assignee: Eaton Intelligent Power LimitedInventors: Robert Stephen Douglass, John Michael Fink
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Patent number: 12052830Abstract: The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.Type: GrantFiled: December 6, 2021Date of Patent: July 30, 2024Assignee: Advantest America, Inc.Inventor: Donald Eric Thompson
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Patent number: 12046963Abstract: A hairpin alignment device for the hairpin winding motor according to an embodiment includes a rotation unit in which the dummy core is mounted in the center and rotates the dummy core by a first predetermined angle in correspondence with the number of slots, an alignment unit disposed on the upper surface of the rotation unit, and including a plurality of push bars disposed along the upper end circumference of the dummy core and reciprocating in a radial direction with respect to the hairpin, a guide unit disposed on the side of the rotation unit, selectively operating with the hairpin overlapped in each layer when pre-aligning the hairpin to the slot, and moving the overlapping hairpin outward in a radial direction to secure an inserting space of the hairpin, and a handling gripper adjacent to the rotation unit and supplying the hairpin to the slot.Type: GrantFiled: November 29, 2021Date of Patent: July 23, 2024Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventor: Jaehwan Lee
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Patent number: 12037239Abstract: A method of forming a monolithic integrated PMUT and CMOS with a coplanar elastic, sealing, and passivation layer in a single step without bonding and the resulting device are provided. Embodiments include providing a CMOS wafer with a metal layer; forming a dielectric over the CMOS; forming a sacrificial structure in a portion of the dielectric; forming a bottom electrode; forming a piezoelectric layer over the CMOS; forming a top electrode over portions of the bottom electrode and piezoelectric layer; forming a via through the top electrode down to the bottom electrode and a second via down to the metal layer through the top electrode; forming a second metal layer over and along sidewalls of the first and second via; removing the sacrificial structure, an open cavity formed; and forming a dielectric layer over a portion of the CMOS, the open cavity sealed and an elastic layer and passivation formed.Type: GrantFiled: March 18, 2021Date of Patent: July 16, 2024Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: You Qian, Humberto Campanella-Pineda, Rakesh Kumar
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Patent number: 12034423Abstract: An acoustic resonator is fabricated by etching a recess in a silicon thermal oxide (TOX) upper layer of a silicon substrate and filling the recess with sacrificial polysilicon. A surface of the silicon TOX layer and the sacrificial polysilicon-filled recess are planarized. A back surface of a single-crystal piezoelectric plate is bonded to the planarized surface of the silicon TOX layer. Openings are formed through the piezoelectric plate and an interdigital transducer (IDT) is formed on a front surface of the piezoelectric plate such that interleaved fingers of the IDT are disposed over the sacrificial polysilicon-filled recess. The sacrificial polysilicon is removed from the recess to form a cavity such that a portion of the piezoelectric plate forms a diaphragm spanning the cavity and the interleaved fingers of the IDT are disposed on the diaphragm.Type: GrantFiled: December 9, 2020Date of Patent: July 9, 2024Assignee: MURATA MANUFACTURING CO., LTDInventors: Patrick Turner, Ryo Wakabayashi
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Patent number: 12028039Abstract: A method of forming a filter device has a bonding layer formed on a substrate having at least a location for a first cavity and a location for a second cavity on a single die. A piezoelectric plate is bonded to the bonding layer and spans the first and the second cavity. Excess portions of piezoelectric plate are removed that extend a certain length past the perimeter of the first cavity and of the second cavity. Excess portions may be piezoelectric material that extends in the length and width direction past the perimeter of a cavity by more than between 2 and 25 percent of the cavity perimeter. An interdigital transducer (IDT) is on a front surface of the piezoelectric plate and having interleaved fingers over the first cavity.Type: GrantFiled: December 18, 2020Date of Patent: July 2, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Ventsislav Yantchev