Abstract: The present invention proposes a new method and apparatus for the improvement of digital filterbanks, by a complex extension of cosine modulated digital filterbanks. The invention employs complex-exponential modulation of a low-pass prototype filter and a new method for optimizing the characteristics of this filter. The invention substantially reduces artifacts due to aliasing emerging from independent modifications of subband signals, for example when using a filterbank as an spectral equalizer. The invention is preferably implemented in software, running on a standard PC or a digital signal processor (DSP), but can also be hardcoded on a custom chip. The invention offers essential improvements for various types of digital equalizers, adaptive filters, multiband companders and spectral envelope adjusting filterbanks used in high frequency reconstruction (HFR) systems.

Abstract: A sampling clock generator circuit comprises a ring oscillator including series-connected m first inverters connected to a first power supply line, where m is an odd number equal to or larger than 3, a delay line including series-connected 2m or 2m?1 second inverters connected to a second power supply line, for delaying an externally supplied clock, and a PLL circuit for controlling an oscillation frequency of the ring oscillator by controlling a voltage of the first power supply line by using the ring oscillator as a voltage controlled oscillation circuit. A voltage of the second power supply line is set substantially equal to the voltage of the first power supply line and the delayed clock obtained by the second inverters is used as a sampling clock.

Abstract: A physical layer transceiver, configured for retrieving signal samples from a prescribed network medium having an undetermined length, includes a digital feedforward equalizer, configured for generating equalized signal samples from the retrieved signal samples and based on supplied equalizer settings, and an equalizer controller. The equalizer controller is configured for supplying selected equalizer settings that overcome intersymbol interference encountered by transmission of the signal samples across the prescribed network medium. The equalizer controller is configured for supplying prescribed initial equalizer settings to the digital feedforward equalizer, receiving equalized signal samples from the digital feedforward equalizer, and selectively changing the prescribed initial equalizer settings based on comparing the equalized signal samples to a prescribed equalization threshold.

Abstract: A method for transmitting a digital data word, and an apparatus for carrying out the method, include the following processing steps: First, the data word is converted into a first serial differential data sequence which contains the information in at least one initialization bit and in the data bits of the data word in time with a clock signal. The data word is also converted into a second serial differential data sequence which contains the information in at least one initialization bit and in the data bits of an inverted data word, obtained by inverting the data word, in time with the clock signal. Next, the first differential data sequence is transmitted via a first data channel, and the second differential data sequence is transmitted via a second data channel.

Abstract: In a searcher of a CDMA receiver comprising an array antenna, a voltage profile generation portion performs correlation computations of received signals for each antenna element and generates received signal voltage profiles; a phase difference estimation portion uses sample data from each voltage profile at the same time to perform correlation calculations among antenna elements and estimates the phase difference among antenna elements at the above time, and similarly estimates the phase differences among antenna elements at each time. An in-phase synthesis portion uses the phase difference estimate at a prescribed time to coordinate the phases of voltage profiles for each antenna element at the above time and performs synthesis, and similarly coordinates the phases of each antenna element voltage profile at other times and performs synthesis; and, a path detection portion detects the path timing of multiple paths based on the synthesized profile obtained by the in-phase synthesis portion.

Abstract: A modified gain system and method are provided for non-causal channel equalization using feed-forward and feedback compensation. The method comprises: receiving a serial data stream first bit (present) input; comparing a second bit (past) value, received prior to the first bit input, to a third bit (future) value received subsequent to the first bit input; modifying the amplitude of the first bit input to compensate for the effect of the second and third bit values being equal; and, determining the value of the first bit input by comparing the amplitude modified first bit input to a Vopt threshold. When only one of the second and third bit values is a “1” value, a unity amplitude modifier is supplied. When the second and third bit values are a “1”, a low amplitude modifier is supplied. When the second and third bit values are a “0”, a high amplitude modifier is supplied.

Abstract: A high-speed maximum likelihood sequence estimation method and device. The method includes identifying candidate paths through a state trellis based on a group of observed data, where each candidate path corresponds to a best path through a trellis beginning at one of a possible prior states (and corresponding prior data bit or bits), and then selecting one of the paths based on candidate sequence selection information, typically prior state decisions (e.g., data symbols in the form of one or more bits). The path selection, in turn, provides decoding of symbols and data bit information for use in selecting one of the candidate paths in a subsequent stage.

Abstract: A method of splitting a signal (10) into two parts (10?, 10?) is disclosed together with signal processing circuitry (22) for the same. The method comprises the steps of derotating the signal (10) whereby the frequency band of the derotated signal overlaps zero frequency; and splitting the derotated signal into two parts, a first signal part (10?) consisting substantially of positive frequency signal components and a second signal part (10?) consisting substantially of negative frequency signal components. Also disclosed is methods, incorporating such a method of splitting a signal, for identifying the presence of in-band interference (11) in a signal and for despreading a spread spectrum signal.

Abstract: In accordance with the present invention, a Digital Subscriber Line (DSL) network for improving the transmission of DSL signals over a local loop is disclosed. The DSL network includes a loop extender with communications, control, and diagnostic functionality, and a central office including a Digital Subscriber Line Access Multiplexer (DSLAM) and a central office controller coupled to the loop extender via the local loop for controlling the loop extender.

Abstract: The methodology accomplishes adaptive hybrid selection during ADSL modem training. The adaptive hybrid selection method maximizes performance for ADSL modems in the presence of various impairments on the line by optimally selecting the appropriate hybrid based on line conditions. Specifically, the adaptive hybrid selection method is based on a measure directly coupled to the channel capacity.

Abstract: A multipath searching device includes a radio front-end for converting a received radio signal into a baseband signal and for outputting the baseband signal. A profile calculating unit is included for calculating and outputting the multipath profile of the baseband signal. A first detector determines whether or not the radio signal traveled along a multipath is having a short-delay path by comparing the peak value of the multipath profile with a profile value of a predetermined position time interval before or after the peak of the multipath profile. A path selector receives the multipath profile and the detection result of the first detector, generates time delay information for each path, and separates many paths along which the radio signal traveled. A receiving unit receives the time delay information of the paths, despreads the baseband signal, and combines despread signals.

Abstract: There is provided an apparatus for generating a transmission of local oscillation signals and a reception of local oscillation signals in a mobile terminal. The apparatus includes: a first phase locked loop (PLL) block configured to generate a transmission local oscillation signal; a second PLL block configured to generate a reception local oscillation signal; and a controller configured to control the first PLL block to operate before a minimum time period required for the first PLL block to lock up from a start point of a transmission burst period and the second PLL block to operate before a minimum time period required for the second PLL block to lock up from a start point of a reception burst period.

Abstract: A new modulation scheme in UWB communications is introduced. This modulation technique utilizes multiple orthogonal transmitted-reference pulses for UWB channelization. The proposed UWB receiver samples the second order statistical function at both zero and non-zero lags and matches the samples to stored second order statistical functions, thus sampling and matching the shape of second order statistical functions rather than just the shape of the received pulses.

Abstract: A Digital Subscriber Line (DSL) network for improving the transmission of DSL signals includes a plurality of local loops for transmission of upstream and downstream DSL signals, control signals, and Direct Current (DC) power, a plurality of loop extenders with communications, control, and diagnostic functionality for amplifying the DSL signals, a loop extender communications/power supply for receiving the DC power and control signals, providing DC power to the plurality of loop extenders, and broadcasting the received control signals to the plurality of loop extenders, and a central office controller/power supply for controlling access to the plurality of local loops and controlling the plurality of loop extenders.

Abstract: A synchronization code detecting apparatus is designed for synchronization code detection in cell search in a code division multiple access (CDMA) system. The synchronization code detecting apparatus mainly includes a compensation unit for providing frequency offset compensation to the incoming signal and for determining a plurality of sampling points of the incoming signal. A plurality of sub-detecting units is coupled to the compensation unit for detecting a synchronization code of the incoming signal transmitting from the compensation unit. A selection unit is coupled to the output of each sub-detecting unit for selecting a plurality of slot boundaries as a plurality of candidates to be forwarded to a second processing stage. Consequently, the synchronization code detecting apparatus effectively reduces the effect of clock offset in the system without increasing the hardware complexity and power consumption.

Abstract: A technique for performing a frequency error correction process is provided that may be used in receivers of wireless local area network systems. The technique comprises a three-phase process generating a frequency approximation value based on a frequency error estimate, starting a channel estimation process that uses the generated frequency approximation value, refining the generated frequency approximation value, and compensating a frequency error using the refined frequency approximation value. Further, a corresponding integrated circuit chip and an operation method are provided. Using the technique for performing a frequency error correction process may provide high reliability, high precision and improved operation speed.

Abstract: A high-frequency signal receiver includes a variable gain amplifier for amplifying a high frequency signal input thereto, a local oscillator, a mixer for mixing a signal output from the variable gain amplifier and a signal output from the local oscillator, a filter for receiving a signal output from the mixer, a gain controller for outputting a voltage according to the signal output from the mixer; and a weighting circuit for weighting and summing a control voltage and the signal output from the gain controller for controlling the gain of the variable gain amplifier. The high-frequency signal receiver hence creates a small amount of signal error even when the input signal includes a large interference signal adjacent to a desired signal.

Abstract: An analog spread spectrum signal generation circuit. A clock generator generates a periodic signal. A plurality of switchable analog loading elements each load the periodic signal by a respective load to vary propagation delay of the periodic signal to an output node. A decoder controls the plurality of switchable analog loading elements. A counter coupled to drive the decoder causes the output node to generate a periodic spread spectrum signal with modulated phase. In one embodiment, the periodic spread spectrum signal with modulated phase is used for reducing radiated electromagnetic interference and downstream phase-locked loop tracking error.

Abstract: Improved frequency drift and phase error compensation in a VOFDM receiver. The invention is operable to compensate for frequency drift and phase error within a window that may include a single frame, a sub-frame, or multiple frames. The compensation is performed after having performed estimation of the phase within the particular window; any phase error and frequency drift may be identified and an appropriate form of compensation may be identified to perform curve fitting of the phase within the compensation window. The curve fitting of the phase is performed using linear techniques in one embodiment; an average phase and appropriate slope/ramp are calculated to match the phase as accurately as possible. Other alternative compensation techniques may also be performed, including higher order curve matching techniques. The receiver is operable to perform any necessary compensation before passing the now-compensated data to a symbol processing functional block.

Abstract: A method and system for serial communication capable of increasing the speed of the transmission of serial data are provided. A block mode is employed if transmission of serial data having a specific length is required, and under which data to be transmitted are divided into plural blocks, and firstly transmitted is block information that notifies which blocks out of the entire blocks will be transmitted, and then transmitted are the data included in the blocks notified by the block information. The burst mode is a mode under which the block information which is currently transmitted is compared with the block information which was previously transmitted, and, if the two are the same, transmission of the data is introduced, while the block information being omitted. The system attached mode information notifying the mode through which data will be transmitted, to the data to be transmitted.