Patents Examined by Juan Alberto Torres
  • Patent number: 6961390
    Abstract: A system and method are provided for non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; establishing thresholds to distinguish a first bit estimate; comparing the first bit estimate in the NRZ data stream to a second bit value received prior to the first bit, and a third bit received subsequent to the first bit; in response to the comparisons, determining the value of the first bit; tracking the NRZ data stream inputs in response to sequential bit value combinations; maintaining long-term averages of the tracked NRZ data stream inputs; adjusting the thresholds in response to the long-term averages; and, offsetting the threshold adjustments to account for the asymmetric noise distribution. Two methods are used to offset the threshold adjustments to account for the asymmetric noise distribution: forward error correction (FEC) decoding and tracking the ratio of bit values.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: November 1, 2005
    Assignee: Applied Micro Circuits Corporation
    Inventors: Warm Shaw Yuan, Daniel M. Castagnozzi, Alan Michael Sorgi, Keith Michael Conroy
  • Patent number: 6959048
    Abstract: The invention relates to a method of transmitting data in a radio channel from a transmitter to a receiver, and to a transmitter and a receiver implementing the method. The method includes setting a radio channel quality requirement according to the user and system information; setting a data transfer delay requirement; determining a radio channel coherence time; channel encoding the data; selecting interleaving depth using the radio channel coherence time and the data transfer delay as decisive parameters; interleaving the channel coded data; if the radio channel quality requirement is not fulfilled, selecting at least one transmit diversity antenna besides the main antenna so that the radio channel quality requirement will be fulfilled; transmitting modulated, interleaved and channel coded data with the selected antennas.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: October 25, 2005
    Assignee: Nokia Networks Oy
    Inventors: Kari Horneman, Marcos Katz, Juha Ylitalo
  • Patent number: 6959035
    Abstract: A Code Division Multiple Access (CDMA) post-correlation processing system (12) for delay locked loop processing reduces the control data rate into a delay locked loop (DLL) processor and the number of required interpolation operations by executing a portion of the interpolation operations at a symbol data rate rather than at a chiprate. Specifically, an interpolator (16) generates time shifted chip samples based on input CDMA chip samples. First and second correlators (22, 24) extract ontime control and data symbol samples, respectively, from ontime input CDMA chip samples. A third correlator (26) extracts first non-ontime control symbol samples from non-ontime CDMA chip samples. The first non-ontime control symbol samples are then input with the ontime control symbol samples to a post-correlation interpolator (28) operating at a symbol rate to generate second non-ontime symbol samples necessary for Delay Locked Loop (DLL) processing.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: October 25, 2005
    Assignee: FreeScale, Inc.
    Inventors: Dana J. Taipale, Dipesh Koirala
  • Patent number: 6954486
    Abstract: A rake receiver tracks a multi-path signal transmitted from a base station to a mobile station. The rake receiver comprises rake fingers each assigned to a multi-path component. Typically a rake finger performs an early late detection using early and late component of the energy of the component taken before and after a presumed occurrence of an optimum of the energy. An early-late signal is generated from a comparison between a product of a first integer and the early component and a product of another integer and the late component.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: October 11, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Charles John Henderson Razzell
  • Patent number: 6947508
    Abstract: An apparatus and method for estimating a frequency and/or a phase of a digital input signal by determining phase values of the input signal. The phase values are then added over a predetermined summation length N/B. The sampling rate of the added-up phase values are reduced by a factor N/B in comparison with the sampling rate of the phase values. The added-up phase values are delayed in a chain of at least B?1 delay elements. The differently-delayed added-up phase values are then added or subtracted to create a resulting. pulse response of the frequency such that the resulting pulse response of the frequency is constant positive in a first interval, is zero in a second interval and is constant negative in a third interval, so that a resulting pulse response of the phase is constant in at least a middle interval or is otherwise zero.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: September 20, 2005
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Markus Freidhof, Kurt Schmidt